xref: /openbmc/linux/arch/ia64/include/asm/sn/sn_sal.h (revision c4f7ac64)
1 #ifndef _ASM_IA64_SN_SN_SAL_H
2 #define _ASM_IA64_SN_SN_SAL_H
3 
4 /*
5  * System Abstraction Layer definitions for IA64
6  *
7  * This file is subject to the terms and conditions of the GNU General Public
8  * License.  See the file "COPYING" in the main directory of this archive
9  * for more details.
10  *
11  * Copyright (c) 2000-2006 Silicon Graphics, Inc.  All rights reserved.
12  */
13 
14 #include <linux/types.h>
15 #include <asm/sal.h>
16 
17 // SGI Specific Calls
18 #define  SN_SAL_GET_PARTITION_ADDR		   0x02000009
19 #define  SN_SAL_MEMPROTECT                         0x0200003e
20 
21 #define  SN_SAL_WATCHLIST_ALLOC			   0x02000070
22 #define  SN_SAL_WATCHLIST_FREE			   0x02000071
23 
24 /*
25  * SAL Error Codes
26  */
27 #define SALRET_MORE_PASSES	1
28 #define SALRET_OK		0
29 #define SALRET_NOT_IMPLEMENTED	(-1)
30 #define SALRET_INVALID_ARG	(-2)
31 #define SALRET_ERROR		(-3)
32 
33 /*
34  * Returns the physical address of the partition's reserved page through
35  * an iterative number of calls.
36  *
37  * On first call, 'cookie' and 'len' should be set to 0, and 'addr'
38  * set to the nasid of the partition whose reserved page's address is
39  * being sought.
40  * On subsequent calls, pass the values, that were passed back on the
41  * previous call.
42  *
43  * While the return status equals SALRET_MORE_PASSES, keep calling
44  * this function after first copying 'len' bytes starting at 'addr'
45  * into 'buf'. Once the return status equals SALRET_OK, 'addr' will
46  * be the physical address of the partition's reserved page. If the
47  * return status equals neither of these, an error as occurred.
48  */
49 static inline s64
50 sn_partition_reserved_page_pa(u64 buf, u64 *cookie, u64 *addr, u64 *len)
51 {
52 	struct ia64_sal_retval rv;
53 	ia64_sal_oemcall_reentrant(&rv, SN_SAL_GET_PARTITION_ADDR, *cookie,
54 				   *addr, buf, *len, 0, 0, 0);
55 	*cookie = rv.v0;
56 	*addr = rv.v1;
57 	*len = rv.v2;
58 	return rv.status;
59 }
60 
61 /*
62  * Change memory access protections for a physical address range.
63  * nasid_array is not used on Altix, but may be in future architectures.
64  * Available memory protection access classes are defined after the function.
65  */
66 static inline int
67 sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
68 {
69 	struct ia64_sal_retval ret_stuff;
70 
71 	ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
72 				(u64)nasid_array, perms, 0, 0, 0);
73 	return ret_stuff.status;
74 }
75 #define SN_MEMPROT_ACCESS_CLASS_0		0x14a080
76 #define SN_MEMPROT_ACCESS_CLASS_1		0x2520c2
77 #define SN_MEMPROT_ACCESS_CLASS_2		0x14a1ca
78 #define SN_MEMPROT_ACCESS_CLASS_3		0x14a290
79 #define SN_MEMPROT_ACCESS_CLASS_6		0x084080
80 #define SN_MEMPROT_ACCESS_CLASS_7		0x021080
81 
82 union sn_watchlist_u {
83 	u64     val;
84 	struct {
85 		u64	blade	: 16,
86 			size	: 32,
87 			filler	: 16;
88 	};
89 };
90 
91 static inline int
92 sn_mq_watchlist_alloc(int blade, void *mq, unsigned int mq_size,
93 				unsigned long *intr_mmr_offset)
94 {
95 	struct ia64_sal_retval rv;
96 	unsigned long addr;
97 	union sn_watchlist_u size_blade;
98 	int watchlist;
99 
100 	addr = (unsigned long)mq;
101 	size_blade.size = mq_size;
102 	size_blade.blade = blade;
103 
104 	/*
105 	 * bios returns watchlist number or negative error number.
106 	 */
107 	ia64_sal_oemcall_nolock(&rv, SN_SAL_WATCHLIST_ALLOC, addr,
108 			size_blade.val, (u64)intr_mmr_offset,
109 			(u64)&watchlist, 0, 0, 0);
110 	if (rv.status < 0)
111 		return rv.status;
112 
113 	return watchlist;
114 }
115 
116 static inline int
117 sn_mq_watchlist_free(int blade, int watchlist_num)
118 {
119 	struct ia64_sal_retval rv;
120 	ia64_sal_oemcall_nolock(&rv, SN_SAL_WATCHLIST_FREE, blade,
121 			watchlist_num, 0, 0, 0, 0, 0);
122 	return rv.status;
123 }
124 #endif /* _ASM_IA64_SN_SN_SAL_H */
125