1 #ifndef _ASM_IA64_SN_SN_SAL_H 2 #define _ASM_IA64_SN_SN_SAL_H 3 4 /* 5 * System Abstraction Layer definitions for IA64 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file "COPYING" in the main directory of this archive 9 * for more details. 10 * 11 * Copyright (c) 2000-2006 Silicon Graphics, Inc. All rights reserved. 12 */ 13 14 15 #include <asm/sal.h> 16 #include <asm/sn/sn_cpuid.h> 17 #include <asm/sn/arch.h> 18 #include <asm/sn/geo.h> 19 #include <asm/sn/nodepda.h> 20 #include <asm/sn/shub_mmr.h> 21 22 // SGI Specific Calls 23 #define SN_SAL_POD_MODE 0x02000001 24 #define SN_SAL_SYSTEM_RESET 0x02000002 25 #define SN_SAL_PROBE 0x02000003 26 #define SN_SAL_GET_MASTER_NASID 0x02000004 27 #define SN_SAL_GET_KLCONFIG_ADDR 0x02000005 28 #define SN_SAL_LOG_CE 0x02000006 29 #define SN_SAL_REGISTER_CE 0x02000007 30 #define SN_SAL_GET_PARTITION_ADDR 0x02000009 31 #define SN_SAL_XP_ADDR_REGION 0x0200000f 32 #define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010 33 #define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011 34 #define SN_SAL_PRINT_ERROR 0x02000012 35 #define SN_SAL_REGISTER_PMI_HANDLER 0x02000014 36 #define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant 37 #define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant 38 #define SN_SAL_GET_SAPIC_INFO 0x0200001d 39 #define SN_SAL_GET_SN_INFO 0x0200001e 40 #define SN_SAL_CONSOLE_PUTC 0x02000021 41 #define SN_SAL_CONSOLE_GETC 0x02000022 42 #define SN_SAL_CONSOLE_PUTS 0x02000023 43 #define SN_SAL_CONSOLE_GETS 0x02000024 44 #define SN_SAL_CONSOLE_GETS_TIMEOUT 0x02000025 45 #define SN_SAL_CONSOLE_POLL 0x02000026 46 #define SN_SAL_CONSOLE_INTR 0x02000027 47 #define SN_SAL_CONSOLE_PUTB 0x02000028 48 #define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a 49 #define SN_SAL_CONSOLE_READC 0x0200002b 50 #define SN_SAL_SYSCTL_OP 0x02000030 51 #define SN_SAL_SYSCTL_MODID_GET 0x02000031 52 #define SN_SAL_SYSCTL_GET 0x02000032 53 #define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033 54 #define SN_SAL_SYSCTL_IO_PORTSPEED_GET 0x02000035 55 #define SN_SAL_SYSCTL_SLAB_GET 0x02000036 56 #define SN_SAL_BUS_CONFIG 0x02000037 57 #define SN_SAL_SYS_SERIAL_GET 0x02000038 58 #define SN_SAL_PARTITION_SERIAL_GET 0x02000039 59 #define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a 60 #define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b 61 #define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c 62 #define SN_SAL_COHERENCE 0x0200003d 63 #define SN_SAL_MEMPROTECT 0x0200003e 64 #define SN_SAL_SYSCTL_FRU_CAPTURE 0x0200003f 65 66 #define SN_SAL_SYSCTL_IOBRICK_PCI_OP 0x02000042 // reentrant 67 #define SN_SAL_IROUTER_OP 0x02000043 68 #define SN_SAL_SYSCTL_EVENT 0x02000044 69 #define SN_SAL_IOIF_INTERRUPT 0x0200004a 70 #define SN_SAL_HWPERF_OP 0x02000050 // lock 71 #define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051 72 #define SN_SAL_IOIF_PCI_SAFE 0x02000052 73 #define SN_SAL_IOIF_SLOT_ENABLE 0x02000053 74 #define SN_SAL_IOIF_SLOT_DISABLE 0x02000054 75 #define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055 76 #define SN_SAL_IOIF_GET_PCIBUS_INFO 0x02000056 77 #define SN_SAL_IOIF_GET_PCIDEV_INFO 0x02000057 78 #define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058 // deprecated 79 #define SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST 0x0200005a 80 81 #define SN_SAL_IOIF_INIT 0x0200005f 82 #define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060 83 #define SN_SAL_BTE_RECOVER 0x02000061 84 #define SN_SAL_RESERVED_DO_NOT_USE 0x02000062 85 #define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000064 86 87 #define SN_SAL_GET_PROM_FEATURE_SET 0x02000065 88 #define SN_SAL_SET_OS_FEATURE_SET 0x02000066 89 #define SN_SAL_INJECT_ERROR 0x02000067 90 #define SN_SAL_SET_CPU_NUMBER 0x02000068 91 92 #define SN_SAL_KERNEL_LAUNCH_EVENT 0x02000069 93 94 /* 95 * Service-specific constants 96 */ 97 98 /* Console interrupt manipulation */ 99 /* action codes */ 100 #define SAL_CONSOLE_INTR_OFF 0 /* turn the interrupt off */ 101 #define SAL_CONSOLE_INTR_ON 1 /* turn the interrupt on */ 102 #define SAL_CONSOLE_INTR_STATUS 2 /* retrieve the interrupt status */ 103 /* interrupt specification & status return codes */ 104 #define SAL_CONSOLE_INTR_XMIT 1 /* output interrupt */ 105 #define SAL_CONSOLE_INTR_RECV 2 /* input interrupt */ 106 107 /* interrupt handling */ 108 #define SAL_INTR_ALLOC 1 109 #define SAL_INTR_FREE 2 110 #define SAL_INTR_REDIRECT 3 111 112 /* 113 * operations available on the generic SN_SAL_SYSCTL_OP 114 * runtime service 115 */ 116 #define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */ 117 #define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */ 118 119 /* 120 * IRouter (i.e. generalized system controller) operations 121 */ 122 #define SAL_IROUTER_OPEN 0 /* open a subchannel */ 123 #define SAL_IROUTER_CLOSE 1 /* close a subchannel */ 124 #define SAL_IROUTER_SEND 2 /* send part of an IRouter packet */ 125 #define SAL_IROUTER_RECV 3 /* receive part of an IRouter packet */ 126 #define SAL_IROUTER_INTR_STATUS 4 /* check the interrupt status for 127 * an open subchannel 128 */ 129 #define SAL_IROUTER_INTR_ON 5 /* enable an interrupt */ 130 #define SAL_IROUTER_INTR_OFF 6 /* disable an interrupt */ 131 #define SAL_IROUTER_INIT 7 /* initialize IRouter driver */ 132 133 /* IRouter interrupt mask bits */ 134 #define SAL_IROUTER_INTR_XMIT SAL_CONSOLE_INTR_XMIT 135 #define SAL_IROUTER_INTR_RECV SAL_CONSOLE_INTR_RECV 136 137 /* 138 * Error Handling Features 139 */ 140 #define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1 // obsolete 141 #define SAL_ERR_FEAT_LOG_SBES 0x2 // obsolete 142 #define SAL_ERR_FEAT_MFR_OVERRIDE 0x4 143 #define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000 144 145 /* 146 * SAL Error Codes 147 */ 148 #define SALRET_MORE_PASSES 1 149 #define SALRET_OK 0 150 #define SALRET_NOT_IMPLEMENTED (-1) 151 #define SALRET_INVALID_ARG (-2) 152 #define SALRET_ERROR (-3) 153 154 #define SN_SAL_FAKE_PROM 0x02009999 155 156 /** 157 * sn_sal_revision - get the SGI SAL revision number 158 * 159 * The SGI PROM stores its version in the sal_[ab]_rev_(major|minor). 160 * This routine simply extracts the major and minor values and 161 * presents them in a u32 format. 162 * 163 * For example, version 4.05 would be represented at 0x0405. 164 */ 165 static inline u32 166 sn_sal_rev(void) 167 { 168 struct ia64_sal_systab *systab = __va(efi.sal_systab); 169 170 return (u32)(systab->sal_b_rev_major << 8 | systab->sal_b_rev_minor); 171 } 172 173 /* 174 * Returns the master console nasid, if the call fails, return an illegal 175 * value. 176 */ 177 static inline u64 178 ia64_sn_get_console_nasid(void) 179 { 180 struct ia64_sal_retval ret_stuff; 181 182 ret_stuff.status = 0; 183 ret_stuff.v0 = 0; 184 ret_stuff.v1 = 0; 185 ret_stuff.v2 = 0; 186 SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_NASID, 0, 0, 0, 0, 0, 0, 0); 187 188 if (ret_stuff.status < 0) 189 return ret_stuff.status; 190 191 /* Master console nasid is in 'v0' */ 192 return ret_stuff.v0; 193 } 194 195 /* 196 * Returns the master baseio nasid, if the call fails, return an illegal 197 * value. 198 */ 199 static inline u64 200 ia64_sn_get_master_baseio_nasid(void) 201 { 202 struct ia64_sal_retval ret_stuff; 203 204 ret_stuff.status = 0; 205 ret_stuff.v0 = 0; 206 ret_stuff.v1 = 0; 207 ret_stuff.v2 = 0; 208 SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_BASEIO_NASID, 0, 0, 0, 0, 0, 0, 0); 209 210 if (ret_stuff.status < 0) 211 return ret_stuff.status; 212 213 /* Master baseio nasid is in 'v0' */ 214 return ret_stuff.v0; 215 } 216 217 static inline void * 218 ia64_sn_get_klconfig_addr(nasid_t nasid) 219 { 220 struct ia64_sal_retval ret_stuff; 221 222 ret_stuff.status = 0; 223 ret_stuff.v0 = 0; 224 ret_stuff.v1 = 0; 225 ret_stuff.v2 = 0; 226 SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0); 227 return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL; 228 } 229 230 /* 231 * Returns the next console character. 232 */ 233 static inline u64 234 ia64_sn_console_getc(int *ch) 235 { 236 struct ia64_sal_retval ret_stuff; 237 238 ret_stuff.status = 0; 239 ret_stuff.v0 = 0; 240 ret_stuff.v1 = 0; 241 ret_stuff.v2 = 0; 242 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_GETC, 0, 0, 0, 0, 0, 0, 0); 243 244 /* character is in 'v0' */ 245 *ch = (int)ret_stuff.v0; 246 247 return ret_stuff.status; 248 } 249 250 /* 251 * Read a character from the SAL console device, after a previous interrupt 252 * or poll operation has given us to know that a character is available 253 * to be read. 254 */ 255 static inline u64 256 ia64_sn_console_readc(void) 257 { 258 struct ia64_sal_retval ret_stuff; 259 260 ret_stuff.status = 0; 261 ret_stuff.v0 = 0; 262 ret_stuff.v1 = 0; 263 ret_stuff.v2 = 0; 264 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_READC, 0, 0, 0, 0, 0, 0, 0); 265 266 /* character is in 'v0' */ 267 return ret_stuff.v0; 268 } 269 270 /* 271 * Sends the given character to the console. 272 */ 273 static inline u64 274 ia64_sn_console_putc(char ch) 275 { 276 struct ia64_sal_retval ret_stuff; 277 278 ret_stuff.status = 0; 279 ret_stuff.v0 = 0; 280 ret_stuff.v1 = 0; 281 ret_stuff.v2 = 0; 282 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (u64)ch, 0, 0, 0, 0, 0, 0); 283 284 return ret_stuff.status; 285 } 286 287 /* 288 * Sends the given buffer to the console. 289 */ 290 static inline u64 291 ia64_sn_console_putb(const char *buf, int len) 292 { 293 struct ia64_sal_retval ret_stuff; 294 295 ret_stuff.status = 0; 296 ret_stuff.v0 = 0; 297 ret_stuff.v1 = 0; 298 ret_stuff.v2 = 0; 299 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (u64)buf, (u64)len, 0, 0, 0, 0, 0); 300 301 if ( ret_stuff.status == 0 ) { 302 return ret_stuff.v0; 303 } 304 return (u64)0; 305 } 306 307 /* 308 * Print a platform error record 309 */ 310 static inline u64 311 ia64_sn_plat_specific_err_print(int (*hook)(const char*, ...), char *rec) 312 { 313 struct ia64_sal_retval ret_stuff; 314 315 ret_stuff.status = 0; 316 ret_stuff.v0 = 0; 317 ret_stuff.v1 = 0; 318 ret_stuff.v2 = 0; 319 SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (u64)hook, (u64)rec, 0, 0, 0, 0, 0); 320 321 return ret_stuff.status; 322 } 323 324 /* 325 * Check for Platform errors 326 */ 327 static inline u64 328 ia64_sn_plat_cpei_handler(void) 329 { 330 struct ia64_sal_retval ret_stuff; 331 332 ret_stuff.status = 0; 333 ret_stuff.v0 = 0; 334 ret_stuff.v1 = 0; 335 ret_stuff.v2 = 0; 336 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_LOG_CE, 0, 0, 0, 0, 0, 0, 0); 337 338 return ret_stuff.status; 339 } 340 341 /* 342 * Set Error Handling Features (Obsolete) 343 */ 344 static inline u64 345 ia64_sn_plat_set_error_handling_features(void) 346 { 347 struct ia64_sal_retval ret_stuff; 348 349 ret_stuff.status = 0; 350 ret_stuff.v0 = 0; 351 ret_stuff.v1 = 0; 352 ret_stuff.v2 = 0; 353 SAL_CALL_REENTRANT(ret_stuff, SN_SAL_SET_ERROR_HANDLING_FEATURES, 354 SAL_ERR_FEAT_LOG_SBES, 355 0, 0, 0, 0, 0, 0); 356 357 return ret_stuff.status; 358 } 359 360 /* 361 * Checks for console input. 362 */ 363 static inline u64 364 ia64_sn_console_check(int *result) 365 { 366 struct ia64_sal_retval ret_stuff; 367 368 ret_stuff.status = 0; 369 ret_stuff.v0 = 0; 370 ret_stuff.v1 = 0; 371 ret_stuff.v2 = 0; 372 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_POLL, 0, 0, 0, 0, 0, 0, 0); 373 374 /* result is in 'v0' */ 375 *result = (int)ret_stuff.v0; 376 377 return ret_stuff.status; 378 } 379 380 /* 381 * Checks console interrupt status 382 */ 383 static inline u64 384 ia64_sn_console_intr_status(void) 385 { 386 struct ia64_sal_retval ret_stuff; 387 388 ret_stuff.status = 0; 389 ret_stuff.v0 = 0; 390 ret_stuff.v1 = 0; 391 ret_stuff.v2 = 0; 392 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR, 393 0, SAL_CONSOLE_INTR_STATUS, 394 0, 0, 0, 0, 0); 395 396 if (ret_stuff.status == 0) { 397 return ret_stuff.v0; 398 } 399 400 return 0; 401 } 402 403 /* 404 * Enable an interrupt on the SAL console device. 405 */ 406 static inline void 407 ia64_sn_console_intr_enable(u64 intr) 408 { 409 struct ia64_sal_retval ret_stuff; 410 411 ret_stuff.status = 0; 412 ret_stuff.v0 = 0; 413 ret_stuff.v1 = 0; 414 ret_stuff.v2 = 0; 415 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR, 416 intr, SAL_CONSOLE_INTR_ON, 417 0, 0, 0, 0, 0); 418 } 419 420 /* 421 * Disable an interrupt on the SAL console device. 422 */ 423 static inline void 424 ia64_sn_console_intr_disable(u64 intr) 425 { 426 struct ia64_sal_retval ret_stuff; 427 428 ret_stuff.status = 0; 429 ret_stuff.v0 = 0; 430 ret_stuff.v1 = 0; 431 ret_stuff.v2 = 0; 432 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR, 433 intr, SAL_CONSOLE_INTR_OFF, 434 0, 0, 0, 0, 0); 435 } 436 437 /* 438 * Sends a character buffer to the console asynchronously. 439 */ 440 static inline u64 441 ia64_sn_console_xmit_chars(char *buf, int len) 442 { 443 struct ia64_sal_retval ret_stuff; 444 445 ret_stuff.status = 0; 446 ret_stuff.v0 = 0; 447 ret_stuff.v1 = 0; 448 ret_stuff.v2 = 0; 449 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS, 450 (u64)buf, (u64)len, 451 0, 0, 0, 0, 0); 452 453 if (ret_stuff.status == 0) { 454 return ret_stuff.v0; 455 } 456 457 return 0; 458 } 459 460 /* 461 * Returns the iobrick module Id 462 */ 463 static inline u64 464 ia64_sn_sysctl_iobrick_module_get(nasid_t nasid, int *result) 465 { 466 struct ia64_sal_retval ret_stuff; 467 468 ret_stuff.status = 0; 469 ret_stuff.v0 = 0; 470 ret_stuff.v1 = 0; 471 ret_stuff.v2 = 0; 472 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYSCTL_IOBRICK_MODULE_GET, nasid, 0, 0, 0, 0, 0, 0); 473 474 /* result is in 'v0' */ 475 *result = (int)ret_stuff.v0; 476 477 return ret_stuff.status; 478 } 479 480 /** 481 * ia64_sn_pod_mode - call the SN_SAL_POD_MODE function 482 * 483 * SN_SAL_POD_MODE actually takes an argument, but it's always 484 * 0 when we call it from the kernel, so we don't have to expose 485 * it to the caller. 486 */ 487 static inline u64 488 ia64_sn_pod_mode(void) 489 { 490 struct ia64_sal_retval isrv; 491 SAL_CALL_REENTRANT(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0); 492 if (isrv.status) 493 return 0; 494 return isrv.v0; 495 } 496 497 /** 498 * ia64_sn_probe_mem - read from memory safely 499 * @addr: address to probe 500 * @size: number bytes to read (1,2,4,8) 501 * @data_ptr: address to store value read by probe (-1 returned if probe fails) 502 * 503 * Call into the SAL to do a memory read. If the read generates a machine 504 * check, this routine will recover gracefully and return -1 to the caller. 505 * @addr is usually a kernel virtual address in uncached space (i.e. the 506 * address starts with 0xc), but if called in physical mode, @addr should 507 * be a physical address. 508 * 509 * Return values: 510 * 0 - probe successful 511 * 1 - probe failed (generated MCA) 512 * 2 - Bad arg 513 * <0 - PAL error 514 */ 515 static inline u64 516 ia64_sn_probe_mem(long addr, long size, void *data_ptr) 517 { 518 struct ia64_sal_retval isrv; 519 520 SAL_CALL(isrv, SN_SAL_PROBE, addr, size, 0, 0, 0, 0, 0); 521 522 if (data_ptr) { 523 switch (size) { 524 case 1: 525 *((u8*)data_ptr) = (u8)isrv.v0; 526 break; 527 case 2: 528 *((u16*)data_ptr) = (u16)isrv.v0; 529 break; 530 case 4: 531 *((u32*)data_ptr) = (u32)isrv.v0; 532 break; 533 case 8: 534 *((u64*)data_ptr) = (u64)isrv.v0; 535 break; 536 default: 537 isrv.status = 2; 538 } 539 } 540 return isrv.status; 541 } 542 543 /* 544 * Retrieve the system serial number as an ASCII string. 545 */ 546 static inline u64 547 ia64_sn_sys_serial_get(char *buf) 548 { 549 struct ia64_sal_retval ret_stuff; 550 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYS_SERIAL_GET, buf, 0, 0, 0, 0, 0, 0); 551 return ret_stuff.status; 552 } 553 554 extern char sn_system_serial_number_string[]; 555 extern u64 sn_partition_serial_number; 556 557 static inline char * 558 sn_system_serial_number(void) { 559 if (sn_system_serial_number_string[0]) { 560 return(sn_system_serial_number_string); 561 } else { 562 ia64_sn_sys_serial_get(sn_system_serial_number_string); 563 return(sn_system_serial_number_string); 564 } 565 } 566 567 568 /* 569 * Returns a unique id number for this system and partition (suitable for 570 * use with license managers), based in part on the system serial number. 571 */ 572 static inline u64 573 ia64_sn_partition_serial_get(void) 574 { 575 struct ia64_sal_retval ret_stuff; 576 ia64_sal_oemcall_reentrant(&ret_stuff, SN_SAL_PARTITION_SERIAL_GET, 0, 577 0, 0, 0, 0, 0, 0); 578 if (ret_stuff.status != 0) 579 return 0; 580 return ret_stuff.v0; 581 } 582 583 static inline u64 584 sn_partition_serial_number_val(void) { 585 if (unlikely(sn_partition_serial_number == 0)) { 586 sn_partition_serial_number = ia64_sn_partition_serial_get(); 587 } 588 return sn_partition_serial_number; 589 } 590 591 /* 592 * Returns the partition id of the nasid passed in as an argument, 593 * or INVALID_PARTID if the partition id cannot be retrieved. 594 */ 595 static inline partid_t 596 ia64_sn_sysctl_partition_get(nasid_t nasid) 597 { 598 struct ia64_sal_retval ret_stuff; 599 SAL_CALL(ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid, 600 0, 0, 0, 0, 0, 0); 601 if (ret_stuff.status != 0) 602 return -1; 603 return ((partid_t)ret_stuff.v0); 604 } 605 606 /* 607 * Returns the physical address of the partition's reserved page through 608 * an iterative number of calls. 609 * 610 * On first call, 'cookie' and 'len' should be set to 0, and 'addr' 611 * set to the nasid of the partition whose reserved page's address is 612 * being sought. 613 * On subsequent calls, pass the values, that were passed back on the 614 * previous call. 615 * 616 * While the return status equals SALRET_MORE_PASSES, keep calling 617 * this function after first copying 'len' bytes starting at 'addr' 618 * into 'buf'. Once the return status equals SALRET_OK, 'addr' will 619 * be the physical address of the partition's reserved page. If the 620 * return status equals neither of these, an error as occurred. 621 */ 622 static inline s64 623 sn_partition_reserved_page_pa(u64 buf, u64 *cookie, u64 *addr, u64 *len) 624 { 625 struct ia64_sal_retval rv; 626 ia64_sal_oemcall_reentrant(&rv, SN_SAL_GET_PARTITION_ADDR, *cookie, 627 *addr, buf, *len, 0, 0, 0); 628 *cookie = rv.v0; 629 *addr = rv.v1; 630 *len = rv.v2; 631 return rv.status; 632 } 633 634 /* 635 * Register or unregister a physical address range being referenced across 636 * a partition boundary for which certain SAL errors should be scanned for, 637 * cleaned up and ignored. This is of value for kernel partitioning code only. 638 * Values for the operation argument: 639 * 1 = register this address range with SAL 640 * 0 = unregister this address range with SAL 641 * 642 * SAL maintains a reference count on an address range in case it is registered 643 * multiple times. 644 * 645 * On success, returns the reference count of the address range after the SAL 646 * call has performed the current registration/unregistration. Returns a 647 * negative value if an error occurred. 648 */ 649 static inline int 650 sn_register_xp_addr_region(u64 paddr, u64 len, int operation) 651 { 652 struct ia64_sal_retval ret_stuff; 653 ia64_sal_oemcall(&ret_stuff, SN_SAL_XP_ADDR_REGION, paddr, len, 654 (u64)operation, 0, 0, 0, 0); 655 return ret_stuff.status; 656 } 657 658 /* 659 * Register or unregister an instruction range for which SAL errors should 660 * be ignored. If an error occurs while in the registered range, SAL jumps 661 * to return_addr after ignoring the error. Values for the operation argument: 662 * 1 = register this instruction range with SAL 663 * 0 = unregister this instruction range with SAL 664 * 665 * Returns 0 on success, or a negative value if an error occurred. 666 */ 667 static inline int 668 sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr, 669 int virtual, int operation) 670 { 671 struct ia64_sal_retval ret_stuff; 672 u64 call; 673 if (virtual) { 674 call = SN_SAL_NO_FAULT_ZONE_VIRTUAL; 675 } else { 676 call = SN_SAL_NO_FAULT_ZONE_PHYSICAL; 677 } 678 ia64_sal_oemcall(&ret_stuff, call, start_addr, end_addr, return_addr, 679 (u64)1, 0, 0, 0); 680 return ret_stuff.status; 681 } 682 683 /* 684 * Register or unregister a function to handle a PMI received by a CPU. 685 * Before calling the registered handler, SAL sets r1 to the value that 686 * was passed in as the global_pointer. 687 * 688 * If the handler pointer is NULL, then the currently registered handler 689 * will be unregistered. 690 * 691 * Returns 0 on success, or a negative value if an error occurred. 692 */ 693 static inline int 694 sn_register_pmi_handler(u64 handler, u64 global_pointer) 695 { 696 struct ia64_sal_retval ret_stuff; 697 ia64_sal_oemcall(&ret_stuff, SN_SAL_REGISTER_PMI_HANDLER, handler, 698 global_pointer, 0, 0, 0, 0, 0); 699 return ret_stuff.status; 700 } 701 702 /* 703 * Change or query the coherence domain for this partition. Each cpu-based 704 * nasid is represented by a bit in an array of 64-bit words: 705 * 0 = not in this partition's coherency domain 706 * 1 = in this partition's coherency domain 707 * 708 * It is not possible for the local system's nasids to be removed from 709 * the coherency domain. Purpose of the domain arguments: 710 * new_domain = set the coherence domain to the given nasids 711 * old_domain = return the current coherence domain 712 * 713 * Returns 0 on success, or a negative value if an error occurred. 714 */ 715 static inline int 716 sn_change_coherence(u64 *new_domain, u64 *old_domain) 717 { 718 struct ia64_sal_retval ret_stuff; 719 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_COHERENCE, (u64)new_domain, 720 (u64)old_domain, 0, 0, 0, 0, 0); 721 return ret_stuff.status; 722 } 723 724 /* 725 * Change memory access protections for a physical address range. 726 * nasid_array is not used on Altix, but may be in future architectures. 727 * Available memory protection access classes are defined after the function. 728 */ 729 static inline int 730 sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array) 731 { 732 struct ia64_sal_retval ret_stuff; 733 734 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len, 735 (u64)nasid_array, perms, 0, 0, 0); 736 return ret_stuff.status; 737 } 738 #define SN_MEMPROT_ACCESS_CLASS_0 0x14a080 739 #define SN_MEMPROT_ACCESS_CLASS_1 0x2520c2 740 #define SN_MEMPROT_ACCESS_CLASS_2 0x14a1ca 741 #define SN_MEMPROT_ACCESS_CLASS_3 0x14a290 742 #define SN_MEMPROT_ACCESS_CLASS_6 0x084080 743 #define SN_MEMPROT_ACCESS_CLASS_7 0x021080 744 745 /* 746 * Turns off system power. 747 */ 748 static inline void 749 ia64_sn_power_down(void) 750 { 751 struct ia64_sal_retval ret_stuff; 752 SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0); 753 while(1) 754 cpu_relax(); 755 /* never returns */ 756 } 757 758 /** 759 * ia64_sn_fru_capture - tell the system controller to capture hw state 760 * 761 * This routine will call the SAL which will tell the system controller(s) 762 * to capture hw mmr information from each SHub in the system. 763 */ 764 static inline u64 765 ia64_sn_fru_capture(void) 766 { 767 struct ia64_sal_retval isrv; 768 SAL_CALL(isrv, SN_SAL_SYSCTL_FRU_CAPTURE, 0, 0, 0, 0, 0, 0, 0); 769 if (isrv.status) 770 return 0; 771 return isrv.v0; 772 } 773 774 /* 775 * Performs an operation on a PCI bus or slot -- power up, power down 776 * or reset. 777 */ 778 static inline u64 779 ia64_sn_sysctl_iobrick_pci_op(nasid_t n, u64 connection_type, 780 u64 bus, char slot, 781 u64 action) 782 { 783 struct ia64_sal_retval rv = {0, 0, 0, 0}; 784 785 SAL_CALL_NOLOCK(rv, SN_SAL_SYSCTL_IOBRICK_PCI_OP, connection_type, n, action, 786 bus, (u64) slot, 0, 0); 787 if (rv.status) 788 return rv.v0; 789 return 0; 790 } 791 792 793 /* 794 * Open a subchannel for sending arbitrary data to the system 795 * controller network via the system controller device associated with 796 * 'nasid'. Return the subchannel number or a negative error code. 797 */ 798 static inline int 799 ia64_sn_irtr_open(nasid_t nasid) 800 { 801 struct ia64_sal_retval rv; 802 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_OPEN, nasid, 803 0, 0, 0, 0, 0); 804 return (int) rv.v0; 805 } 806 807 /* 808 * Close system controller subchannel 'subch' previously opened on 'nasid'. 809 */ 810 static inline int 811 ia64_sn_irtr_close(nasid_t nasid, int subch) 812 { 813 struct ia64_sal_retval rv; 814 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_CLOSE, 815 (u64) nasid, (u64) subch, 0, 0, 0, 0); 816 return (int) rv.status; 817 } 818 819 /* 820 * Read data from system controller associated with 'nasid' on 821 * subchannel 'subch'. The buffer to be filled is pointed to by 822 * 'buf', and its capacity is in the integer pointed to by 'len'. The 823 * referent of 'len' is set to the number of bytes read by the SAL 824 * call. The return value is either SALRET_OK (for bytes read) or 825 * SALRET_ERROR (for error or "no data available"). 826 */ 827 static inline int 828 ia64_sn_irtr_recv(nasid_t nasid, int subch, char *buf, int *len) 829 { 830 struct ia64_sal_retval rv; 831 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_RECV, 832 (u64) nasid, (u64) subch, (u64) buf, (u64) len, 833 0, 0); 834 return (int) rv.status; 835 } 836 837 /* 838 * Write data to the system controller network via the system 839 * controller associated with 'nasid' on suchannel 'subch'. The 840 * buffer to be written out is pointed to by 'buf', and 'len' is the 841 * number of bytes to be written. The return value is either the 842 * number of bytes written (which could be zero) or a negative error 843 * code. 844 */ 845 static inline int 846 ia64_sn_irtr_send(nasid_t nasid, int subch, char *buf, int len) 847 { 848 struct ia64_sal_retval rv; 849 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_SEND, 850 (u64) nasid, (u64) subch, (u64) buf, (u64) len, 851 0, 0); 852 return (int) rv.v0; 853 } 854 855 /* 856 * Check whether any interrupts are pending for the system controller 857 * associated with 'nasid' and its subchannel 'subch'. The return 858 * value is a mask of pending interrupts (SAL_IROUTER_INTR_XMIT and/or 859 * SAL_IROUTER_INTR_RECV). 860 */ 861 static inline int 862 ia64_sn_irtr_intr(nasid_t nasid, int subch) 863 { 864 struct ia64_sal_retval rv; 865 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_STATUS, 866 (u64) nasid, (u64) subch, 0, 0, 0, 0); 867 return (int) rv.v0; 868 } 869 870 /* 871 * Enable the interrupt indicated by the intr parameter (either 872 * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV). 873 */ 874 static inline int 875 ia64_sn_irtr_intr_enable(nasid_t nasid, int subch, u64 intr) 876 { 877 struct ia64_sal_retval rv; 878 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_ON, 879 (u64) nasid, (u64) subch, intr, 0, 0, 0); 880 return (int) rv.v0; 881 } 882 883 /* 884 * Disable the interrupt indicated by the intr parameter (either 885 * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV). 886 */ 887 static inline int 888 ia64_sn_irtr_intr_disable(nasid_t nasid, int subch, u64 intr) 889 { 890 struct ia64_sal_retval rv; 891 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_OFF, 892 (u64) nasid, (u64) subch, intr, 0, 0, 0); 893 return (int) rv.v0; 894 } 895 896 /* 897 * Set up a node as the point of contact for system controller 898 * environmental event delivery. 899 */ 900 static inline int 901 ia64_sn_sysctl_event_init(nasid_t nasid) 902 { 903 struct ia64_sal_retval rv; 904 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_EVENT, (u64) nasid, 905 0, 0, 0, 0, 0, 0); 906 return (int) rv.v0; 907 } 908 909 /* 910 * Ask the system controller on the specified nasid to reset 911 * the CX corelet clock. Only valid on TIO nodes. 912 */ 913 static inline int 914 ia64_sn_sysctl_tio_clock_reset(nasid_t nasid) 915 { 916 struct ia64_sal_retval rv; 917 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST, 918 nasid, 0, 0, 0, 0, 0); 919 if (rv.status != 0) 920 return (int)rv.status; 921 if (rv.v0 != 0) 922 return (int)rv.v0; 923 924 return 0; 925 } 926 927 /* 928 * Get the associated ioboard type for a given nasid. 929 */ 930 static inline s64 931 ia64_sn_sysctl_ioboard_get(nasid_t nasid, u16 *ioboard) 932 { 933 struct ia64_sal_retval isrv; 934 SAL_CALL_REENTRANT(isrv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD, 935 nasid, 0, 0, 0, 0, 0); 936 if (isrv.v0 != 0) { 937 *ioboard = isrv.v0; 938 return isrv.status; 939 } 940 if (isrv.v1 != 0) { 941 *ioboard = isrv.v1; 942 return isrv.status; 943 } 944 945 return isrv.status; 946 } 947 948 /** 949 * ia64_sn_get_fit_compt - read a FIT entry from the PROM header 950 * @nasid: NASID of node to read 951 * @index: FIT entry index to be retrieved (0..n) 952 * @fitentry: 16 byte buffer where FIT entry will be stored. 953 * @banbuf: optional buffer for retrieving banner 954 * @banlen: length of banner buffer 955 * 956 * Access to the physical PROM chips needs to be serialized since reads and 957 * writes can't occur at the same time, so we need to call into the SAL when 958 * we want to look at the FIT entries on the chips. 959 * 960 * Returns: 961 * %SALRET_OK if ok 962 * %SALRET_INVALID_ARG if index too big 963 * %SALRET_NOT_IMPLEMENTED if running on older PROM 964 * ??? if nasid invalid OR banner buffer not large enough 965 */ 966 static inline int 967 ia64_sn_get_fit_compt(u64 nasid, u64 index, void *fitentry, void *banbuf, 968 u64 banlen) 969 { 970 struct ia64_sal_retval rv; 971 SAL_CALL_NOLOCK(rv, SN_SAL_GET_FIT_COMPT, nasid, index, fitentry, 972 banbuf, banlen, 0, 0); 973 return (int) rv.status; 974 } 975 976 /* 977 * Initialize the SAL components of the system controller 978 * communication driver; specifically pass in a sizable buffer that 979 * can be used for allocation of subchannel queues as new subchannels 980 * are opened. "buf" points to the buffer, and "len" specifies its 981 * length. 982 */ 983 static inline int 984 ia64_sn_irtr_init(nasid_t nasid, void *buf, int len) 985 { 986 struct ia64_sal_retval rv; 987 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INIT, 988 (u64) nasid, (u64) buf, (u64) len, 0, 0, 0); 989 return (int) rv.status; 990 } 991 992 /* 993 * Returns the nasid, subnode & slice corresponding to a SAPIC ID 994 * 995 * In: 996 * arg0 - SN_SAL_GET_SAPIC_INFO 997 * arg1 - sapicid (lid >> 16) 998 * Out: 999 * v0 - nasid 1000 * v1 - subnode 1001 * v2 - slice 1002 */ 1003 static inline u64 1004 ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice) 1005 { 1006 struct ia64_sal_retval ret_stuff; 1007 1008 ret_stuff.status = 0; 1009 ret_stuff.v0 = 0; 1010 ret_stuff.v1 = 0; 1011 ret_stuff.v2 = 0; 1012 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SAPIC_INFO, sapicid, 0, 0, 0, 0, 0, 0); 1013 1014 /***** BEGIN HACK - temp til old proms no longer supported ********/ 1015 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) { 1016 if (nasid) *nasid = sapicid & 0xfff; 1017 if (subnode) *subnode = (sapicid >> 13) & 1; 1018 if (slice) *slice = (sapicid >> 12) & 3; 1019 return 0; 1020 } 1021 /***** END HACK *******/ 1022 1023 if (ret_stuff.status < 0) 1024 return ret_stuff.status; 1025 1026 if (nasid) *nasid = (int) ret_stuff.v0; 1027 if (subnode) *subnode = (int) ret_stuff.v1; 1028 if (slice) *slice = (int) ret_stuff.v2; 1029 return 0; 1030 } 1031 1032 /* 1033 * Returns information about the HUB/SHUB. 1034 * In: 1035 * arg0 - SN_SAL_GET_SN_INFO 1036 * arg1 - 0 (other values reserved for future use) 1037 * Out: 1038 * v0 1039 * [7:0] - shub type (0=shub1, 1=shub2) 1040 * [15:8] - Log2 max number of nodes in entire system (includes 1041 * C-bricks, I-bricks, etc) 1042 * [23:16] - Log2 of nodes per sharing domain 1043 * [31:24] - partition ID 1044 * [39:32] - coherency_id 1045 * [47:40] - regionsize 1046 * v1 1047 * [15:0] - nasid mask (ex., 0x7ff for 11 bit nasid) 1048 * [23:15] - bit position of low nasid bit 1049 */ 1050 static inline u64 1051 ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift, 1052 u8 *systemsize, u8 *sharing_domain_size, u8 *partid, u8 *coher, u8 *reg) 1053 { 1054 struct ia64_sal_retval ret_stuff; 1055 1056 ret_stuff.status = 0; 1057 ret_stuff.v0 = 0; 1058 ret_stuff.v1 = 0; 1059 ret_stuff.v2 = 0; 1060 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0); 1061 1062 /***** BEGIN HACK - temp til old proms no longer supported ********/ 1063 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) { 1064 int nasid = get_sapicid() & 0xfff; 1065 #define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL 1066 #define SH_SHUB_ID_NODES_PER_BIT_SHFT 48 1067 if (shubtype) *shubtype = 0; 1068 if (nasid_bitmask) *nasid_bitmask = 0x7ff; 1069 if (nasid_shift) *nasid_shift = 38; 1070 if (systemsize) *systemsize = 10; 1071 if (sharing_domain_size) *sharing_domain_size = 8; 1072 if (partid) *partid = ia64_sn_sysctl_partition_get(nasid); 1073 if (coher) *coher = nasid >> 9; 1074 if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >> 1075 SH_SHUB_ID_NODES_PER_BIT_SHFT; 1076 return 0; 1077 } 1078 /***** END HACK *******/ 1079 1080 if (ret_stuff.status < 0) 1081 return ret_stuff.status; 1082 1083 if (shubtype) *shubtype = ret_stuff.v0 & 0xff; 1084 if (systemsize) *systemsize = (ret_stuff.v0 >> 8) & 0xff; 1085 if (sharing_domain_size) *sharing_domain_size = (ret_stuff.v0 >> 16) & 0xff; 1086 if (partid) *partid = (ret_stuff.v0 >> 24) & 0xff; 1087 if (coher) *coher = (ret_stuff.v0 >> 32) & 0xff; 1088 if (reg) *reg = (ret_stuff.v0 >> 40) & 0xff; 1089 if (nasid_bitmask) *nasid_bitmask = (ret_stuff.v1 & 0xffff); 1090 if (nasid_shift) *nasid_shift = (ret_stuff.v1 >> 16) & 0xff; 1091 return 0; 1092 } 1093 1094 /* 1095 * This is the access point to the Altix PROM hardware performance 1096 * and status monitoring interface. For info on using this, see 1097 * arch/ia64/include/asm/sn/sn2/sn_hwperf.h 1098 */ 1099 static inline int 1100 ia64_sn_hwperf_op(nasid_t nasid, u64 opcode, u64 a0, u64 a1, u64 a2, 1101 u64 a3, u64 a4, int *v0) 1102 { 1103 struct ia64_sal_retval rv; 1104 SAL_CALL_NOLOCK(rv, SN_SAL_HWPERF_OP, (u64)nasid, 1105 opcode, a0, a1, a2, a3, a4); 1106 if (v0) 1107 *v0 = (int) rv.v0; 1108 return (int) rv.status; 1109 } 1110 1111 static inline int 1112 ia64_sn_ioif_get_pci_topology(u64 buf, u64 len) 1113 { 1114 struct ia64_sal_retval rv; 1115 SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY, buf, len, 0, 0, 0, 0, 0); 1116 return (int) rv.status; 1117 } 1118 1119 /* 1120 * BTE error recovery is implemented in SAL 1121 */ 1122 static inline int 1123 ia64_sn_bte_recovery(nasid_t nasid) 1124 { 1125 struct ia64_sal_retval rv; 1126 1127 rv.status = 0; 1128 SAL_CALL_NOLOCK(rv, SN_SAL_BTE_RECOVER, (u64)nasid, 0, 0, 0, 0, 0, 0); 1129 if (rv.status == SALRET_NOT_IMPLEMENTED) 1130 return 0; 1131 return (int) rv.status; 1132 } 1133 1134 static inline int 1135 ia64_sn_is_fake_prom(void) 1136 { 1137 struct ia64_sal_retval rv; 1138 SAL_CALL_NOLOCK(rv, SN_SAL_FAKE_PROM, 0, 0, 0, 0, 0, 0, 0); 1139 return (rv.status == 0); 1140 } 1141 1142 static inline int 1143 ia64_sn_get_prom_feature_set(int set, unsigned long *feature_set) 1144 { 1145 struct ia64_sal_retval rv; 1146 1147 SAL_CALL_NOLOCK(rv, SN_SAL_GET_PROM_FEATURE_SET, set, 0, 0, 0, 0, 0, 0); 1148 if (rv.status != 0) 1149 return rv.status; 1150 *feature_set = rv.v0; 1151 return 0; 1152 } 1153 1154 static inline int 1155 ia64_sn_set_os_feature(int feature) 1156 { 1157 struct ia64_sal_retval rv; 1158 1159 SAL_CALL_NOLOCK(rv, SN_SAL_SET_OS_FEATURE_SET, feature, 0, 0, 0, 0, 0, 0); 1160 return rv.status; 1161 } 1162 1163 static inline int 1164 sn_inject_error(u64 paddr, u64 *data, u64 *ecc) 1165 { 1166 struct ia64_sal_retval ret_stuff; 1167 1168 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_INJECT_ERROR, paddr, (u64)data, 1169 (u64)ecc, 0, 0, 0, 0); 1170 return ret_stuff.status; 1171 } 1172 1173 static inline int 1174 ia64_sn_set_cpu_number(int cpu) 1175 { 1176 struct ia64_sal_retval rv; 1177 1178 SAL_CALL_NOLOCK(rv, SN_SAL_SET_CPU_NUMBER, cpu, 0, 0, 0, 0, 0, 0); 1179 return rv.status; 1180 } 1181 static inline int 1182 ia64_sn_kernel_launch_event(void) 1183 { 1184 struct ia64_sal_retval rv; 1185 SAL_CALL_NOLOCK(rv, SN_SAL_KERNEL_LAUNCH_EVENT, 0, 0, 0, 0, 0, 0, 0); 1186 return rv.status; 1187 } 1188 #endif /* _ASM_IA64_SN_SN_SAL_H */ 1189