xref: /openbmc/linux/arch/ia64/include/asm/pci.h (revision 3821a065)
1 #ifndef _ASM_IA64_PCI_H
2 #define _ASM_IA64_PCI_H
3 
4 #include <linux/mm.h>
5 #include <linux/slab.h>
6 #include <linux/spinlock.h>
7 #include <linux/string.h>
8 #include <linux/types.h>
9 #include <linux/scatterlist.h>
10 
11 #include <asm/io.h>
12 #include <asm/hw_irq.h>
13 
14 struct pci_vector_struct {
15 	__u16 segment;	/* PCI Segment number */
16 	__u16 bus;	/* PCI Bus number */
17 	__u32 pci_id;	/* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */
18 	__u8 pin;	/* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */
19 	__u32 irq;	/* IRQ assigned */
20 };
21 
22 /*
23  * Can be used to override the logic in pci_scan_bus for skipping already-configured bus
24  * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
25  * loader.
26  */
27 #define pcibios_assign_all_busses()     0
28 
29 #define PCIBIOS_MIN_IO		0x1000
30 #define PCIBIOS_MIN_MEM		0x10000000
31 
32 void pcibios_config_init(void);
33 
34 struct pci_dev;
35 
36 /*
37  * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct
38  * correspondence between device bus addresses and CPU physical addresses.
39  * Platforms with a hardware I/O MMU _must_ turn this off to suppress the
40  * bounce buffer handling code in the block and network device layers.
41  * Platforms with separate bus address spaces _must_ turn this off and provide
42  * a device DMA mapping implementation that takes care of the necessary
43  * address translation.
44  *
45  * For now, the ia64 platforms which may have separate/multiple bus address
46  * spaces all have I/O MMUs which support the merging of physically
47  * discontiguous buffers, so we can use that as the sole factor to determine
48  * the setting of PCI_DMA_BUS_IS_PHYS.
49  */
50 extern unsigned long ia64_max_iommu_merge_mask;
51 #define PCI_DMA_BUS_IS_PHYS	(ia64_max_iommu_merge_mask == ~0UL)
52 
53 #include <asm-generic/pci-dma-compat.h>
54 
55 #define HAVE_PCI_MMAP
56 extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
57 				enum pci_mmap_state mmap_state, int write_combine);
58 #define HAVE_PCI_LEGACY
59 extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
60 				      struct vm_area_struct *vma,
61 				      enum pci_mmap_state mmap_state);
62 
63 #define pci_get_legacy_mem platform_pci_get_legacy_mem
64 #define pci_legacy_read platform_pci_legacy_read
65 #define pci_legacy_write platform_pci_legacy_write
66 
67 struct iospace_resource {
68 	struct list_head list;
69 	struct resource res;
70 };
71 
72 struct pci_controller {
73 	struct acpi_device *companion;
74 	void *iommu;
75 	int segment;
76 	int node;		/* nearest node with memory or NUMA_NO_NODE for global allocation */
77 
78 	void *platform_data;
79 };
80 
81 
82 #define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
83 #define pci_domain_nr(busdev)    (PCI_CONTROLLER(busdev)->segment)
84 
85 extern struct pci_ops pci_root_ops;
86 
87 static inline int pci_proc_domain(struct pci_bus *bus)
88 {
89 	return (pci_domain_nr(bus) != 0);
90 }
91 
92 #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
93 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
94 {
95 	return channel ? isa_irq_to_vector(15) : isa_irq_to_vector(14);
96 }
97 
98 #ifdef CONFIG_INTEL_IOMMU
99 extern void pci_iommu_alloc(void);
100 #endif
101 #endif /* _ASM_IA64_PCI_H */
102