1 /****************************************************************************** 2 * arch/ia64/include/asm/native/inst.h 3 * 4 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp> 5 * VA Linux Systems Japan K.K. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 */ 22 23 #define DO_SAVE_MIN IA64_NATIVE_DO_SAVE_MIN 24 25 #define __paravirt_switch_to ia64_native_switch_to 26 #define __paravirt_leave_syscall ia64_native_leave_syscall 27 #define __paravirt_work_processed_syscall ia64_native_work_processed_syscall 28 #define __paravirt_leave_kernel ia64_native_leave_kernel 29 #define __paravirt_pending_syscall_end ia64_work_pending_syscall_end 30 #define __paravirt_work_processed_syscall_target \ 31 ia64_work_processed_syscall 32 33 #ifdef CONFIG_PARAVIRT_GUEST_ASM_CLOBBER_CHECK 34 # define PARAVIRT_POISON 0xdeadbeefbaadf00d 35 # define CLOBBER(clob) \ 36 ;; \ 37 movl clob = PARAVIRT_POISON; \ 38 ;; 39 #else 40 # define CLOBBER(clob) /* nothing */ 41 #endif 42 43 #define MOV_FROM_IFA(reg) \ 44 mov reg = cr.ifa 45 46 #define MOV_FROM_ITIR(reg) \ 47 mov reg = cr.itir 48 49 #define MOV_FROM_ISR(reg) \ 50 mov reg = cr.isr 51 52 #define MOV_FROM_IHA(reg) \ 53 mov reg = cr.iha 54 55 #define MOV_FROM_IPSR(pred, reg) \ 56 (pred) mov reg = cr.ipsr 57 58 #define MOV_FROM_IIM(reg) \ 59 mov reg = cr.iim 60 61 #define MOV_FROM_IIP(reg) \ 62 mov reg = cr.iip 63 64 #define MOV_FROM_IVR(reg, clob) \ 65 mov reg = cr.ivr \ 66 CLOBBER(clob) 67 68 #define MOV_FROM_PSR(pred, reg, clob) \ 69 (pred) mov reg = psr \ 70 CLOBBER(clob) 71 72 #define MOV_TO_IFA(reg, clob) \ 73 mov cr.ifa = reg \ 74 CLOBBER(clob) 75 76 #define MOV_TO_ITIR(pred, reg, clob) \ 77 (pred) mov cr.itir = reg \ 78 CLOBBER(clob) 79 80 #define MOV_TO_IHA(pred, reg, clob) \ 81 (pred) mov cr.iha = reg \ 82 CLOBBER(clob) 83 84 #define MOV_TO_IPSR(pred, reg, clob) \ 85 (pred) mov cr.ipsr = reg \ 86 CLOBBER(clob) 87 88 #define MOV_TO_IFS(pred, reg, clob) \ 89 (pred) mov cr.ifs = reg \ 90 CLOBBER(clob) 91 92 #define MOV_TO_IIP(reg, clob) \ 93 mov cr.iip = reg \ 94 CLOBBER(clob) 95 96 #define MOV_TO_KR(kr, reg, clob0, clob1) \ 97 mov IA64_KR(kr) = reg \ 98 CLOBBER(clob0) \ 99 CLOBBER(clob1) 100 101 #define ITC_I(pred, reg, clob) \ 102 (pred) itc.i reg \ 103 CLOBBER(clob) 104 105 #define ITC_D(pred, reg, clob) \ 106 (pred) itc.d reg \ 107 CLOBBER(clob) 108 109 #define ITC_I_AND_D(pred_i, pred_d, reg, clob) \ 110 (pred_i) itc.i reg; \ 111 (pred_d) itc.d reg \ 112 CLOBBER(clob) 113 114 #define THASH(pred, reg0, reg1, clob) \ 115 (pred) thash reg0 = reg1 \ 116 CLOBBER(clob) 117 118 #define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \ 119 ssm psr.ic | PSR_DEFAULT_BITS \ 120 CLOBBER(clob0) \ 121 CLOBBER(clob1) \ 122 ;; \ 123 srlz.i /* guarantee that interruption collectin is on */ \ 124 ;; 125 126 #define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \ 127 ssm psr.ic \ 128 CLOBBER(clob0) \ 129 CLOBBER(clob1) \ 130 ;; \ 131 srlz.d 132 133 #define RSM_PSR_IC(clob) \ 134 rsm psr.ic \ 135 CLOBBER(clob) 136 137 #define SSM_PSR_I(pred, pred_clob, clob) \ 138 (pred) ssm psr.i \ 139 CLOBBER(clob) 140 141 #define RSM_PSR_I(pred, clob0, clob1) \ 142 (pred) rsm psr.i \ 143 CLOBBER(clob0) \ 144 CLOBBER(clob1) 145 146 #define RSM_PSR_I_IC(clob0, clob1, clob2) \ 147 rsm psr.i | psr.ic \ 148 CLOBBER(clob0) \ 149 CLOBBER(clob1) \ 150 CLOBBER(clob2) 151 152 #define RSM_PSR_DT \ 153 rsm psr.dt 154 155 #define SSM_PSR_DT_AND_SRLZ_I \ 156 ssm psr.dt \ 157 ;; \ 158 srlz.i 159 160 #define BSW_0(clob0, clob1, clob2) \ 161 bsw.0 \ 162 CLOBBER(clob0) \ 163 CLOBBER(clob1) \ 164 CLOBBER(clob2) 165 166 #define BSW_1(clob0, clob1) \ 167 bsw.1 \ 168 CLOBBER(clob0) \ 169 CLOBBER(clob1) 170 171 #define COVER \ 172 cover 173 174 #define RFI \ 175 rfi 176