1 #ifndef __ASM_IA64_IOSAPIC_H 2 #define __ASM_IA64_IOSAPIC_H 3 4 #define IOSAPIC_REG_SELECT 0x0 5 #define IOSAPIC_WINDOW 0x10 6 #define IOSAPIC_EOI 0x40 7 8 #define IOSAPIC_VERSION 0x1 9 10 /* 11 * Redirection table entry 12 */ 13 #define IOSAPIC_RTE_LOW(i) (0x10+i*2) 14 #define IOSAPIC_RTE_HIGH(i) (0x11+i*2) 15 16 #define IOSAPIC_DEST_SHIFT 16 17 18 /* 19 * Delivery mode 20 */ 21 #define IOSAPIC_DELIVERY_SHIFT 8 22 #define IOSAPIC_FIXED 0x0 23 #define IOSAPIC_LOWEST_PRIORITY 0x1 24 #define IOSAPIC_PMI 0x2 25 #define IOSAPIC_NMI 0x4 26 #define IOSAPIC_INIT 0x5 27 #define IOSAPIC_EXTINT 0x7 28 29 /* 30 * Interrupt polarity 31 */ 32 #define IOSAPIC_POLARITY_SHIFT 13 33 #define IOSAPIC_POL_HIGH 0 34 #define IOSAPIC_POL_LOW 1 35 36 /* 37 * Trigger mode 38 */ 39 #define IOSAPIC_TRIGGER_SHIFT 15 40 #define IOSAPIC_EDGE 0 41 #define IOSAPIC_LEVEL 1 42 43 /* 44 * Mask bit 45 */ 46 47 #define IOSAPIC_MASK_SHIFT 16 48 #define IOSAPIC_MASK (1<<IOSAPIC_MASK_SHIFT) 49 50 #define IOSAPIC_VECTOR_MASK 0xffffff00 51 52 #ifndef __ASSEMBLY__ 53 54 #ifdef CONFIG_IOSAPIC 55 56 #define NR_IOSAPICS 256 57 58 #ifdef CONFIG_PARAVIRT_GUEST 59 #include <asm/paravirt.h> 60 #else 61 #define iosapic_pcat_compat_init ia64_native_iosapic_pcat_compat_init 62 #define __iosapic_read __ia64_native_iosapic_read 63 #define __iosapic_write __ia64_native_iosapic_write 64 #define iosapic_get_irq_chip ia64_native_iosapic_get_irq_chip 65 #endif 66 67 extern void __init ia64_native_iosapic_pcat_compat_init(void); 68 extern struct irq_chip *ia64_native_iosapic_get_irq_chip(unsigned long trigger); 69 70 static inline unsigned int 71 __ia64_native_iosapic_read(char __iomem *iosapic, unsigned int reg) 72 { 73 writel(reg, iosapic + IOSAPIC_REG_SELECT); 74 return readl(iosapic + IOSAPIC_WINDOW); 75 } 76 77 static inline void 78 __ia64_native_iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val) 79 { 80 writel(reg, iosapic + IOSAPIC_REG_SELECT); 81 writel(val, iosapic + IOSAPIC_WINDOW); 82 } 83 84 static inline void iosapic_eoi(char __iomem *iosapic, u32 vector) 85 { 86 writel(vector, iosapic + IOSAPIC_EOI); 87 } 88 89 extern void __init iosapic_system_init (int pcat_compat); 90 extern int iosapic_init (unsigned long address, unsigned int gsi_base); 91 extern int iosapic_remove (unsigned int gsi_base); 92 extern int gsi_to_irq (unsigned int gsi); 93 extern int iosapic_register_intr (unsigned int gsi, unsigned long polarity, 94 unsigned long trigger); 95 extern void iosapic_unregister_intr (unsigned int irq); 96 extern void iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi, 97 unsigned long polarity, 98 unsigned long trigger); 99 extern int __init iosapic_register_platform_intr (u32 int_type, 100 unsigned int gsi, 101 int pmi_vector, 102 u16 eid, u16 id, 103 unsigned long polarity, 104 unsigned long trigger); 105 106 #ifdef CONFIG_NUMA 107 extern void map_iosapic_to_node (unsigned int, int); 108 #endif 109 #else 110 #define iosapic_system_init(pcat_compat) do { } while (0) 111 #define iosapic_init(address,gsi_base) (-EINVAL) 112 #define iosapic_remove(gsi_base) (-ENODEV) 113 #define iosapic_register_intr(gsi,polarity,trigger) (gsi) 114 #define iosapic_unregister_intr(irq) do { } while (0) 115 #define iosapic_override_isa_irq(isa_irq,gsi,polarity,trigger) do { } while (0) 116 #define iosapic_register_platform_intr(type,gsi,pmi,eid,id, \ 117 polarity,trigger) (gsi) 118 #endif 119 120 # endif /* !__ASSEMBLY__ */ 121 #endif /* __ASM_IA64_IOSAPIC_H */ 122