1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_IA64_IO_H 3 #define _ASM_IA64_IO_H 4 5 /* 6 * This file contains the definitions for the emulated IO instructions 7 * inb/inw/inl/outb/outw/outl and the "string versions" of the same 8 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" 9 * versions of the single-IO instructions (inb_p/inw_p/..). 10 * 11 * This file is not meant to be obfuscating: it's just complicated to 12 * (a) handle it all in a way that makes gcc able to optimize it as 13 * well as possible and (b) trying to avoid writing the same thing 14 * over and over again with slight variations and possibly making a 15 * mistake somewhere. 16 * 17 * Copyright (C) 1998-2003 Hewlett-Packard Co 18 * David Mosberger-Tang <davidm@hpl.hp.com> 19 * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com> 20 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com> 21 */ 22 23 #include <asm/unaligned.h> 24 #include <asm/early_ioremap.h> 25 26 /* We don't use IO slowdowns on the ia64, but.. */ 27 #define __SLOW_DOWN_IO do { } while (0) 28 #define SLOW_DOWN_IO do { } while (0) 29 30 #define __IA64_UNCACHED_OFFSET RGN_BASE(RGN_UNCACHED) 31 32 /* 33 * The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but 34 * large machines may have multiple other I/O spaces so we can't place any a priori limit 35 * on IO_SPACE_LIMIT. These additional spaces are described in ACPI. 36 */ 37 #define IO_SPACE_LIMIT 0xffffffffffffffffUL 38 39 #define MAX_IO_SPACES_BITS 8 40 #define MAX_IO_SPACES (1UL << MAX_IO_SPACES_BITS) 41 #define IO_SPACE_BITS 24 42 #define IO_SPACE_SIZE (1UL << IO_SPACE_BITS) 43 44 #define IO_SPACE_NR(port) ((port) >> IO_SPACE_BITS) 45 #define IO_SPACE_BASE(space) ((space) << IO_SPACE_BITS) 46 #define IO_SPACE_PORT(port) ((port) & (IO_SPACE_SIZE - 1)) 47 48 #define IO_SPACE_SPARSE_ENCODING(p) ((((p) >> 2) << 12) | ((p) & 0xfff)) 49 50 struct io_space { 51 unsigned long mmio_base; /* base in MMIO space */ 52 int sparse; 53 }; 54 55 extern struct io_space io_space[]; 56 extern unsigned int num_io_spaces; 57 58 # ifdef __KERNEL__ 59 60 /* 61 * All MMIO iomem cookies are in region 6; anything less is a PIO cookie: 62 * 0xCxxxxxxxxxxxxxxx MMIO cookie (return from ioremap) 63 * 0x000000001SPPPPPP PIO cookie (S=space number, P..P=port) 64 * 65 * ioread/writeX() uses the leading 1 in PIO cookies (PIO_OFFSET) to catch 66 * code that uses bare port numbers without the prerequisite pci_iomap(). 67 */ 68 #define PIO_OFFSET (1UL << (MAX_IO_SPACES_BITS + IO_SPACE_BITS)) 69 #define PIO_MASK (PIO_OFFSET - 1) 70 #define PIO_RESERVED __IA64_UNCACHED_OFFSET 71 #define HAVE_ARCH_PIO_SIZE 72 73 #include <asm/intrinsics.h> 74 #include <asm/page.h> 75 #include <asm-generic/iomap.h> 76 77 /* 78 * Change virtual addresses to physical addresses and vv. 79 */ 80 static inline unsigned long 81 virt_to_phys (volatile void *address) 82 { 83 return (unsigned long) address - PAGE_OFFSET; 84 } 85 #define virt_to_phys virt_to_phys 86 87 static inline void* 88 phys_to_virt (unsigned long address) 89 { 90 return (void *) (address + PAGE_OFFSET); 91 } 92 #define phys_to_virt phys_to_virt 93 94 #define ARCH_HAS_VALID_PHYS_ADDR_RANGE 95 extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size); 96 extern int valid_phys_addr_range (phys_addr_t addr, size_t count); /* efi.c */ 97 extern int valid_mmap_phys_addr_range (unsigned long pfn, size_t count); 98 99 # endif /* KERNEL */ 100 101 /* 102 * Memory fence w/accept. This should never be used in code that is 103 * not IA-64 specific. 104 */ 105 #define __ia64_mf_a() ia64_mfa() 106 107 static inline void* 108 __ia64_mk_io_addr (unsigned long port) 109 { 110 struct io_space *space; 111 unsigned long offset; 112 113 space = &io_space[IO_SPACE_NR(port)]; 114 port = IO_SPACE_PORT(port); 115 if (space->sparse) 116 offset = IO_SPACE_SPARSE_ENCODING(port); 117 else 118 offset = port; 119 120 return (void *) (space->mmio_base | offset); 121 } 122 123 /* 124 * For the in/out routines, we need to do "mf.a" _after_ doing the I/O access to ensure 125 * that the access has completed before executing other I/O accesses. Since we're doing 126 * the accesses through an uncachable (UC) translation, the CPU will execute them in 127 * program order. However, we still need to tell the compiler not to shuffle them around 128 * during optimization, which is why we use "volatile" pointers. 129 */ 130 131 #define inb inb 132 static inline unsigned int inb(unsigned long port) 133 { 134 volatile unsigned char *addr = __ia64_mk_io_addr(port); 135 unsigned char ret; 136 137 ret = *addr; 138 __ia64_mf_a(); 139 return ret; 140 } 141 142 #define inw inw 143 static inline unsigned int inw(unsigned long port) 144 { 145 volatile unsigned short *addr = __ia64_mk_io_addr(port); 146 unsigned short ret; 147 148 ret = *addr; 149 __ia64_mf_a(); 150 return ret; 151 } 152 153 #define inl inl 154 static inline unsigned int inl(unsigned long port) 155 { 156 volatile unsigned int *addr = __ia64_mk_io_addr(port); 157 unsigned int ret; 158 159 ret = *addr; 160 __ia64_mf_a(); 161 return ret; 162 } 163 164 #define outb outb 165 static inline void outb(unsigned char val, unsigned long port) 166 { 167 volatile unsigned char *addr = __ia64_mk_io_addr(port); 168 169 *addr = val; 170 __ia64_mf_a(); 171 } 172 173 #define outw outw 174 static inline void outw(unsigned short val, unsigned long port) 175 { 176 volatile unsigned short *addr = __ia64_mk_io_addr(port); 177 178 *addr = val; 179 __ia64_mf_a(); 180 } 181 182 #define outl outl 183 static inline void outl(unsigned int val, unsigned long port) 184 { 185 volatile unsigned int *addr = __ia64_mk_io_addr(port); 186 187 *addr = val; 188 __ia64_mf_a(); 189 } 190 191 #define insb insb 192 static inline void insb(unsigned long port, void *dst, unsigned long count) 193 { 194 unsigned char *dp = dst; 195 196 while (count--) 197 *dp++ = inb(port); 198 } 199 200 #define insw insw 201 static inline void insw(unsigned long port, void *dst, unsigned long count) 202 { 203 unsigned short *dp = dst; 204 205 while (count--) 206 put_unaligned(inw(port), dp++); 207 } 208 209 #define insl insl 210 static inline void insl(unsigned long port, void *dst, unsigned long count) 211 { 212 unsigned int *dp = dst; 213 214 while (count--) 215 put_unaligned(inl(port), dp++); 216 } 217 218 #define outsb outsb 219 static inline void outsb(unsigned long port, const void *src, 220 unsigned long count) 221 { 222 const unsigned char *sp = src; 223 224 while (count--) 225 outb(*sp++, port); 226 } 227 228 #define outsw outsw 229 static inline void outsw(unsigned long port, const void *src, 230 unsigned long count) 231 { 232 const unsigned short *sp = src; 233 234 while (count--) 235 outw(get_unaligned(sp++), port); 236 } 237 238 #define outsl outsl 239 static inline void outsl(unsigned long port, const void *src, 240 unsigned long count) 241 { 242 const unsigned int *sp = src; 243 244 while (count--) 245 outl(get_unaligned(sp++), port); 246 } 247 248 # ifdef __KERNEL__ 249 250 extern void __iomem * ioremap(unsigned long offset, unsigned long size); 251 extern void __iomem * ioremap_uc(unsigned long offset, unsigned long size); 252 extern void iounmap (volatile void __iomem *addr); 253 static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned long size) 254 { 255 return ioremap(phys_addr, size); 256 } 257 #define ioremap ioremap 258 #define ioremap_cache ioremap_cache 259 #define ioremap_uc ioremap_uc 260 #define iounmap iounmap 261 262 /* 263 * String version of IO memory access ops: 264 */ 265 extern void memcpy_fromio(void *dst, const volatile void __iomem *src, long n); 266 extern void memcpy_toio(volatile void __iomem *dst, const void *src, long n); 267 extern void memset_io(volatile void __iomem *s, int c, long n); 268 269 #define memcpy_fromio memcpy_fromio 270 #define memcpy_toio memcpy_toio 271 #define memset_io memset_io 272 #define xlate_dev_mem_ptr xlate_dev_mem_ptr 273 #include <asm-generic/io.h> 274 #undef PCI_IOBASE 275 276 # endif /* __KERNEL__ */ 277 278 #endif /* _ASM_IA64_IO_H */ 279