1 /* 2 * Cache management functions for Hexagon 3 * 4 * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 and 8 * only version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 18 * 02110-1301, USA. 19 */ 20 21 #include <linux/mm.h> 22 #include <asm/cacheflush.h> 23 #include <asm/hexagon_vm.h> 24 25 #define spanlines(start, end) \ 26 (((end - (start & ~(LINESIZE - 1))) >> LINEBITS) + 1) 27 28 void flush_dcache_range(unsigned long start, unsigned long end) 29 { 30 unsigned long lines = spanlines(start, end-1); 31 unsigned long i, flags; 32 33 start &= ~(LINESIZE - 1); 34 35 local_irq_save(flags); 36 37 for (i = 0; i < lines; i++) { 38 __asm__ __volatile__ ( 39 " dccleaninva(%0); " 40 : 41 : "r" (start) 42 ); 43 start += LINESIZE; 44 } 45 local_irq_restore(flags); 46 } 47 48 void flush_icache_range(unsigned long start, unsigned long end) 49 { 50 unsigned long lines = spanlines(start, end-1); 51 unsigned long i, flags; 52 53 start &= ~(LINESIZE - 1); 54 55 local_irq_save(flags); 56 57 for (i = 0; i < lines; i++) { 58 __asm__ __volatile__ ( 59 " dccleana(%0); " 60 " icinva(%0); " 61 : 62 : "r" (start) 63 ); 64 start += LINESIZE; 65 } 66 __asm__ __volatile__ ( 67 "isync" 68 ); 69 local_irq_restore(flags); 70 } 71 72 void hexagon_clean_dcache_range(unsigned long start, unsigned long end) 73 { 74 unsigned long lines = spanlines(start, end-1); 75 unsigned long i, flags; 76 77 start &= ~(LINESIZE - 1); 78 79 local_irq_save(flags); 80 81 for (i = 0; i < lines; i++) { 82 __asm__ __volatile__ ( 83 " dccleana(%0); " 84 : 85 : "r" (start) 86 ); 87 start += LINESIZE; 88 } 89 local_irq_restore(flags); 90 } 91 92 void hexagon_inv_dcache_range(unsigned long start, unsigned long end) 93 { 94 unsigned long lines = spanlines(start, end-1); 95 unsigned long i, flags; 96 97 start &= ~(LINESIZE - 1); 98 99 local_irq_save(flags); 100 101 for (i = 0; i < lines; i++) { 102 __asm__ __volatile__ ( 103 " dcinva(%0); " 104 : 105 : "r" (start) 106 ); 107 start += LINESIZE; 108 } 109 local_irq_restore(flags); 110 } 111 112 113 114 115 /* 116 * This is just really brutal and shouldn't be used anyways, 117 * especially on V2. Left here just in case. 118 */ 119 void flush_cache_all_hexagon(void) 120 { 121 unsigned long flags; 122 local_irq_save(flags); 123 __vmcache_ickill(); 124 __vmcache_dckill(); 125 __vmcache_l2kill(); 126 local_irq_restore(flags); 127 mb(); 128 } 129