108dbd0f8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 265c3d7c5SRichard Kuo /* 365c3d7c5SRichard Kuo * DMA implementation for Hexagon 465c3d7c5SRichard Kuo * 55e115054SRichard Kuo * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved. 665c3d7c5SRichard Kuo */ 765c3d7c5SRichard Kuo 89f4df96bSChristoph Hellwig #include <linux/dma-map-ops.h> 957c8a661SMike Rapoport #include <linux/memblock.h> 105e115054SRichard Kuo #include <asm/page.h> 1165c3d7c5SRichard Kuo arch_sync_dma_for_device(phys_addr_t paddr,size_t size,enum dma_data_direction dir)1256e35f9cSChristoph Hellwigvoid arch_sync_dma_for_device(phys_addr_t paddr, size_t size, 1356e35f9cSChristoph Hellwig enum dma_data_direction dir) 1465c3d7c5SRichard Kuo { 15e0a9317dSChristoph Hellwig void *addr = phys_to_virt(paddr); 1665c3d7c5SRichard Kuo 1765c3d7c5SRichard Kuo switch (dir) { 1865c3d7c5SRichard Kuo case DMA_TO_DEVICE: 1965c3d7c5SRichard Kuo hexagon_clean_dcache_range((unsigned long) addr, 2065c3d7c5SRichard Kuo (unsigned long) addr + size); 2165c3d7c5SRichard Kuo break; 2265c3d7c5SRichard Kuo case DMA_FROM_DEVICE: 2365c3d7c5SRichard Kuo hexagon_inv_dcache_range((unsigned long) addr, 2465c3d7c5SRichard Kuo (unsigned long) addr + size); 2565c3d7c5SRichard Kuo break; 2665c3d7c5SRichard Kuo case DMA_BIDIRECTIONAL: 2765c3d7c5SRichard Kuo flush_dcache_range((unsigned long) addr, 2865c3d7c5SRichard Kuo (unsigned long) addr + size); 2965c3d7c5SRichard Kuo break; 3065c3d7c5SRichard Kuo default: 3165c3d7c5SRichard Kuo BUG(); 3265c3d7c5SRichard Kuo } 3365c3d7c5SRichard Kuo } 34*c1dec343SChristoph Hellwig 35*c1dec343SChristoph Hellwig /* 36*c1dec343SChristoph Hellwig * Our max_low_pfn should have been backed off by 16MB in mm/init.c to create 37*c1dec343SChristoph Hellwig * DMA coherent space. Use that for the pool. 38*c1dec343SChristoph Hellwig */ hexagon_dma_init(void)39*c1dec343SChristoph Hellwigstatic int __init hexagon_dma_init(void) 40*c1dec343SChristoph Hellwig { 41*c1dec343SChristoph Hellwig return dma_init_global_coherent(PFN_PHYS(max_low_pfn), 42*c1dec343SChristoph Hellwig hexagon_coherent_pool_size); 43*c1dec343SChristoph Hellwig } 44*c1dec343SChristoph Hellwig core_initcall(hexagon_dma_init); 45