1 /* 2 * Bit operations for the Hexagon architecture 3 * 4 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. 5 * 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 and 9 * only version 2 as published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 19 * 02110-1301, USA. 20 */ 21 22 #ifndef _ASM_BITOPS_H 23 #define _ASM_BITOPS_H 24 25 #include <linux/compiler.h> 26 #include <asm/byteorder.h> 27 #include <asm/atomic.h> 28 #include <asm/barrier.h> 29 30 #ifdef __KERNEL__ 31 32 /* 33 * The offset calculations for these are based on BITS_PER_LONG == 32 34 * (i.e. I get to shift by #5-2 (32 bits per long, 4 bytes per access), 35 * mask by 0x0000001F) 36 * 37 * Typically, R10 is clobbered for address, R11 bit nr, and R12 is temp 38 */ 39 40 /** 41 * test_and_clear_bit - clear a bit and return its old value 42 * @nr: bit number to clear 43 * @addr: pointer to memory 44 */ 45 static inline int test_and_clear_bit(int nr, volatile void *addr) 46 { 47 int oldval; 48 49 __asm__ __volatile__ ( 50 " {R10 = %1; R11 = asr(%2,#5); }\n" 51 " {R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n" 52 "1: R12 = memw_locked(R10);\n" 53 " { P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n" 54 " memw_locked(R10,P1) = R12;\n" 55 " {if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n" 56 : "=&r" (oldval) 57 : "r" (addr), "r" (nr) 58 : "r10", "r11", "r12", "p0", "p1", "memory" 59 ); 60 61 return oldval; 62 } 63 64 /** 65 * test_and_set_bit - set a bit and return its old value 66 * @nr: bit number to set 67 * @addr: pointer to memory 68 */ 69 static inline int test_and_set_bit(int nr, volatile void *addr) 70 { 71 int oldval; 72 73 __asm__ __volatile__ ( 74 " {R10 = %1; R11 = asr(%2,#5); }\n" 75 " {R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n" 76 "1: R12 = memw_locked(R10);\n" 77 " { P0 = tstbit(R12,R11); R12 = setbit(R12,R11); }\n" 78 " memw_locked(R10,P1) = R12;\n" 79 " {if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n" 80 : "=&r" (oldval) 81 : "r" (addr), "r" (nr) 82 : "r10", "r11", "r12", "p0", "p1", "memory" 83 ); 84 85 86 return oldval; 87 88 } 89 90 /** 91 * test_and_change_bit - toggle a bit and return its old value 92 * @nr: bit number to set 93 * @addr: pointer to memory 94 */ 95 static inline int test_and_change_bit(int nr, volatile void *addr) 96 { 97 int oldval; 98 99 __asm__ __volatile__ ( 100 " {R10 = %1; R11 = asr(%2,#5); }\n" 101 " {R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n" 102 "1: R12 = memw_locked(R10);\n" 103 " { P0 = tstbit(R12,R11); R12 = togglebit(R12,R11); }\n" 104 " memw_locked(R10,P1) = R12;\n" 105 " {if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n" 106 : "=&r" (oldval) 107 : "r" (addr), "r" (nr) 108 : "r10", "r11", "r12", "p0", "p1", "memory" 109 ); 110 111 return oldval; 112 113 } 114 115 /* 116 * Atomic, but doesn't care about the return value. 117 * Rewrite later to save a cycle or two. 118 */ 119 120 static inline void clear_bit(int nr, volatile void *addr) 121 { 122 test_and_clear_bit(nr, addr); 123 } 124 125 static inline void set_bit(int nr, volatile void *addr) 126 { 127 test_and_set_bit(nr, addr); 128 } 129 130 static inline void change_bit(int nr, volatile void *addr) 131 { 132 test_and_change_bit(nr, addr); 133 } 134 135 136 /* 137 * These are allowed to be non-atomic. In fact the generic flavors are 138 * in non-atomic.h. Would it be better to use intrinsics for this? 139 * 140 * OK, writes in our architecture do not invalidate LL/SC, so this has to 141 * be atomic, particularly for things like slab_lock and slab_unlock. 142 * 143 */ 144 static inline void __clear_bit(int nr, volatile unsigned long *addr) 145 { 146 test_and_clear_bit(nr, addr); 147 } 148 149 static inline void __set_bit(int nr, volatile unsigned long *addr) 150 { 151 test_and_set_bit(nr, addr); 152 } 153 154 static inline void __change_bit(int nr, volatile unsigned long *addr) 155 { 156 test_and_change_bit(nr, addr); 157 } 158 159 /* Apparently, at least some of these are allowed to be non-atomic */ 160 static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr) 161 { 162 return test_and_clear_bit(nr, addr); 163 } 164 165 static inline int __test_and_set_bit(int nr, volatile unsigned long *addr) 166 { 167 return test_and_set_bit(nr, addr); 168 } 169 170 static inline int __test_and_change_bit(int nr, volatile unsigned long *addr) 171 { 172 return test_and_change_bit(nr, addr); 173 } 174 175 static inline int __test_bit(int nr, const volatile unsigned long *addr) 176 { 177 int retval; 178 179 asm volatile( 180 "{P0 = tstbit(%1,%2); if (P0.new) %0 = #1; if (!P0.new) %0 = #0;}\n" 181 : "=&r" (retval) 182 : "r" (addr[BIT_WORD(nr)]), "r" (nr % BITS_PER_LONG) 183 : "p0" 184 ); 185 186 return retval; 187 } 188 189 #define test_bit(nr, addr) __test_bit(nr, addr) 190 191 /* 192 * ffz - find first zero in word. 193 * @word: The word to search 194 * 195 * Undefined if no zero exists, so code should check against ~0UL first. 196 */ 197 static inline long ffz(int x) 198 { 199 int r; 200 201 asm("%0 = ct1(%1);\n" 202 : "=&r" (r) 203 : "r" (x)); 204 return r; 205 } 206 207 /* 208 * fls - find last (most-significant) bit set 209 * @x: the word to search 210 * 211 * This is defined the same way as ffs. 212 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. 213 */ 214 static inline long fls(int x) 215 { 216 int r; 217 218 asm("{ %0 = cl0(%1);}\n" 219 "%0 = sub(#32,%0);\n" 220 : "=&r" (r) 221 : "r" (x) 222 : "p0"); 223 224 return r; 225 } 226 227 /* 228 * ffs - find first bit set 229 * @x: the word to search 230 * 231 * This is defined the same way as 232 * the libc and compiler builtin ffs routines, therefore 233 * differs in spirit from the above ffz (man ffs). 234 */ 235 static inline long ffs(int x) 236 { 237 int r; 238 239 asm("{ P0 = cmp.eq(%1,#0); %0 = ct0(%1);}\n" 240 "{ if P0 %0 = #0; if !P0 %0 = add(%0,#1);}\n" 241 : "=&r" (r) 242 : "r" (x) 243 : "p0"); 244 245 return r; 246 } 247 248 /* 249 * __ffs - find first bit in word. 250 * @word: The word to search 251 * 252 * Undefined if no bit exists, so code should check against 0 first. 253 * 254 * bits_per_long assumed to be 32 255 * numbering starts at 0 I think (instead of 1 like ffs) 256 */ 257 static inline unsigned long __ffs(unsigned long word) 258 { 259 int num; 260 261 asm("%0 = ct0(%1);\n" 262 : "=&r" (num) 263 : "r" (word)); 264 265 return num; 266 } 267 268 /* 269 * __fls - find last (most-significant) set bit in a long word 270 * @word: the word to search 271 * 272 * Undefined if no set bit exists, so code should check against 0 first. 273 * bits_per_long assumed to be 32 274 */ 275 static inline unsigned long __fls(unsigned long word) 276 { 277 int num; 278 279 asm("%0 = cl0(%1);\n" 280 "%0 = sub(#31,%0);\n" 281 : "=&r" (num) 282 : "r" (word)); 283 284 return num; 285 } 286 287 #include <asm-generic/bitops/lock.h> 288 #include <asm-generic/bitops/find.h> 289 290 #include <asm-generic/bitops/fls64.h> 291 #include <asm-generic/bitops/sched.h> 292 #include <asm-generic/bitops/hweight.h> 293 294 #include <asm-generic/bitops/le.h> 295 #include <asm-generic/bitops/ext2-atomic.h> 296 297 #endif /* __KERNEL__ */ 298 #endif 299