1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Bit operations for the Hexagon architecture 4 * 5 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. 6 */ 7 8 #ifndef _ASM_BITOPS_H 9 #define _ASM_BITOPS_H 10 11 #include <linux/compiler.h> 12 #include <asm/byteorder.h> 13 #include <asm/atomic.h> 14 #include <asm/barrier.h> 15 16 #ifdef __KERNEL__ 17 18 /* 19 * The offset calculations for these are based on BITS_PER_LONG == 32 20 * (i.e. I get to shift by #5-2 (32 bits per long, 4 bytes per access), 21 * mask by 0x0000001F) 22 * 23 * Typically, R10 is clobbered for address, R11 bit nr, and R12 is temp 24 */ 25 26 /** 27 * test_and_clear_bit - clear a bit and return its old value 28 * @nr: bit number to clear 29 * @addr: pointer to memory 30 */ 31 static inline int test_and_clear_bit(int nr, volatile void *addr) 32 { 33 int oldval; 34 35 __asm__ __volatile__ ( 36 " {R10 = %1; R11 = asr(%2,#5); }\n" 37 " {R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n" 38 "1: R12 = memw_locked(R10);\n" 39 " { P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n" 40 " memw_locked(R10,P1) = R12;\n" 41 " {if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n" 42 : "=&r" (oldval) 43 : "r" (addr), "r" (nr) 44 : "r10", "r11", "r12", "p0", "p1", "memory" 45 ); 46 47 return oldval; 48 } 49 50 /** 51 * test_and_set_bit - set a bit and return its old value 52 * @nr: bit number to set 53 * @addr: pointer to memory 54 */ 55 static inline int test_and_set_bit(int nr, volatile void *addr) 56 { 57 int oldval; 58 59 __asm__ __volatile__ ( 60 " {R10 = %1; R11 = asr(%2,#5); }\n" 61 " {R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n" 62 "1: R12 = memw_locked(R10);\n" 63 " { P0 = tstbit(R12,R11); R12 = setbit(R12,R11); }\n" 64 " memw_locked(R10,P1) = R12;\n" 65 " {if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n" 66 : "=&r" (oldval) 67 : "r" (addr), "r" (nr) 68 : "r10", "r11", "r12", "p0", "p1", "memory" 69 ); 70 71 72 return oldval; 73 74 } 75 76 /** 77 * test_and_change_bit - toggle a bit and return its old value 78 * @nr: bit number to set 79 * @addr: pointer to memory 80 */ 81 static inline int test_and_change_bit(int nr, volatile void *addr) 82 { 83 int oldval; 84 85 __asm__ __volatile__ ( 86 " {R10 = %1; R11 = asr(%2,#5); }\n" 87 " {R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n" 88 "1: R12 = memw_locked(R10);\n" 89 " { P0 = tstbit(R12,R11); R12 = togglebit(R12,R11); }\n" 90 " memw_locked(R10,P1) = R12;\n" 91 " {if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n" 92 : "=&r" (oldval) 93 : "r" (addr), "r" (nr) 94 : "r10", "r11", "r12", "p0", "p1", "memory" 95 ); 96 97 return oldval; 98 99 } 100 101 /* 102 * Atomic, but doesn't care about the return value. 103 * Rewrite later to save a cycle or two. 104 */ 105 106 static inline void clear_bit(int nr, volatile void *addr) 107 { 108 test_and_clear_bit(nr, addr); 109 } 110 111 static inline void set_bit(int nr, volatile void *addr) 112 { 113 test_and_set_bit(nr, addr); 114 } 115 116 static inline void change_bit(int nr, volatile void *addr) 117 { 118 test_and_change_bit(nr, addr); 119 } 120 121 122 /* 123 * These are allowed to be non-atomic. In fact the generic flavors are 124 * in non-atomic.h. Would it be better to use intrinsics for this? 125 * 126 * OK, writes in our architecture do not invalidate LL/SC, so this has to 127 * be atomic, particularly for things like slab_lock and slab_unlock. 128 * 129 */ 130 static __always_inline void 131 arch___clear_bit(unsigned long nr, volatile unsigned long *addr) 132 { 133 test_and_clear_bit(nr, addr); 134 } 135 136 static __always_inline void 137 arch___set_bit(unsigned long nr, volatile unsigned long *addr) 138 { 139 test_and_set_bit(nr, addr); 140 } 141 142 static __always_inline void 143 arch___change_bit(unsigned long nr, volatile unsigned long *addr) 144 { 145 test_and_change_bit(nr, addr); 146 } 147 148 /* Apparently, at least some of these are allowed to be non-atomic */ 149 static __always_inline bool 150 arch___test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) 151 { 152 return test_and_clear_bit(nr, addr); 153 } 154 155 static __always_inline bool 156 arch___test_and_set_bit(unsigned long nr, volatile unsigned long *addr) 157 { 158 return test_and_set_bit(nr, addr); 159 } 160 161 static __always_inline bool 162 arch___test_and_change_bit(unsigned long nr, volatile unsigned long *addr) 163 { 164 return test_and_change_bit(nr, addr); 165 } 166 167 static __always_inline bool 168 arch_test_bit(unsigned long nr, const volatile unsigned long *addr) 169 { 170 int retval; 171 172 asm volatile( 173 "{P0 = tstbit(%1,%2); if (P0.new) %0 = #1; if (!P0.new) %0 = #0;}\n" 174 : "=&r" (retval) 175 : "r" (addr[BIT_WORD(nr)]), "r" (nr % BITS_PER_LONG) 176 : "p0" 177 ); 178 179 return retval; 180 } 181 182 /* 183 * ffz - find first zero in word. 184 * @word: The word to search 185 * 186 * Undefined if no zero exists, so code should check against ~0UL first. 187 */ 188 static inline long ffz(int x) 189 { 190 int r; 191 192 asm("%0 = ct1(%1);\n" 193 : "=&r" (r) 194 : "r" (x)); 195 return r; 196 } 197 198 /* 199 * fls - find last (most-significant) bit set 200 * @x: the word to search 201 * 202 * This is defined the same way as ffs. 203 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. 204 */ 205 static inline int fls(unsigned int x) 206 { 207 int r; 208 209 asm("{ %0 = cl0(%1);}\n" 210 "%0 = sub(#32,%0);\n" 211 : "=&r" (r) 212 : "r" (x) 213 : "p0"); 214 215 return r; 216 } 217 218 /* 219 * ffs - find first bit set 220 * @x: the word to search 221 * 222 * This is defined the same way as 223 * the libc and compiler builtin ffs routines, therefore 224 * differs in spirit from the above ffz (man ffs). 225 */ 226 static inline int ffs(int x) 227 { 228 int r; 229 230 asm("{ P0 = cmp.eq(%1,#0); %0 = ct0(%1);}\n" 231 "{ if (P0) %0 = #0; if (!P0) %0 = add(%0,#1);}\n" 232 : "=&r" (r) 233 : "r" (x) 234 : "p0"); 235 236 return r; 237 } 238 239 /* 240 * __ffs - find first bit in word. 241 * @word: The word to search 242 * 243 * Undefined if no bit exists, so code should check against 0 first. 244 * 245 * bits_per_long assumed to be 32 246 * numbering starts at 0 I think (instead of 1 like ffs) 247 */ 248 static inline unsigned long __ffs(unsigned long word) 249 { 250 int num; 251 252 asm("%0 = ct0(%1);\n" 253 : "=&r" (num) 254 : "r" (word)); 255 256 return num; 257 } 258 259 /* 260 * __fls - find last (most-significant) set bit in a long word 261 * @word: the word to search 262 * 263 * Undefined if no set bit exists, so code should check against 0 first. 264 * bits_per_long assumed to be 32 265 */ 266 static inline unsigned long __fls(unsigned long word) 267 { 268 int num; 269 270 asm("%0 = cl0(%1);\n" 271 "%0 = sub(#31,%0);\n" 272 : "=&r" (num) 273 : "r" (word)); 274 275 return num; 276 } 277 278 #include <asm-generic/bitops/lock.h> 279 #include <asm-generic/bitops/non-instrumented-non-atomic.h> 280 281 #include <asm-generic/bitops/fls64.h> 282 #include <asm-generic/bitops/sched.h> 283 #include <asm-generic/bitops/hweight.h> 284 285 #include <asm-generic/bitops/le.h> 286 #include <asm-generic/bitops/ext2-atomic.h> 287 288 #endif /* __KERNEL__ */ 289 #endif 290