1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. 3 4 #include <linux/cache.h> 5 #include <linux/dma-mapping.h> 6 #include <linux/dma-contiguous.h> 7 #include <linux/dma-noncoherent.h> 8 #include <linux/genalloc.h> 9 #include <linux/highmem.h> 10 #include <linux/io.h> 11 #include <linux/mm.h> 12 #include <linux/scatterlist.h> 13 #include <linux/types.h> 14 #include <linux/version.h> 15 #include <asm/cache.h> 16 17 void arch_dma_prep_coherent(struct page *page, size_t size) 18 { 19 if (PageHighMem(page)) { 20 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; 21 22 do { 23 void *ptr = kmap_atomic(page); 24 size_t _size = (size < PAGE_SIZE) ? size : PAGE_SIZE; 25 26 memset(ptr, 0, _size); 27 dma_wbinv_range((unsigned long)ptr, 28 (unsigned long)ptr + _size); 29 30 kunmap_atomic(ptr); 31 32 page++; 33 size -= PAGE_SIZE; 34 count--; 35 } while (count); 36 } else { 37 void *ptr = page_address(page); 38 39 memset(ptr, 0, size); 40 dma_wbinv_range((unsigned long)ptr, (unsigned long)ptr + size); 41 } 42 } 43 44 static inline void cache_op(phys_addr_t paddr, size_t size, 45 void (*fn)(unsigned long start, unsigned long end)) 46 { 47 struct page *page = pfn_to_page(paddr >> PAGE_SHIFT); 48 unsigned int offset = paddr & ~PAGE_MASK; 49 size_t left = size; 50 unsigned long start; 51 52 do { 53 size_t len = left; 54 55 if (PageHighMem(page)) { 56 void *addr; 57 58 if (offset + len > PAGE_SIZE) { 59 if (offset >= PAGE_SIZE) { 60 page += offset >> PAGE_SHIFT; 61 offset &= ~PAGE_MASK; 62 } 63 len = PAGE_SIZE - offset; 64 } 65 66 addr = kmap_atomic(page); 67 start = (unsigned long)(addr + offset); 68 fn(start, start + len); 69 kunmap_atomic(addr); 70 } else { 71 start = (unsigned long)phys_to_virt(paddr); 72 fn(start, start + size); 73 } 74 offset = 0; 75 page++; 76 left -= len; 77 } while (left); 78 } 79 80 void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr, 81 size_t size, enum dma_data_direction dir) 82 { 83 switch (dir) { 84 case DMA_TO_DEVICE: 85 cache_op(paddr, size, dma_wb_range); 86 break; 87 case DMA_FROM_DEVICE: 88 case DMA_BIDIRECTIONAL: 89 cache_op(paddr, size, dma_wbinv_range); 90 break; 91 default: 92 BUG(); 93 } 94 } 95 96 void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr, 97 size_t size, enum dma_data_direction dir) 98 { 99 switch (dir) { 100 case DMA_TO_DEVICE: 101 cache_op(paddr, size, dma_wb_range); 102 break; 103 case DMA_FROM_DEVICE: 104 case DMA_BIDIRECTIONAL: 105 cache_op(paddr, size, dma_wbinv_range); 106 break; 107 default: 108 BUG(); 109 } 110 } 111