1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. 3 4 #include <linux/spinlock.h> 5 #include <linux/smp.h> 6 #include <asm/cache.h> 7 #include <asm/barrier.h> 8 9 inline void dcache_wb_line(unsigned long start) 10 { 11 asm volatile("dcache.cval1 %0\n"::"r"(start):"memory"); 12 sync_is(); 13 } 14 15 void icache_inv_range(unsigned long start, unsigned long end) 16 { 17 unsigned long i = start & ~(L1_CACHE_BYTES - 1); 18 19 for (; i < end; i += L1_CACHE_BYTES) 20 asm volatile("icache.iva %0\n"::"r"(i):"memory"); 21 sync_is(); 22 } 23 24 void icache_inv_all(void) 25 { 26 asm volatile("icache.ialls\n":::"memory"); 27 sync_is(); 28 } 29 30 void dcache_wb_range(unsigned long start, unsigned long end) 31 { 32 unsigned long i = start & ~(L1_CACHE_BYTES - 1); 33 34 for (; i < end; i += L1_CACHE_BYTES) 35 asm volatile("dcache.cval1 %0\n"::"r"(i):"memory"); 36 sync_is(); 37 } 38 39 void dcache_inv_range(unsigned long start, unsigned long end) 40 { 41 unsigned long i = start & ~(L1_CACHE_BYTES - 1); 42 43 for (; i < end; i += L1_CACHE_BYTES) 44 asm volatile("dcache.civa %0\n"::"r"(i):"memory"); 45 sync_is(); 46 } 47 48 void cache_wbinv_range(unsigned long start, unsigned long end) 49 { 50 unsigned long i = start & ~(L1_CACHE_BYTES - 1); 51 52 for (; i < end; i += L1_CACHE_BYTES) 53 asm volatile("dcache.cval1 %0\n"::"r"(i):"memory"); 54 sync_is(); 55 56 i = start & ~(L1_CACHE_BYTES - 1); 57 for (; i < end; i += L1_CACHE_BYTES) 58 asm volatile("icache.iva %0\n"::"r"(i):"memory"); 59 sync_is(); 60 } 61 EXPORT_SYMBOL(cache_wbinv_range); 62 63 void dma_wbinv_range(unsigned long start, unsigned long end) 64 { 65 unsigned long i = start & ~(L1_CACHE_BYTES - 1); 66 67 for (; i < end; i += L1_CACHE_BYTES) 68 asm volatile("dcache.civa %0\n"::"r"(i):"memory"); 69 sync_is(); 70 } 71 72 void dma_inv_range(unsigned long start, unsigned long end) 73 { 74 unsigned long i = start & ~(L1_CACHE_BYTES - 1); 75 76 for (; i < end; i += L1_CACHE_BYTES) 77 asm volatile("dcache.iva %0\n"::"r"(i):"memory"); 78 sync_is(); 79 } 80 81 void dma_wb_range(unsigned long start, unsigned long end) 82 { 83 unsigned long i = start & ~(L1_CACHE_BYTES - 1); 84 85 for (; i < end; i += L1_CACHE_BYTES) 86 asm volatile("dcache.cva %0\n"::"r"(i):"memory"); 87 sync_is(); 88 } 89