1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. 3 4 #include <linux/console.h> 5 #include <linux/memblock.h> 6 #include <linux/initrd.h> 7 #include <linux/of.h> 8 #include <linux/of_fdt.h> 9 #include <linux/start_kernel.h> 10 #include <linux/dma-contiguous.h> 11 #include <linux/screen_info.h> 12 #include <asm/sections.h> 13 #include <asm/mmu_context.h> 14 #include <asm/pgalloc.h> 15 16 #ifdef CONFIG_DUMMY_CONSOLE 17 struct screen_info screen_info = { 18 .orig_video_lines = 30, 19 .orig_video_cols = 80, 20 .orig_video_mode = 0, 21 .orig_video_ega_bx = 0, 22 .orig_video_isVGA = 1, 23 .orig_video_points = 8 24 }; 25 #endif 26 27 static void __init csky_memblock_init(void) 28 { 29 unsigned long zone_size[MAX_NR_ZONES]; 30 signed long size; 31 32 memblock_reserve(__pa(_stext), _end - _stext); 33 34 early_init_fdt_reserve_self(); 35 early_init_fdt_scan_reserved_mem(); 36 37 memblock_dump_all(); 38 39 memset(zone_size, 0, sizeof(zone_size)); 40 41 min_low_pfn = PFN_UP(memblock_start_of_DRAM()); 42 max_low_pfn = max_pfn = PFN_DOWN(memblock_end_of_DRAM()); 43 44 size = max_pfn - min_low_pfn; 45 46 if (size <= PFN_DOWN(SSEG_SIZE - PHYS_OFFSET_OFFSET)) 47 zone_size[ZONE_NORMAL] = size; 48 else if (size < PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET)) { 49 zone_size[ZONE_NORMAL] = 50 PFN_DOWN(SSEG_SIZE - PHYS_OFFSET_OFFSET); 51 max_low_pfn = min_low_pfn + zone_size[ZONE_NORMAL]; 52 } else { 53 zone_size[ZONE_NORMAL] = 54 PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET); 55 max_low_pfn = min_low_pfn + zone_size[ZONE_NORMAL]; 56 write_mmu_msa1(read_mmu_msa0() + SSEG_SIZE); 57 } 58 59 #ifdef CONFIG_HIGHMEM 60 zone_size[ZONE_HIGHMEM] = max_pfn - max_low_pfn; 61 62 highstart_pfn = max_low_pfn; 63 highend_pfn = max_pfn; 64 #endif 65 memblock_set_current_limit(PFN_PHYS(max_low_pfn)); 66 67 dma_contiguous_reserve(0); 68 69 free_area_init_node(0, zone_size, min_low_pfn, NULL); 70 } 71 72 void __init setup_arch(char **cmdline_p) 73 { 74 *cmdline_p = boot_command_line; 75 76 console_verbose(); 77 78 pr_info("Phys. mem: %ldMB\n", 79 (unsigned long) memblock_phys_mem_size()/1024/1024); 80 81 init_mm.start_code = (unsigned long) _stext; 82 init_mm.end_code = (unsigned long) _etext; 83 init_mm.end_data = (unsigned long) _edata; 84 init_mm.brk = (unsigned long) _end; 85 86 parse_early_param(); 87 88 csky_memblock_init(); 89 90 unflatten_and_copy_device_tree(); 91 92 #ifdef CONFIG_SMP 93 setup_smp(); 94 #endif 95 96 sparse_init(); 97 98 fixaddr_init(); 99 100 #ifdef CONFIG_HIGHMEM 101 kmap_init(); 102 #endif 103 } 104 105 unsigned long va_pa_offset; 106 EXPORT_SYMBOL(va_pa_offset); 107 108 asmlinkage __visible void __init csky_start(unsigned int unused, 109 void *dtb_start) 110 { 111 /* Clean up bss section */ 112 memset(__bss_start, 0, __bss_stop - __bss_start); 113 114 va_pa_offset = read_mmu_msa0() & ~(SSEG_SIZE - 1); 115 116 pre_trap_init(); 117 pre_mmu_init(); 118 119 if (dtb_start == NULL) 120 early_init_dt_scan(__dtb_start); 121 else 122 early_init_dt_scan(dtb_start); 123 124 start_kernel(); 125 126 asm volatile("br .\n"); 127 } 128