1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. 3 4 #include <linux/console.h> 5 #include <linux/memblock.h> 6 #include <linux/bootmem.h> 7 #include <linux/initrd.h> 8 #include <linux/of.h> 9 #include <linux/of_fdt.h> 10 #include <linux/start_kernel.h> 11 #include <linux/dma-contiguous.h> 12 #include <linux/screen_info.h> 13 #include <asm/sections.h> 14 #include <asm/mmu_context.h> 15 #include <asm/pgalloc.h> 16 17 #ifdef CONFIG_DUMMY_CONSOLE 18 struct screen_info screen_info = { 19 .orig_video_lines = 30, 20 .orig_video_cols = 80, 21 .orig_video_mode = 0, 22 .orig_video_ega_bx = 0, 23 .orig_video_isVGA = 1, 24 .orig_video_points = 8 25 }; 26 #endif 27 28 phys_addr_t __init_memblock memblock_end_of_REG0(void) 29 { 30 return (memblock.memory.regions[0].base + 31 memblock.memory.regions[0].size); 32 } 33 34 phys_addr_t __init_memblock memblock_start_of_REG1(void) 35 { 36 return memblock.memory.regions[1].base; 37 } 38 39 size_t __init_memblock memblock_size_of_REG1(void) 40 { 41 return memblock.memory.regions[1].size; 42 } 43 44 static void __init csky_memblock_init(void) 45 { 46 unsigned long zone_size[MAX_NR_ZONES]; 47 unsigned long zhole_size[MAX_NR_ZONES]; 48 signed long size; 49 50 memblock_reserve(__pa(_stext), _end - _stext); 51 #ifdef CONFIG_BLK_DEV_INITRD 52 memblock_reserve(__pa(initrd_start), initrd_end - initrd_start); 53 #endif 54 55 early_init_fdt_reserve_self(); 56 early_init_fdt_scan_reserved_mem(); 57 58 memblock_dump_all(); 59 60 memset(zone_size, 0, sizeof(zone_size)); 61 memset(zhole_size, 0, sizeof(zhole_size)); 62 63 min_low_pfn = PFN_UP(memblock_start_of_DRAM()); 64 max_pfn = PFN_DOWN(memblock_end_of_DRAM()); 65 66 max_low_pfn = PFN_UP(memblock_end_of_REG0()); 67 if (max_low_pfn == 0) 68 max_low_pfn = max_pfn; 69 70 size = max_pfn - min_low_pfn; 71 72 if (memblock.memory.cnt > 1) { 73 zone_size[ZONE_NORMAL] = 74 PFN_DOWN(memblock_start_of_REG1()) - min_low_pfn; 75 zhole_size[ZONE_NORMAL] = 76 PFN_DOWN(memblock_start_of_REG1()) - max_low_pfn; 77 } else { 78 if (size <= PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET)) 79 zone_size[ZONE_NORMAL] = max_pfn - min_low_pfn; 80 else { 81 zone_size[ZONE_NORMAL] = 82 PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET); 83 max_low_pfn = min_low_pfn + zone_size[ZONE_NORMAL]; 84 } 85 } 86 87 #ifdef CONFIG_HIGHMEM 88 size = 0; 89 if (memblock.memory.cnt > 1) { 90 size = PFN_DOWN(memblock_size_of_REG1()); 91 highstart_pfn = PFN_DOWN(memblock_start_of_REG1()); 92 } else { 93 size = max_pfn - min_low_pfn - 94 PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET); 95 highstart_pfn = min_low_pfn + 96 PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET); 97 } 98 99 if (size > 0) 100 zone_size[ZONE_HIGHMEM] = size; 101 102 highend_pfn = max_pfn; 103 #endif 104 memblock_set_current_limit(PFN_PHYS(max_low_pfn)); 105 106 dma_contiguous_reserve(0); 107 108 free_area_init_node(0, zone_size, min_low_pfn, zhole_size); 109 } 110 111 void __init setup_arch(char **cmdline_p) 112 { 113 *cmdline_p = boot_command_line; 114 115 console_verbose(); 116 117 pr_info("Phys. mem: %ldMB\n", 118 (unsigned long) memblock_phys_mem_size()/1024/1024); 119 120 init_mm.start_code = (unsigned long) _stext; 121 init_mm.end_code = (unsigned long) _etext; 122 init_mm.end_data = (unsigned long) _edata; 123 init_mm.brk = (unsigned long) _end; 124 125 parse_early_param(); 126 127 csky_memblock_init(); 128 129 unflatten_and_copy_device_tree(); 130 131 #ifdef CONFIG_SMP 132 setup_smp(); 133 #endif 134 135 sparse_init(); 136 137 #ifdef CONFIG_HIGHMEM 138 kmap_init(); 139 #endif 140 141 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE) 142 conswitchp = &dummy_con; 143 #endif 144 } 145 146 asmlinkage __visible void __init csky_start(unsigned int unused, void *param) 147 { 148 /* Clean up bss section */ 149 memset(__bss_start, 0, __bss_stop - __bss_start); 150 151 pre_trap_init(); 152 pre_mmu_init(); 153 154 if (param == NULL) 155 early_init_dt_scan(__dtb_start); 156 else 157 early_init_dt_scan(param); 158 159 start_kernel(); 160 161 asm volatile("br .\n"); 162 } 163