1/* SPDX-License-Identifier: GPL-2.0 */ 2 3#include <linux/linkage.h> 4#include <linux/init.h> 5#include <asm/page.h> 6#include <abi/entry.h> 7 8__HEAD 9ENTRY(_start) 10 /* set super user mode */ 11 lrw a3, DEFAULT_PSR_VALUE 12 mtcr a3, psr 13 psrset ee 14 15 SETUP_MMU a3 16 17 /* set stack point */ 18 lrw a3, init_thread_union + THREAD_SIZE 19 mov sp, a3 20 21 jmpi csky_start 22END(_start) 23 24#ifdef CONFIG_SMP 25.align 10 26ENTRY(_start_smp_secondary) 27 /* Invalid I/Dcache BTB BHT */ 28 movi a3, 7 29 lsli a3, 16 30 addi a3, (1<<4) | 3 31 mtcr a3, cr17 32 33 tlbi.alls 34 35 /* setup PAGEMASK */ 36 movi a3, 0 37 mtcr a3, cr<6, 15> 38 39 /* setup MEL0/MEL1 */ 40 grs a0, _start_smp_pc 41_start_smp_pc: 42 bmaski a1, 13 43 andn a0, a1 44 movi a1, 0x00000006 45 movi a2, 0x00001006 46 or a1, a0 47 or a2, a0 48 mtcr a1, cr<2, 15> 49 mtcr a2, cr<3, 15> 50 51 /* setup MEH */ 52 mtcr a0, cr<4, 15> 53 54 /* write TLB */ 55 bgeni a3, 28 56 mtcr a3, cr<8, 15> 57 58 SETUP_MMU a3 59 60 /* enable MMU */ 61 movi a3, 1 62 mtcr a3, cr18 63 64 jmpi _goto_mmu_on 65_goto_mmu_on: 66 lrw a3, DEFAULT_PSR_VALUE 67 mtcr a3, psr 68 psrset ee 69 70 /* set stack point */ 71 lrw a3, secondary_stack 72 ld.w a3, (a3, 0) 73 mov sp, a3 74 75 jmpi csky_start_secondary 76END(_start_smp_secondary) 77#endif 78