1 /* SPDX-License-Identifier: GPL-2.0 */ 2 3 #ifndef __ASM_CSKY_IO_H 4 #define __ASM_CSKY_IO_H 5 6 #include <linux/pgtable.h> 7 #include <linux/types.h> 8 #include <linux/version.h> 9 10 /* 11 * I/O memory access primitives. Reads are ordered relative to any 12 * following Normal memory access. Writes are ordered relative to any prior 13 * Normal memory access. 14 * 15 * For CACHEV1 (807, 810), store instruction could fast retire, so we need 16 * another mb() to prevent st fast retire. 17 * 18 * For CACHEV2 (860), store instruction with PAGE_ATTR_NO_BUFFERABLE won't 19 * fast retire. 20 */ 21 #define readb(c) ({ u8 __v = readb_relaxed(c); rmb(); __v; }) 22 #define readw(c) ({ u16 __v = readw_relaxed(c); rmb(); __v; }) 23 #define readl(c) ({ u32 __v = readl_relaxed(c); rmb(); __v; }) 24 25 #ifdef CONFIG_CPU_HAS_CACHEV2 26 #define writeb(v,c) ({ wmb(); writeb_relaxed((v),(c)); }) 27 #define writew(v,c) ({ wmb(); writew_relaxed((v),(c)); }) 28 #define writel(v,c) ({ wmb(); writel_relaxed((v),(c)); }) 29 #else 30 #define writeb(v,c) ({ wmb(); writeb_relaxed((v),(c)); mb(); }) 31 #define writew(v,c) ({ wmb(); writew_relaxed((v),(c)); mb(); }) 32 #define writel(v,c) ({ wmb(); writel_relaxed((v),(c)); mb(); }) 33 #endif 34 35 /* 36 * I/O memory mapping functions. 37 */ 38 #define ioremap_wc(addr, size) \ 39 ioremap_prot((addr), (size), \ 40 (_PAGE_IOREMAP & ~_CACHE_MASK) | _CACHE_UNCACHED) 41 42 #include <asm-generic/io.h> 43 44 #endif /* __ASM_CSKY_IO_H */ 45