1 /* SPDX-License-Identifier: GPL-2.0 */ 2 3 #ifndef __ABI_CSKY_CACHEFLUSH_H 4 #define __ABI_CSKY_CACHEFLUSH_H 5 6 /* Keep includes the same across arches. */ 7 #include <linux/mm.h> 8 9 /* 10 * The cache doesn't need to be flushed when TLB entries change when 11 * the cache is mapped to physical memory, not virtual memory 12 */ 13 #define flush_cache_all() do { } while (0) 14 #define flush_cache_mm(mm) do { } while (0) 15 #define flush_cache_dup_mm(mm) do { } while (0) 16 #define flush_cache_range(vma, start, end) do { } while (0) 17 #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) 18 19 #define PG_dcache_clean PG_arch_1 20 21 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 22 static inline void flush_dcache_page(struct page *page) 23 { 24 if (test_bit(PG_dcache_clean, &page->flags)) 25 clear_bit(PG_dcache_clean, &page->flags); 26 } 27 28 #define flush_dcache_mmap_lock(mapping) do { } while (0) 29 #define flush_dcache_mmap_unlock(mapping) do { } while (0) 30 #define flush_icache_page(vma, page) do { } while (0) 31 32 #define flush_icache_range(start, end) cache_wbinv_range(start, end) 33 34 void flush_icache_mm_range(struct mm_struct *mm, 35 unsigned long start, unsigned long end); 36 void flush_icache_deferred(struct mm_struct *mm); 37 38 #define flush_cache_vmap(start, end) do { } while (0) 39 #define flush_cache_vunmap(start, end) do { } while (0) 40 41 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 42 do { \ 43 memcpy(dst, src, len); \ 44 if (vma->vm_flags & VM_EXEC) { \ 45 dcache_wb_range((unsigned long)dst, \ 46 (unsigned long)dst + len); \ 47 flush_icache_mm_range(current->mm, \ 48 (unsigned long)dst, \ 49 (unsigned long)dst + len); \ 50 } \ 51 } while (0) 52 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 53 memcpy(dst, src, len) 54 55 #endif /* __ABI_CSKY_CACHEFLUSH_H */ 56