100a9730eSGuo Ren /* SPDX-License-Identifier: GPL-2.0 */ 200a9730eSGuo Ren // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. 300a9730eSGuo Ren 400a9730eSGuo Ren #ifndef __ABI_CSKY_CACHEFLUSH_H 500a9730eSGuo Ren #define __ABI_CSKY_CACHEFLUSH_H 600a9730eSGuo Ren 700a9730eSGuo Ren #include <linux/compiler.h> 800a9730eSGuo Ren #include <asm/string.h> 900a9730eSGuo Ren #include <asm/cache.h> 1000a9730eSGuo Ren 1100a9730eSGuo Ren #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 1200a9730eSGuo Ren extern void flush_dcache_page(struct page *); 1300a9730eSGuo Ren 1400a9730eSGuo Ren #define flush_cache_mm(mm) cache_wbinv_all() 1500a9730eSGuo Ren #define flush_cache_page(vma, page, pfn) cache_wbinv_all() 1600a9730eSGuo Ren #define flush_cache_dup_mm(mm) cache_wbinv_all() 1700a9730eSGuo Ren 1800a9730eSGuo Ren /* 1900a9730eSGuo Ren * if (current_mm != vma->mm) cache_wbinv_range(start, end) will be broken. 2000a9730eSGuo Ren * Use cache_wbinv_all() here and need to be improved in future. 2100a9730eSGuo Ren */ 2200a9730eSGuo Ren #define flush_cache_range(vma, start, end) cache_wbinv_all() 2300a9730eSGuo Ren #define flush_cache_vmap(start, end) cache_wbinv_range(start, end) 2400a9730eSGuo Ren #define flush_cache_vunmap(start, end) cache_wbinv_range(start, end) 2500a9730eSGuo Ren 2600a9730eSGuo Ren #define flush_icache_page(vma, page) cache_wbinv_all() 2700a9730eSGuo Ren #define flush_icache_range(start, end) cache_wbinv_range(start, end) 2800a9730eSGuo Ren 2900a9730eSGuo Ren #define flush_icache_user_range(vma, pg, adr, len) \ 3000a9730eSGuo Ren cache_wbinv_range(adr, adr + len) 3100a9730eSGuo Ren 3200a9730eSGuo Ren #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 3300a9730eSGuo Ren do { \ 3400a9730eSGuo Ren cache_wbinv_all(); \ 3500a9730eSGuo Ren memcpy(dst, src, len); \ 3600a9730eSGuo Ren cache_wbinv_all(); \ 3700a9730eSGuo Ren } while (0) 3800a9730eSGuo Ren 3900a9730eSGuo Ren #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 4000a9730eSGuo Ren do { \ 4100a9730eSGuo Ren cache_wbinv_all(); \ 4200a9730eSGuo Ren memcpy(dst, src, len); \ 4300a9730eSGuo Ren cache_wbinv_all(); \ 4400a9730eSGuo Ren } while (0) 4500a9730eSGuo Ren 4600a9730eSGuo Ren #define flush_dcache_mmap_lock(mapping) do {} while (0) 4700a9730eSGuo Ren #define flush_dcache_mmap_unlock(mapping) do {} while (0) 4800a9730eSGuo Ren 4900a9730eSGuo Ren #endif /* __ABI_CSKY_CACHEFLUSH_H */ 50