1config CSKY 2 def_bool y 3 select ARCH_32BIT_OFF_T 4 select ARCH_HAS_DMA_PREP_COHERENT 5 select ARCH_HAS_SYNC_DMA_FOR_CPU 6 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 7 select ARCH_USE_BUILTIN_BSWAP 8 select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2 9 select COMMON_CLK 10 select CLKSRC_MMIO 11 select CLKSRC_OF 12 select DMA_DIRECT_REMAP 13 select IRQ_DOMAIN 14 select HANDLE_DOMAIN_IRQ 15 select DW_APB_TIMER_OF 16 select GENERIC_LIB_ASHLDI3 17 select GENERIC_LIB_ASHRDI3 18 select GENERIC_LIB_LSHRDI3 19 select GENERIC_LIB_MULDI3 20 select GENERIC_LIB_CMPDI2 21 select GENERIC_LIB_UCMPDI2 22 select GENERIC_ALLOCATOR 23 select GENERIC_ATOMIC64 24 select GENERIC_CLOCKEVENTS 25 select GENERIC_CPU_DEVICES 26 select GENERIC_IRQ_CHIP 27 select GENERIC_IRQ_PROBE 28 select GENERIC_IRQ_SHOW 29 select GENERIC_IRQ_MULTI_HANDLER 30 select GENERIC_SCHED_CLOCK 31 select GENERIC_SMP_IDLE_THREAD 32 select HAVE_ARCH_TRACEHOOK 33 select HAVE_ARCH_AUDITSYSCALL 34 select HAVE_DYNAMIC_FTRACE 35 select HAVE_FUNCTION_TRACER 36 select HAVE_FUNCTION_GRAPH_TRACER 37 select HAVE_FTRACE_MCOUNT_RECORD 38 select HAVE_KERNEL_GZIP 39 select HAVE_KERNEL_LZO 40 select HAVE_KERNEL_LZMA 41 select HAVE_PERF_EVENTS 42 select HAVE_PERF_REGS 43 select HAVE_PERF_USER_STACK_DUMP 44 select HAVE_DMA_API_DEBUG 45 select HAVE_DMA_CONTIGUOUS 46 select HAVE_SYSCALL_TRACEPOINTS 47 select MAY_HAVE_SPARSE_IRQ 48 select MODULES_USE_ELF_RELA if MODULES 49 select OF 50 select OF_EARLY_FLATTREE 51 select PERF_USE_VMALLOC if CPU_CK610 52 select RTC_LIB 53 select TIMER_OF 54 select USB_ARCH_HAS_EHCI 55 select USB_ARCH_HAS_OHCI 56 57config CPU_HAS_CACHEV2 58 bool 59 60config CPU_HAS_FPUV2 61 bool 62 63config CPU_HAS_HILO 64 bool 65 66config CPU_HAS_TLBI 67 bool 68 69config CPU_HAS_LDSTEX 70 bool 71 help 72 For SMP, CPU needs "ldex&stex" instrcutions to atomic operations. 73 74config CPU_NEED_TLBSYNC 75 bool 76 77config CPU_NEED_SOFTALIGN 78 bool 79 80config CPU_NO_USER_BKPT 81 bool 82 help 83 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because 84 abiv2 is 16/32bit instruction set and "trap 1" is 32bit. 85 So we need a 16bit instruction as user space bkpt, and it will cause an illegal 86 instruction exception. 87 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not. 88 89config GENERIC_CALIBRATE_DELAY 90 def_bool y 91 92config GENERIC_CSUM 93 def_bool y 94 95config GENERIC_HWEIGHT 96 def_bool y 97 98config MMU 99 def_bool y 100 101config STACKTRACE_SUPPORT 102 def_bool y 103 104config TIME_LOW_RES 105 def_bool y 106 107config TRACE_IRQFLAGS_SUPPORT 108 def_bool y 109 110config CPU_TLB_SIZE 111 int 112 default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810) 113 default "1024" if (CPU_CK860) 114 115config CPU_ASID_BITS 116 int 117 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810) 118 default "12" if (CPU_CK860) 119 120config L1_CACHE_SHIFT 121 int 122 default "4" if (CPU_CK610) 123 default "5" if (CPU_CK807 || CPU_CK810) 124 default "6" if (CPU_CK860) 125 126menu "Processor type and features" 127 128choice 129 prompt "CPU MODEL" 130 default CPU_CK807 131 132config CPU_CK610 133 bool "CSKY CPU ck610" 134 select CPU_NEED_TLBSYNC 135 select CPU_NEED_SOFTALIGN 136 select CPU_NO_USER_BKPT 137 138config CPU_CK810 139 bool "CSKY CPU ck810" 140 select CPU_HAS_HILO 141 select CPU_NEED_TLBSYNC 142 143config CPU_CK807 144 bool "CSKY CPU ck807" 145 select CPU_HAS_HILO 146 147config CPU_CK860 148 bool "CSKY CPU ck860" 149 select CPU_HAS_TLBI 150 select CPU_HAS_CACHEV2 151 select CPU_HAS_LDSTEX 152 select CPU_HAS_FPUV2 153endchoice 154 155choice 156 prompt "C-SKY PMU type" 157 depends on PERF_EVENTS 158 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 159 160config CPU_PMU_NONE 161 bool "None" 162 163config CSKY_PMU_V1 164 bool "Performance Monitoring Unit Ver.1" 165 166endchoice 167 168choice 169 prompt "Power Manager Instruction (wait/doze/stop)" 170 default CPU_PM_NONE 171 172config CPU_PM_NONE 173 bool "None" 174 175config CPU_PM_WAIT 176 bool "wait" 177 178config CPU_PM_DOZE 179 bool "doze" 180 181config CPU_PM_STOP 182 bool "stop" 183endchoice 184 185config CPU_HAS_VDSP 186 bool "CPU has VDSP coprocessor" 187 depends on CPU_HAS_FPU && CPU_HAS_FPUV2 188 189config CPU_HAS_FPU 190 bool "CPU has FPU coprocessor" 191 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 192 193config CPU_HAS_TEE 194 bool "CPU has Trusted Execution Environment" 195 depends on CPU_CK810 196 197config SMP 198 bool "Symmetric Multi-Processing (SMP) support for C-SKY" 199 depends on CPU_CK860 200 default n 201 202config NR_CPUS 203 int "Maximum number of CPUs (2-32)" 204 range 2 32 205 depends on SMP 206 default "2" 207 208config HIGHMEM 209 bool "High Memory Support" 210 depends on !CPU_CK610 211 default y 212 213config FORCE_MAX_ZONEORDER 214 int "Maximum zone order" 215 default "11" 216 217config RAM_BASE 218 hex "DRAM start addr (the same with memory-section in dts)" 219 default 0x0 220 221config HOTPLUG_CPU 222 bool "Support for hot-pluggable CPUs" 223 select GENERIC_IRQ_MIGRATION 224 depends on SMP 225 help 226 Say Y here to allow turning CPUs off and on. CPUs can be 227 controlled through /sys/devices/system/cpu/cpu1/hotplug/target. 228 229 Say N if you want to disable CPU hotplug. 230endmenu 231 232source "kernel/Kconfig.hz" 233