xref: /openbmc/linux/arch/csky/Kconfig (revision 8a5aaf97)
1config CSKY
2	def_bool y
3	select ARCH_HAS_SYNC_DMA_FOR_CPU
4	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
5	select ARCH_USE_BUILTIN_BSWAP
6	select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
7	select COMMON_CLK
8	select CLKSRC_MMIO
9	select CLKSRC_OF
10	select DMA_DIRECT_REMAP
11	select IRQ_DOMAIN
12	select HANDLE_DOMAIN_IRQ
13	select DW_APB_TIMER_OF
14	select GENERIC_LIB_ASHLDI3
15	select GENERIC_LIB_ASHRDI3
16	select GENERIC_LIB_LSHRDI3
17	select GENERIC_LIB_MULDI3
18	select GENERIC_LIB_CMPDI2
19	select GENERIC_LIB_UCMPDI2
20	select GENERIC_ALLOCATOR
21	select GENERIC_ATOMIC64
22	select GENERIC_CLOCKEVENTS
23	select GENERIC_CPU_DEVICES
24	select GENERIC_IRQ_CHIP
25	select GENERIC_IRQ_PROBE
26	select GENERIC_IRQ_SHOW
27	select GENERIC_IRQ_MULTI_HANDLER
28	select GENERIC_SCHED_CLOCK
29	select GENERIC_SMP_IDLE_THREAD
30	select HAVE_ARCH_TRACEHOOK
31	select HAVE_FUNCTION_TRACER
32	select HAVE_FUNCTION_GRAPH_TRACER
33	select HAVE_GENERIC_DMA_COHERENT
34	select HAVE_KERNEL_GZIP
35	select HAVE_KERNEL_LZO
36	select HAVE_KERNEL_LZMA
37	select HAVE_PERF_EVENTS
38	select HAVE_C_RECORDMCOUNT
39	select HAVE_DMA_API_DEBUG
40	select HAVE_DMA_CONTIGUOUS
41	select MAY_HAVE_SPARSE_IRQ
42	select MODULES_USE_ELF_RELA if MODULES
43	select OF
44	select OF_EARLY_FLATTREE
45	select OF_RESERVED_MEM
46	select PERF_USE_VMALLOC if CPU_CK610
47	select RTC_LIB
48	select TIMER_OF
49	select USB_ARCH_HAS_EHCI
50	select USB_ARCH_HAS_OHCI
51
52config CPU_HAS_CACHEV2
53	bool
54
55config CPU_HAS_FPUV2
56	bool
57
58config CPU_HAS_HILO
59	bool
60
61config CPU_HAS_TLBI
62	bool
63
64config CPU_HAS_LDSTEX
65	bool
66	help
67	  For SMP, CPU needs "ldex&stex" instrcutions to atomic operations.
68
69config CPU_NEED_TLBSYNC
70	bool
71
72config CPU_NEED_SOFTALIGN
73	bool
74
75config CPU_NO_USER_BKPT
76	bool
77	help
78	  For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
79	  abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
80	  So we need a 16bit instruction as user space bkpt, and it will cause an illegal
81	  instruction exception.
82	  In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
83
84config GENERIC_CALIBRATE_DELAY
85	def_bool y
86
87config GENERIC_CSUM
88	def_bool y
89
90config GENERIC_HWEIGHT
91	def_bool y
92
93config MMU
94	def_bool y
95
96config RWSEM_GENERIC_SPINLOCK
97	def_bool y
98
99config STACKTRACE_SUPPORT
100	def_bool y
101
102config TIME_LOW_RES
103	def_bool y
104
105config TRACE_IRQFLAGS_SUPPORT
106	def_bool y
107
108config CPU_TLB_SIZE
109	int
110	default "128"	if (CPU_CK610 || CPU_CK807 || CPU_CK810)
111	default "1024"	if (CPU_CK860)
112
113config CPU_ASID_BITS
114	int
115	default "8"	if (CPU_CK610 || CPU_CK807 || CPU_CK810)
116	default "12"	if (CPU_CK860)
117
118config L1_CACHE_SHIFT
119	int
120	default "4"	if (CPU_CK610)
121	default "5"	if (CPU_CK807 || CPU_CK810)
122	default "6"	if (CPU_CK860)
123
124menu "Processor type and features"
125
126choice
127	prompt "CPU MODEL"
128	default CPU_CK807
129
130config CPU_CK610
131	bool "CSKY CPU ck610"
132	select CPU_NEED_TLBSYNC
133	select CPU_NEED_SOFTALIGN
134	select CPU_NO_USER_BKPT
135
136config CPU_CK810
137	bool "CSKY CPU ck810"
138	select CPU_HAS_HILO
139	select CPU_NEED_TLBSYNC
140
141config CPU_CK807
142	bool "CSKY CPU ck807"
143	select CPU_HAS_HILO
144
145config CPU_CK860
146	bool "CSKY CPU ck860"
147	select CPU_HAS_TLBI
148	select CPU_HAS_CACHEV2
149	select CPU_HAS_LDSTEX
150	select CPU_HAS_FPUV2
151endchoice
152
153choice
154	prompt "C-SKY PMU type"
155	depends on PERF_EVENTS
156	depends on CPU_CK807 || CPU_CK810 || CPU_CK860
157
158config CPU_PMU_NONE
159	bool "None"
160
161config CSKY_PMU_V1
162	bool "Performance Monitoring Unit Ver.1"
163
164endchoice
165
166choice
167	prompt "Power Manager Instruction (wait/doze/stop)"
168	default CPU_PM_NONE
169
170config CPU_PM_NONE
171	bool "None"
172
173config CPU_PM_WAIT
174	bool "wait"
175
176config CPU_PM_DOZE
177	bool "doze"
178
179config CPU_PM_STOP
180	bool "stop"
181endchoice
182
183config CPU_HAS_VDSP
184	bool "CPU has VDSP coprocessor"
185	depends on CPU_HAS_FPU && CPU_HAS_FPUV2
186
187config CPU_HAS_FPU
188	bool "CPU has FPU coprocessor"
189	depends on CPU_CK807 || CPU_CK810 || CPU_CK860
190
191config CPU_HAS_TEE
192	bool "CPU has Trusted Execution Environment"
193	depends on CPU_CK810
194
195config SMP
196	bool "Symmetric Multi-Processing (SMP) support for C-SKY"
197	depends on CPU_CK860
198	default n
199
200config NR_CPUS
201	int "Maximum number of CPUs (2-32)"
202	range 2 32
203	depends on SMP
204	default "2"
205
206config HIGHMEM
207	bool "High Memory Support"
208	depends on !CPU_CK610
209	default y
210
211config FORCE_MAX_ZONEORDER
212	int "Maximum zone order"
213	default "11"
214
215config RAM_BASE
216	hex "DRAM start addr (the same with memory-section in dts)"
217	default 0x0
218
219config HOTPLUG_CPU
220	bool "Support for hot-pluggable CPUs"
221	select GENERIC_IRQ_MIGRATION
222	depends on SMP
223	help
224	  Say Y here to allow turning CPUs off and on. CPUs can be
225	  controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
226
227	  Say N if you want to disable CPU hotplug.
228endmenu
229
230source "kernel/Kconfig.hz"
231