1# SPDX-License-Identifier: GPL-2.0-only 2config CSKY 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_DMA_PREP_COHERENT 6 select ARCH_HAS_SYNC_DMA_FOR_CPU 7 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 8 select ARCH_USE_BUILTIN_BSWAP 9 select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2 10 select COMMON_CLK 11 select CLKSRC_MMIO 12 select CSKY_MPINTC if CPU_CK860 13 select CSKY_MP_TIMER if CPU_CK860 14 select CSKY_APB_INTC 15 select DMA_DIRECT_REMAP 16 select IRQ_DOMAIN 17 select HANDLE_DOMAIN_IRQ 18 select DW_APB_TIMER_OF 19 select GENERIC_IOREMAP 20 select GENERIC_LIB_ASHLDI3 21 select GENERIC_LIB_ASHRDI3 22 select GENERIC_LIB_LSHRDI3 23 select GENERIC_LIB_MULDI3 24 select GENERIC_LIB_CMPDI2 25 select GENERIC_LIB_UCMPDI2 26 select GENERIC_ALLOCATOR 27 select GENERIC_ATOMIC64 28 select GENERIC_CLOCKEVENTS 29 select GENERIC_CPU_DEVICES 30 select GENERIC_IRQ_CHIP 31 select GENERIC_IRQ_PROBE 32 select GENERIC_IRQ_SHOW 33 select GENERIC_IRQ_MULTI_HANDLER 34 select GENERIC_SCHED_CLOCK 35 select GENERIC_SMP_IDLE_THREAD 36 select GX6605S_TIMER if CPU_CK610 37 select HAVE_ARCH_TRACEHOOK 38 select HAVE_ARCH_AUDITSYSCALL 39 select HAVE_COPY_THREAD_TLS 40 select HAVE_DYNAMIC_FTRACE 41 select HAVE_FUNCTION_TRACER 42 select HAVE_FUNCTION_GRAPH_TRACER 43 select HAVE_FTRACE_MCOUNT_RECORD 44 select HAVE_KERNEL_GZIP 45 select HAVE_KERNEL_LZO 46 select HAVE_KERNEL_LZMA 47 select HAVE_PERF_EVENTS 48 select HAVE_PERF_REGS 49 select HAVE_PERF_USER_STACK_DUMP 50 select HAVE_DMA_CONTIGUOUS 51 select HAVE_STACKPROTECTOR 52 select HAVE_SYSCALL_TRACEPOINTS 53 select MAY_HAVE_SPARSE_IRQ 54 select MODULES_USE_ELF_RELA if MODULES 55 select OF 56 select OF_EARLY_FLATTREE 57 select PERF_USE_VMALLOC if CPU_CK610 58 select RTC_LIB 59 select TIMER_OF 60 select USB_ARCH_HAS_EHCI 61 select USB_ARCH_HAS_OHCI 62 select GENERIC_PCI_IOMAP 63 select HAVE_PCI 64 select PCI_DOMAINS_GENERIC if PCI 65 select PCI_SYSCALL if PCI 66 select PCI_MSI if PCI 67 68config CPU_HAS_CACHEV2 69 bool 70 71config CPU_HAS_FPUV2 72 bool 73 74config CPU_HAS_HILO 75 bool 76 77config CPU_HAS_TLBI 78 bool 79 80config CPU_HAS_LDSTEX 81 bool 82 help 83 For SMP, CPU needs "ldex&stex" instructions for atomic operations. 84 85config CPU_NEED_TLBSYNC 86 bool 87 88config CPU_NEED_SOFTALIGN 89 bool 90 91config CPU_NO_USER_BKPT 92 bool 93 help 94 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because 95 abiv2 is 16/32bit instruction set and "trap 1" is 32bit. 96 So we need a 16bit instruction as user space bkpt, and it will cause an illegal 97 instruction exception. 98 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not. 99 100config GENERIC_CALIBRATE_DELAY 101 def_bool y 102 103config GENERIC_CSUM 104 def_bool y 105 106config GENERIC_HWEIGHT 107 def_bool y 108 109config MMU 110 def_bool y 111 112config STACKTRACE_SUPPORT 113 def_bool y 114 115config TIME_LOW_RES 116 def_bool y 117 118config TRACE_IRQFLAGS_SUPPORT 119 def_bool y 120 121config CPU_TLB_SIZE 122 int 123 default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810) 124 default "1024" if (CPU_CK860) 125 126config CPU_ASID_BITS 127 int 128 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810) 129 default "12" if (CPU_CK860) 130 131config L1_CACHE_SHIFT 132 int 133 default "4" if (CPU_CK610) 134 default "5" if (CPU_CK807 || CPU_CK810) 135 default "6" if (CPU_CK860) 136 137menu "Processor type and features" 138 139choice 140 prompt "CPU MODEL" 141 default CPU_CK807 142 143config CPU_CK610 144 bool "CSKY CPU ck610" 145 select CPU_NEED_TLBSYNC 146 select CPU_NEED_SOFTALIGN 147 select CPU_NO_USER_BKPT 148 149config CPU_CK810 150 bool "CSKY CPU ck810" 151 select CPU_HAS_HILO 152 select CPU_NEED_TLBSYNC 153 154config CPU_CK807 155 bool "CSKY CPU ck807" 156 select CPU_HAS_HILO 157 158config CPU_CK860 159 bool "CSKY CPU ck860" 160 select CPU_HAS_TLBI 161 select CPU_HAS_CACHEV2 162 select CPU_HAS_LDSTEX 163 select CPU_HAS_FPUV2 164endchoice 165 166choice 167 prompt "C-SKY PMU type" 168 depends on PERF_EVENTS 169 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 170 171config CPU_PMU_NONE 172 bool "None" 173 174config CSKY_PMU_V1 175 bool "Performance Monitoring Unit Ver.1" 176 177endchoice 178 179choice 180 prompt "Power Manager Instruction (wait/doze/stop)" 181 default CPU_PM_NONE 182 183config CPU_PM_NONE 184 bool "None" 185 186config CPU_PM_WAIT 187 bool "wait" 188 189config CPU_PM_DOZE 190 bool "doze" 191 192config CPU_PM_STOP 193 bool "stop" 194endchoice 195 196menuconfig HAVE_TCM 197 bool "Tightly-Coupled/Sram Memory" 198 select GENERIC_ALLOCATOR 199 help 200 The implementation are not only used by TCM (Tightly-Coupled Meory) 201 but also used by sram on SOC bus. It follow existed linux tcm 202 software interface, so that old tcm application codes could be 203 re-used directly. 204 205if HAVE_TCM 206config ITCM_RAM_BASE 207 hex "ITCM ram base" 208 default 0xffffffff 209 210config ITCM_NR_PAGES 211 int "Page count of ITCM size: NR*4KB" 212 range 1 256 213 default 32 214 215config HAVE_DTCM 216 bool "DTCM Support" 217 218config DTCM_RAM_BASE 219 hex "DTCM ram base" 220 depends on HAVE_DTCM 221 default 0xffffffff 222 223config DTCM_NR_PAGES 224 int "Page count of DTCM size: NR*4KB" 225 depends on HAVE_DTCM 226 range 1 256 227 default 32 228endif 229 230config CPU_HAS_VDSP 231 bool "CPU has VDSP coprocessor" 232 depends on CPU_HAS_FPU && CPU_HAS_FPUV2 233 234config CPU_HAS_FPU 235 bool "CPU has FPU coprocessor" 236 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 237 238config CPU_HAS_ICACHE_INS 239 bool "CPU has Icache invalidate instructions" 240 depends on CPU_HAS_CACHEV2 241 242config CPU_HAS_TEE 243 bool "CPU has Trusted Execution Environment" 244 depends on CPU_CK810 245 246config SMP 247 bool "Symmetric Multi-Processing (SMP) support for C-SKY" 248 depends on CPU_CK860 249 default n 250 251config NR_CPUS 252 int "Maximum number of CPUs (2-32)" 253 range 2 32 254 depends on SMP 255 default "2" 256 257config HIGHMEM 258 bool "High Memory Support" 259 depends on !CPU_CK610 260 default y 261 262config FORCE_MAX_ZONEORDER 263 int "Maximum zone order" 264 default "11" 265 266config RAM_BASE 267 hex "DRAM start addr (the same with memory-section in dts)" 268 default 0x0 269 270config HOTPLUG_CPU 271 bool "Support for hot-pluggable CPUs" 272 select GENERIC_IRQ_MIGRATION 273 depends on SMP 274 help 275 Say Y here to allow turning CPUs off and on. CPUs can be 276 controlled through /sys/devices/system/cpu/cpu1/hotplug/target. 277 278 Say N if you want to disable CPU hotplug. 279endmenu 280 281source "arch/csky/Kconfig.platforms" 282 283source "kernel/Kconfig.hz" 284