xref: /openbmc/linux/arch/arm64/net/bpf_jit_comp.c (revision 9dae47aba0a055f761176d9297371d5bb24289ec)
1 /*
2  * BPF JIT compiler for ARM64
3  *
4  * Copyright (C) 2014-2016 Zi Shen Lim <zlim.lnx@gmail.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18 
19 #define pr_fmt(fmt) "bpf_jit: " fmt
20 
21 #include <linux/bpf.h>
22 #include <linux/filter.h>
23 #include <linux/printk.h>
24 #include <linux/skbuff.h>
25 #include <linux/slab.h>
26 
27 #include <asm/byteorder.h>
28 #include <asm/cacheflush.h>
29 #include <asm/debug-monitors.h>
30 #include <asm/set_memory.h>
31 
32 #include "bpf_jit.h"
33 
34 int bpf_jit_enable __read_mostly;
35 
36 #define TMP_REG_1 (MAX_BPF_JIT_REG + 0)
37 #define TMP_REG_2 (MAX_BPF_JIT_REG + 1)
38 #define TCALL_CNT (MAX_BPF_JIT_REG + 2)
39 #define TMP_REG_3 (MAX_BPF_JIT_REG + 3)
40 
41 /* Map BPF registers to A64 registers */
42 static const int bpf2a64[] = {
43 	/* return value from in-kernel function, and exit value from eBPF */
44 	[BPF_REG_0] = A64_R(7),
45 	/* arguments from eBPF program to in-kernel function */
46 	[BPF_REG_1] = A64_R(0),
47 	[BPF_REG_2] = A64_R(1),
48 	[BPF_REG_3] = A64_R(2),
49 	[BPF_REG_4] = A64_R(3),
50 	[BPF_REG_5] = A64_R(4),
51 	/* callee saved registers that in-kernel function will preserve */
52 	[BPF_REG_6] = A64_R(19),
53 	[BPF_REG_7] = A64_R(20),
54 	[BPF_REG_8] = A64_R(21),
55 	[BPF_REG_9] = A64_R(22),
56 	/* read-only frame pointer to access stack */
57 	[BPF_REG_FP] = A64_R(25),
58 	/* temporary registers for internal BPF JIT */
59 	[TMP_REG_1] = A64_R(10),
60 	[TMP_REG_2] = A64_R(11),
61 	[TMP_REG_3] = A64_R(12),
62 	/* tail_call_cnt */
63 	[TCALL_CNT] = A64_R(26),
64 	/* temporary register for blinding constants */
65 	[BPF_REG_AX] = A64_R(9),
66 };
67 
68 struct jit_ctx {
69 	const struct bpf_prog *prog;
70 	int idx;
71 	int epilogue_offset;
72 	int *offset;
73 	__le32 *image;
74 	u32 stack_size;
75 };
76 
77 static inline void emit(const u32 insn, struct jit_ctx *ctx)
78 {
79 	if (ctx->image != NULL)
80 		ctx->image[ctx->idx] = cpu_to_le32(insn);
81 
82 	ctx->idx++;
83 }
84 
85 static inline void emit_a64_mov_i64(const int reg, const u64 val,
86 				    struct jit_ctx *ctx)
87 {
88 	u64 tmp = val;
89 	int shift = 0;
90 
91 	emit(A64_MOVZ(1, reg, tmp & 0xffff, shift), ctx);
92 	tmp >>= 16;
93 	shift += 16;
94 	while (tmp) {
95 		if (tmp & 0xffff)
96 			emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx);
97 		tmp >>= 16;
98 		shift += 16;
99 	}
100 }
101 
102 static inline void emit_addr_mov_i64(const int reg, const u64 val,
103 				     struct jit_ctx *ctx)
104 {
105 	u64 tmp = val;
106 	int shift = 0;
107 
108 	emit(A64_MOVZ(1, reg, tmp & 0xffff, shift), ctx);
109 	for (;shift < 48;) {
110 		tmp >>= 16;
111 		shift += 16;
112 		emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx);
113 	}
114 }
115 
116 static inline void emit_a64_mov_i(const int is64, const int reg,
117 				  const s32 val, struct jit_ctx *ctx)
118 {
119 	u16 hi = val >> 16;
120 	u16 lo = val & 0xffff;
121 
122 	if (hi & 0x8000) {
123 		if (hi == 0xffff) {
124 			emit(A64_MOVN(is64, reg, (u16)~lo, 0), ctx);
125 		} else {
126 			emit(A64_MOVN(is64, reg, (u16)~hi, 16), ctx);
127 			emit(A64_MOVK(is64, reg, lo, 0), ctx);
128 		}
129 	} else {
130 		emit(A64_MOVZ(is64, reg, lo, 0), ctx);
131 		if (hi)
132 			emit(A64_MOVK(is64, reg, hi, 16), ctx);
133 	}
134 }
135 
136 static inline int bpf2a64_offset(int bpf_to, int bpf_from,
137 				 const struct jit_ctx *ctx)
138 {
139 	int to = ctx->offset[bpf_to];
140 	/* -1 to account for the Branch instruction */
141 	int from = ctx->offset[bpf_from] - 1;
142 
143 	return to - from;
144 }
145 
146 static void jit_fill_hole(void *area, unsigned int size)
147 {
148 	__le32 *ptr;
149 	/* We are guaranteed to have aligned memory. */
150 	for (ptr = area; size >= sizeof(u32); size -= sizeof(u32))
151 		*ptr++ = cpu_to_le32(AARCH64_BREAK_FAULT);
152 }
153 
154 static inline int epilogue_offset(const struct jit_ctx *ctx)
155 {
156 	int to = ctx->epilogue_offset;
157 	int from = ctx->idx;
158 
159 	return to - from;
160 }
161 
162 /* Stack must be multiples of 16B */
163 #define STACK_ALIGN(sz) (((sz) + 15) & ~15)
164 
165 #define PROLOGUE_OFFSET 8
166 
167 static int build_prologue(struct jit_ctx *ctx)
168 {
169 	const struct bpf_prog *prog = ctx->prog;
170 	const u8 r6 = bpf2a64[BPF_REG_6];
171 	const u8 r7 = bpf2a64[BPF_REG_7];
172 	const u8 r8 = bpf2a64[BPF_REG_8];
173 	const u8 r9 = bpf2a64[BPF_REG_9];
174 	const u8 fp = bpf2a64[BPF_REG_FP];
175 	const u8 tcc = bpf2a64[TCALL_CNT];
176 	const int idx0 = ctx->idx;
177 	int cur_offset;
178 
179 	/*
180 	 * BPF prog stack layout
181 	 *
182 	 *                         high
183 	 * original A64_SP =>   0:+-----+ BPF prologue
184 	 *                        |FP/LR|
185 	 * current A64_FP =>  -16:+-----+
186 	 *                        | ... | callee saved registers
187 	 * BPF fp register => -64:+-----+ <= (BPF_FP)
188 	 *                        |     |
189 	 *                        | ... | BPF prog stack
190 	 *                        |     |
191 	 *                        +-----+ <= (BPF_FP - prog->aux->stack_depth)
192 	 *                        |RSVD | JIT scratchpad
193 	 * current A64_SP =>      +-----+ <= (BPF_FP - ctx->stack_size)
194 	 *                        |     |
195 	 *                        | ... | Function call stack
196 	 *                        |     |
197 	 *                        +-----+
198 	 *                          low
199 	 *
200 	 */
201 
202 	/* Save FP and LR registers to stay align with ARM64 AAPCS */
203 	emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
204 	emit(A64_MOV(1, A64_FP, A64_SP), ctx);
205 
206 	/* Save callee-saved registers */
207 	emit(A64_PUSH(r6, r7, A64_SP), ctx);
208 	emit(A64_PUSH(r8, r9, A64_SP), ctx);
209 	emit(A64_PUSH(fp, tcc, A64_SP), ctx);
210 
211 	/* Set up BPF prog stack base register */
212 	emit(A64_MOV(1, fp, A64_SP), ctx);
213 
214 	/* Initialize tail_call_cnt */
215 	emit(A64_MOVZ(1, tcc, 0, 0), ctx);
216 
217 	/* 4 byte extra for skb_copy_bits buffer */
218 	ctx->stack_size = prog->aux->stack_depth + 4;
219 	ctx->stack_size = STACK_ALIGN(ctx->stack_size);
220 
221 	/* Set up function call stack */
222 	emit(A64_SUB_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
223 
224 	cur_offset = ctx->idx - idx0;
225 	if (cur_offset != PROLOGUE_OFFSET) {
226 		pr_err_once("PROLOGUE_OFFSET = %d, expected %d!\n",
227 			    cur_offset, PROLOGUE_OFFSET);
228 		return -1;
229 	}
230 	return 0;
231 }
232 
233 static int out_offset = -1; /* initialized on the first pass of build_body() */
234 static int emit_bpf_tail_call(struct jit_ctx *ctx)
235 {
236 	/* bpf_tail_call(void *prog_ctx, struct bpf_array *array, u64 index) */
237 	const u8 r2 = bpf2a64[BPF_REG_2];
238 	const u8 r3 = bpf2a64[BPF_REG_3];
239 
240 	const u8 tmp = bpf2a64[TMP_REG_1];
241 	const u8 prg = bpf2a64[TMP_REG_2];
242 	const u8 tcc = bpf2a64[TCALL_CNT];
243 	const int idx0 = ctx->idx;
244 #define cur_offset (ctx->idx - idx0)
245 #define jmp_offset (out_offset - (cur_offset))
246 	size_t off;
247 
248 	/* if (index >= array->map.max_entries)
249 	 *     goto out;
250 	 */
251 	off = offsetof(struct bpf_array, map.max_entries);
252 	emit_a64_mov_i64(tmp, off, ctx);
253 	emit(A64_LDR32(tmp, r2, tmp), ctx);
254 	emit(A64_CMP(0, r3, tmp), ctx);
255 	emit(A64_B_(A64_COND_GE, jmp_offset), ctx);
256 
257 	/* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
258 	 *     goto out;
259 	 * tail_call_cnt++;
260 	 */
261 	emit_a64_mov_i64(tmp, MAX_TAIL_CALL_CNT, ctx);
262 	emit(A64_CMP(1, tcc, tmp), ctx);
263 	emit(A64_B_(A64_COND_GT, jmp_offset), ctx);
264 	emit(A64_ADD_I(1, tcc, tcc, 1), ctx);
265 
266 	/* prog = array->ptrs[index];
267 	 * if (prog == NULL)
268 	 *     goto out;
269 	 */
270 	off = offsetof(struct bpf_array, ptrs);
271 	emit_a64_mov_i64(tmp, off, ctx);
272 	emit(A64_ADD(1, tmp, r2, tmp), ctx);
273 	emit(A64_LSL(1, prg, r3, 3), ctx);
274 	emit(A64_LDR64(prg, tmp, prg), ctx);
275 	emit(A64_CBZ(1, prg, jmp_offset), ctx);
276 
277 	/* goto *(prog->bpf_func + prologue_size); */
278 	off = offsetof(struct bpf_prog, bpf_func);
279 	emit_a64_mov_i64(tmp, off, ctx);
280 	emit(A64_LDR64(tmp, prg, tmp), ctx);
281 	emit(A64_ADD_I(1, tmp, tmp, sizeof(u32) * PROLOGUE_OFFSET), ctx);
282 	emit(A64_BR(tmp), ctx);
283 
284 	/* out: */
285 	if (out_offset == -1)
286 		out_offset = cur_offset;
287 	if (cur_offset != out_offset) {
288 		pr_err_once("tail_call out_offset = %d, expected %d!\n",
289 			    cur_offset, out_offset);
290 		return -1;
291 	}
292 	return 0;
293 #undef cur_offset
294 #undef jmp_offset
295 }
296 
297 static void build_epilogue(struct jit_ctx *ctx)
298 {
299 	const u8 r0 = bpf2a64[BPF_REG_0];
300 	const u8 r6 = bpf2a64[BPF_REG_6];
301 	const u8 r7 = bpf2a64[BPF_REG_7];
302 	const u8 r8 = bpf2a64[BPF_REG_8];
303 	const u8 r9 = bpf2a64[BPF_REG_9];
304 	const u8 fp = bpf2a64[BPF_REG_FP];
305 
306 	/* We're done with BPF stack */
307 	emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
308 
309 	/* Restore fs (x25) and x26 */
310 	emit(A64_POP(fp, A64_R(26), A64_SP), ctx);
311 
312 	/* Restore callee-saved register */
313 	emit(A64_POP(r8, r9, A64_SP), ctx);
314 	emit(A64_POP(r6, r7, A64_SP), ctx);
315 
316 	/* Restore FP/LR registers */
317 	emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
318 
319 	/* Set return value */
320 	emit(A64_MOV(1, A64_R(0), r0), ctx);
321 
322 	emit(A64_RET(A64_LR), ctx);
323 }
324 
325 /* JITs an eBPF instruction.
326  * Returns:
327  * 0  - successfully JITed an 8-byte eBPF instruction.
328  * >0 - successfully JITed a 16-byte eBPF instruction.
329  * <0 - failed to JIT.
330  */
331 static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
332 {
333 	const u8 code = insn->code;
334 	const u8 dst = bpf2a64[insn->dst_reg];
335 	const u8 src = bpf2a64[insn->src_reg];
336 	const u8 tmp = bpf2a64[TMP_REG_1];
337 	const u8 tmp2 = bpf2a64[TMP_REG_2];
338 	const u8 tmp3 = bpf2a64[TMP_REG_3];
339 	const s16 off = insn->off;
340 	const s32 imm = insn->imm;
341 	const int i = insn - ctx->prog->insnsi;
342 	const bool is64 = BPF_CLASS(code) == BPF_ALU64;
343 	const bool isdw = BPF_SIZE(code) == BPF_DW;
344 	u8 jmp_cond;
345 	s32 jmp_offset;
346 
347 #define check_imm(bits, imm) do {				\
348 	if ((((imm) > 0) && ((imm) >> (bits))) ||		\
349 	    (((imm) < 0) && (~(imm) >> (bits)))) {		\
350 		pr_info("[%2d] imm=%d(0x%x) out of range\n",	\
351 			i, imm, imm);				\
352 		return -EINVAL;					\
353 	}							\
354 } while (0)
355 #define check_imm19(imm) check_imm(19, imm)
356 #define check_imm26(imm) check_imm(26, imm)
357 
358 	switch (code) {
359 	/* dst = src */
360 	case BPF_ALU | BPF_MOV | BPF_X:
361 	case BPF_ALU64 | BPF_MOV | BPF_X:
362 		emit(A64_MOV(is64, dst, src), ctx);
363 		break;
364 	/* dst = dst OP src */
365 	case BPF_ALU | BPF_ADD | BPF_X:
366 	case BPF_ALU64 | BPF_ADD | BPF_X:
367 		emit(A64_ADD(is64, dst, dst, src), ctx);
368 		break;
369 	case BPF_ALU | BPF_SUB | BPF_X:
370 	case BPF_ALU64 | BPF_SUB | BPF_X:
371 		emit(A64_SUB(is64, dst, dst, src), ctx);
372 		break;
373 	case BPF_ALU | BPF_AND | BPF_X:
374 	case BPF_ALU64 | BPF_AND | BPF_X:
375 		emit(A64_AND(is64, dst, dst, src), ctx);
376 		break;
377 	case BPF_ALU | BPF_OR | BPF_X:
378 	case BPF_ALU64 | BPF_OR | BPF_X:
379 		emit(A64_ORR(is64, dst, dst, src), ctx);
380 		break;
381 	case BPF_ALU | BPF_XOR | BPF_X:
382 	case BPF_ALU64 | BPF_XOR | BPF_X:
383 		emit(A64_EOR(is64, dst, dst, src), ctx);
384 		break;
385 	case BPF_ALU | BPF_MUL | BPF_X:
386 	case BPF_ALU64 | BPF_MUL | BPF_X:
387 		emit(A64_MUL(is64, dst, dst, src), ctx);
388 		break;
389 	case BPF_ALU | BPF_DIV | BPF_X:
390 	case BPF_ALU64 | BPF_DIV | BPF_X:
391 	case BPF_ALU | BPF_MOD | BPF_X:
392 	case BPF_ALU64 | BPF_MOD | BPF_X:
393 	{
394 		const u8 r0 = bpf2a64[BPF_REG_0];
395 
396 		/* if (src == 0) return 0 */
397 		jmp_offset = 3; /* skip ahead to else path */
398 		check_imm19(jmp_offset);
399 		emit(A64_CBNZ(is64, src, jmp_offset), ctx);
400 		emit(A64_MOVZ(1, r0, 0, 0), ctx);
401 		jmp_offset = epilogue_offset(ctx);
402 		check_imm26(jmp_offset);
403 		emit(A64_B(jmp_offset), ctx);
404 		/* else */
405 		switch (BPF_OP(code)) {
406 		case BPF_DIV:
407 			emit(A64_UDIV(is64, dst, dst, src), ctx);
408 			break;
409 		case BPF_MOD:
410 			emit(A64_UDIV(is64, tmp, dst, src), ctx);
411 			emit(A64_MUL(is64, tmp, tmp, src), ctx);
412 			emit(A64_SUB(is64, dst, dst, tmp), ctx);
413 			break;
414 		}
415 		break;
416 	}
417 	case BPF_ALU | BPF_LSH | BPF_X:
418 	case BPF_ALU64 | BPF_LSH | BPF_X:
419 		emit(A64_LSLV(is64, dst, dst, src), ctx);
420 		break;
421 	case BPF_ALU | BPF_RSH | BPF_X:
422 	case BPF_ALU64 | BPF_RSH | BPF_X:
423 		emit(A64_LSRV(is64, dst, dst, src), ctx);
424 		break;
425 	case BPF_ALU | BPF_ARSH | BPF_X:
426 	case BPF_ALU64 | BPF_ARSH | BPF_X:
427 		emit(A64_ASRV(is64, dst, dst, src), ctx);
428 		break;
429 	/* dst = -dst */
430 	case BPF_ALU | BPF_NEG:
431 	case BPF_ALU64 | BPF_NEG:
432 		emit(A64_NEG(is64, dst, dst), ctx);
433 		break;
434 	/* dst = BSWAP##imm(dst) */
435 	case BPF_ALU | BPF_END | BPF_FROM_LE:
436 	case BPF_ALU | BPF_END | BPF_FROM_BE:
437 #ifdef CONFIG_CPU_BIG_ENDIAN
438 		if (BPF_SRC(code) == BPF_FROM_BE)
439 			goto emit_bswap_uxt;
440 #else /* !CONFIG_CPU_BIG_ENDIAN */
441 		if (BPF_SRC(code) == BPF_FROM_LE)
442 			goto emit_bswap_uxt;
443 #endif
444 		switch (imm) {
445 		case 16:
446 			emit(A64_REV16(is64, dst, dst), ctx);
447 			/* zero-extend 16 bits into 64 bits */
448 			emit(A64_UXTH(is64, dst, dst), ctx);
449 			break;
450 		case 32:
451 			emit(A64_REV32(is64, dst, dst), ctx);
452 			/* upper 32 bits already cleared */
453 			break;
454 		case 64:
455 			emit(A64_REV64(dst, dst), ctx);
456 			break;
457 		}
458 		break;
459 emit_bswap_uxt:
460 		switch (imm) {
461 		case 16:
462 			/* zero-extend 16 bits into 64 bits */
463 			emit(A64_UXTH(is64, dst, dst), ctx);
464 			break;
465 		case 32:
466 			/* zero-extend 32 bits into 64 bits */
467 			emit(A64_UXTW(is64, dst, dst), ctx);
468 			break;
469 		case 64:
470 			/* nop */
471 			break;
472 		}
473 		break;
474 	/* dst = imm */
475 	case BPF_ALU | BPF_MOV | BPF_K:
476 	case BPF_ALU64 | BPF_MOV | BPF_K:
477 		emit_a64_mov_i(is64, dst, imm, ctx);
478 		break;
479 	/* dst = dst OP imm */
480 	case BPF_ALU | BPF_ADD | BPF_K:
481 	case BPF_ALU64 | BPF_ADD | BPF_K:
482 		emit_a64_mov_i(is64, tmp, imm, ctx);
483 		emit(A64_ADD(is64, dst, dst, tmp), ctx);
484 		break;
485 	case BPF_ALU | BPF_SUB | BPF_K:
486 	case BPF_ALU64 | BPF_SUB | BPF_K:
487 		emit_a64_mov_i(is64, tmp, imm, ctx);
488 		emit(A64_SUB(is64, dst, dst, tmp), ctx);
489 		break;
490 	case BPF_ALU | BPF_AND | BPF_K:
491 	case BPF_ALU64 | BPF_AND | BPF_K:
492 		emit_a64_mov_i(is64, tmp, imm, ctx);
493 		emit(A64_AND(is64, dst, dst, tmp), ctx);
494 		break;
495 	case BPF_ALU | BPF_OR | BPF_K:
496 	case BPF_ALU64 | BPF_OR | BPF_K:
497 		emit_a64_mov_i(is64, tmp, imm, ctx);
498 		emit(A64_ORR(is64, dst, dst, tmp), ctx);
499 		break;
500 	case BPF_ALU | BPF_XOR | BPF_K:
501 	case BPF_ALU64 | BPF_XOR | BPF_K:
502 		emit_a64_mov_i(is64, tmp, imm, ctx);
503 		emit(A64_EOR(is64, dst, dst, tmp), ctx);
504 		break;
505 	case BPF_ALU | BPF_MUL | BPF_K:
506 	case BPF_ALU64 | BPF_MUL | BPF_K:
507 		emit_a64_mov_i(is64, tmp, imm, ctx);
508 		emit(A64_MUL(is64, dst, dst, tmp), ctx);
509 		break;
510 	case BPF_ALU | BPF_DIV | BPF_K:
511 	case BPF_ALU64 | BPF_DIV | BPF_K:
512 		emit_a64_mov_i(is64, tmp, imm, ctx);
513 		emit(A64_UDIV(is64, dst, dst, tmp), ctx);
514 		break;
515 	case BPF_ALU | BPF_MOD | BPF_K:
516 	case BPF_ALU64 | BPF_MOD | BPF_K:
517 		emit_a64_mov_i(is64, tmp2, imm, ctx);
518 		emit(A64_UDIV(is64, tmp, dst, tmp2), ctx);
519 		emit(A64_MUL(is64, tmp, tmp, tmp2), ctx);
520 		emit(A64_SUB(is64, dst, dst, tmp), ctx);
521 		break;
522 	case BPF_ALU | BPF_LSH | BPF_K:
523 	case BPF_ALU64 | BPF_LSH | BPF_K:
524 		emit(A64_LSL(is64, dst, dst, imm), ctx);
525 		break;
526 	case BPF_ALU | BPF_RSH | BPF_K:
527 	case BPF_ALU64 | BPF_RSH | BPF_K:
528 		emit(A64_LSR(is64, dst, dst, imm), ctx);
529 		break;
530 	case BPF_ALU | BPF_ARSH | BPF_K:
531 	case BPF_ALU64 | BPF_ARSH | BPF_K:
532 		emit(A64_ASR(is64, dst, dst, imm), ctx);
533 		break;
534 
535 	/* JUMP off */
536 	case BPF_JMP | BPF_JA:
537 		jmp_offset = bpf2a64_offset(i + off, i, ctx);
538 		check_imm26(jmp_offset);
539 		emit(A64_B(jmp_offset), ctx);
540 		break;
541 	/* IF (dst COND src) JUMP off */
542 	case BPF_JMP | BPF_JEQ | BPF_X:
543 	case BPF_JMP | BPF_JGT | BPF_X:
544 	case BPF_JMP | BPF_JLT | BPF_X:
545 	case BPF_JMP | BPF_JGE | BPF_X:
546 	case BPF_JMP | BPF_JLE | BPF_X:
547 	case BPF_JMP | BPF_JNE | BPF_X:
548 	case BPF_JMP | BPF_JSGT | BPF_X:
549 	case BPF_JMP | BPF_JSLT | BPF_X:
550 	case BPF_JMP | BPF_JSGE | BPF_X:
551 	case BPF_JMP | BPF_JSLE | BPF_X:
552 		emit(A64_CMP(1, dst, src), ctx);
553 emit_cond_jmp:
554 		jmp_offset = bpf2a64_offset(i + off, i, ctx);
555 		check_imm19(jmp_offset);
556 		switch (BPF_OP(code)) {
557 		case BPF_JEQ:
558 			jmp_cond = A64_COND_EQ;
559 			break;
560 		case BPF_JGT:
561 			jmp_cond = A64_COND_HI;
562 			break;
563 		case BPF_JLT:
564 			jmp_cond = A64_COND_CC;
565 			break;
566 		case BPF_JGE:
567 			jmp_cond = A64_COND_CS;
568 			break;
569 		case BPF_JLE:
570 			jmp_cond = A64_COND_LS;
571 			break;
572 		case BPF_JSET:
573 		case BPF_JNE:
574 			jmp_cond = A64_COND_NE;
575 			break;
576 		case BPF_JSGT:
577 			jmp_cond = A64_COND_GT;
578 			break;
579 		case BPF_JSLT:
580 			jmp_cond = A64_COND_LT;
581 			break;
582 		case BPF_JSGE:
583 			jmp_cond = A64_COND_GE;
584 			break;
585 		case BPF_JSLE:
586 			jmp_cond = A64_COND_LE;
587 			break;
588 		default:
589 			return -EFAULT;
590 		}
591 		emit(A64_B_(jmp_cond, jmp_offset), ctx);
592 		break;
593 	case BPF_JMP | BPF_JSET | BPF_X:
594 		emit(A64_TST(1, dst, src), ctx);
595 		goto emit_cond_jmp;
596 	/* IF (dst COND imm) JUMP off */
597 	case BPF_JMP | BPF_JEQ | BPF_K:
598 	case BPF_JMP | BPF_JGT | BPF_K:
599 	case BPF_JMP | BPF_JLT | BPF_K:
600 	case BPF_JMP | BPF_JGE | BPF_K:
601 	case BPF_JMP | BPF_JLE | BPF_K:
602 	case BPF_JMP | BPF_JNE | BPF_K:
603 	case BPF_JMP | BPF_JSGT | BPF_K:
604 	case BPF_JMP | BPF_JSLT | BPF_K:
605 	case BPF_JMP | BPF_JSGE | BPF_K:
606 	case BPF_JMP | BPF_JSLE | BPF_K:
607 		emit_a64_mov_i(1, tmp, imm, ctx);
608 		emit(A64_CMP(1, dst, tmp), ctx);
609 		goto emit_cond_jmp;
610 	case BPF_JMP | BPF_JSET | BPF_K:
611 		emit_a64_mov_i(1, tmp, imm, ctx);
612 		emit(A64_TST(1, dst, tmp), ctx);
613 		goto emit_cond_jmp;
614 	/* function call */
615 	case BPF_JMP | BPF_CALL:
616 	{
617 		const u8 r0 = bpf2a64[BPF_REG_0];
618 		const u64 func = (u64)__bpf_call_base + imm;
619 
620 		if (ctx->prog->is_func)
621 			emit_addr_mov_i64(tmp, func, ctx);
622 		else
623 			emit_a64_mov_i64(tmp, func, ctx);
624 		emit(A64_BLR(tmp), ctx);
625 		emit(A64_MOV(1, r0, A64_R(0)), ctx);
626 		break;
627 	}
628 	/* tail call */
629 	case BPF_JMP | BPF_TAIL_CALL:
630 		if (emit_bpf_tail_call(ctx))
631 			return -EFAULT;
632 		break;
633 	/* function return */
634 	case BPF_JMP | BPF_EXIT:
635 		/* Optimization: when last instruction is EXIT,
636 		   simply fallthrough to epilogue. */
637 		if (i == ctx->prog->len - 1)
638 			break;
639 		jmp_offset = epilogue_offset(ctx);
640 		check_imm26(jmp_offset);
641 		emit(A64_B(jmp_offset), ctx);
642 		break;
643 
644 	/* dst = imm64 */
645 	case BPF_LD | BPF_IMM | BPF_DW:
646 	{
647 		const struct bpf_insn insn1 = insn[1];
648 		u64 imm64;
649 
650 		imm64 = (u64)insn1.imm << 32 | (u32)imm;
651 		emit_a64_mov_i64(dst, imm64, ctx);
652 
653 		return 1;
654 	}
655 
656 	/* LDX: dst = *(size *)(src + off) */
657 	case BPF_LDX | BPF_MEM | BPF_W:
658 	case BPF_LDX | BPF_MEM | BPF_H:
659 	case BPF_LDX | BPF_MEM | BPF_B:
660 	case BPF_LDX | BPF_MEM | BPF_DW:
661 		emit_a64_mov_i(1, tmp, off, ctx);
662 		switch (BPF_SIZE(code)) {
663 		case BPF_W:
664 			emit(A64_LDR32(dst, src, tmp), ctx);
665 			break;
666 		case BPF_H:
667 			emit(A64_LDRH(dst, src, tmp), ctx);
668 			break;
669 		case BPF_B:
670 			emit(A64_LDRB(dst, src, tmp), ctx);
671 			break;
672 		case BPF_DW:
673 			emit(A64_LDR64(dst, src, tmp), ctx);
674 			break;
675 		}
676 		break;
677 
678 	/* ST: *(size *)(dst + off) = imm */
679 	case BPF_ST | BPF_MEM | BPF_W:
680 	case BPF_ST | BPF_MEM | BPF_H:
681 	case BPF_ST | BPF_MEM | BPF_B:
682 	case BPF_ST | BPF_MEM | BPF_DW:
683 		/* Load imm to a register then store it */
684 		emit_a64_mov_i(1, tmp2, off, ctx);
685 		emit_a64_mov_i(1, tmp, imm, ctx);
686 		switch (BPF_SIZE(code)) {
687 		case BPF_W:
688 			emit(A64_STR32(tmp, dst, tmp2), ctx);
689 			break;
690 		case BPF_H:
691 			emit(A64_STRH(tmp, dst, tmp2), ctx);
692 			break;
693 		case BPF_B:
694 			emit(A64_STRB(tmp, dst, tmp2), ctx);
695 			break;
696 		case BPF_DW:
697 			emit(A64_STR64(tmp, dst, tmp2), ctx);
698 			break;
699 		}
700 		break;
701 
702 	/* STX: *(size *)(dst + off) = src */
703 	case BPF_STX | BPF_MEM | BPF_W:
704 	case BPF_STX | BPF_MEM | BPF_H:
705 	case BPF_STX | BPF_MEM | BPF_B:
706 	case BPF_STX | BPF_MEM | BPF_DW:
707 		emit_a64_mov_i(1, tmp, off, ctx);
708 		switch (BPF_SIZE(code)) {
709 		case BPF_W:
710 			emit(A64_STR32(src, dst, tmp), ctx);
711 			break;
712 		case BPF_H:
713 			emit(A64_STRH(src, dst, tmp), ctx);
714 			break;
715 		case BPF_B:
716 			emit(A64_STRB(src, dst, tmp), ctx);
717 			break;
718 		case BPF_DW:
719 			emit(A64_STR64(src, dst, tmp), ctx);
720 			break;
721 		}
722 		break;
723 	/* STX XADD: lock *(u32 *)(dst + off) += src */
724 	case BPF_STX | BPF_XADD | BPF_W:
725 	/* STX XADD: lock *(u64 *)(dst + off) += src */
726 	case BPF_STX | BPF_XADD | BPF_DW:
727 		emit_a64_mov_i(1, tmp, off, ctx);
728 		emit(A64_ADD(1, tmp, tmp, dst), ctx);
729 		emit(A64_PRFM(tmp, PST, L1, STRM), ctx);
730 		emit(A64_LDXR(isdw, tmp2, tmp), ctx);
731 		emit(A64_ADD(isdw, tmp2, tmp2, src), ctx);
732 		emit(A64_STXR(isdw, tmp2, tmp, tmp3), ctx);
733 		jmp_offset = -3;
734 		check_imm19(jmp_offset);
735 		emit(A64_CBNZ(0, tmp3, jmp_offset), ctx);
736 		break;
737 
738 	/* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + imm)) */
739 	case BPF_LD | BPF_ABS | BPF_W:
740 	case BPF_LD | BPF_ABS | BPF_H:
741 	case BPF_LD | BPF_ABS | BPF_B:
742 	/* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + src + imm)) */
743 	case BPF_LD | BPF_IND | BPF_W:
744 	case BPF_LD | BPF_IND | BPF_H:
745 	case BPF_LD | BPF_IND | BPF_B:
746 	{
747 		const u8 r0 = bpf2a64[BPF_REG_0]; /* r0 = return value */
748 		const u8 r6 = bpf2a64[BPF_REG_6]; /* r6 = pointer to sk_buff */
749 		const u8 fp = bpf2a64[BPF_REG_FP];
750 		const u8 r1 = bpf2a64[BPF_REG_1]; /* r1: struct sk_buff *skb */
751 		const u8 r2 = bpf2a64[BPF_REG_2]; /* r2: int k */
752 		const u8 r3 = bpf2a64[BPF_REG_3]; /* r3: unsigned int size */
753 		const u8 r4 = bpf2a64[BPF_REG_4]; /* r4: void *buffer */
754 		const u8 r5 = bpf2a64[BPF_REG_5]; /* r5: void *(*func)(...) */
755 		int size;
756 
757 		emit(A64_MOV(1, r1, r6), ctx);
758 		emit_a64_mov_i(0, r2, imm, ctx);
759 		if (BPF_MODE(code) == BPF_IND)
760 			emit(A64_ADD(0, r2, r2, src), ctx);
761 		switch (BPF_SIZE(code)) {
762 		case BPF_W:
763 			size = 4;
764 			break;
765 		case BPF_H:
766 			size = 2;
767 			break;
768 		case BPF_B:
769 			size = 1;
770 			break;
771 		default:
772 			return -EINVAL;
773 		}
774 		emit_a64_mov_i64(r3, size, ctx);
775 		emit(A64_SUB_I(1, r4, fp, ctx->stack_size), ctx);
776 		emit_a64_mov_i64(r5, (unsigned long)bpf_load_pointer, ctx);
777 		emit(A64_BLR(r5), ctx);
778 		emit(A64_MOV(1, r0, A64_R(0)), ctx);
779 
780 		jmp_offset = epilogue_offset(ctx);
781 		check_imm19(jmp_offset);
782 		emit(A64_CBZ(1, r0, jmp_offset), ctx);
783 		emit(A64_MOV(1, r5, r0), ctx);
784 		switch (BPF_SIZE(code)) {
785 		case BPF_W:
786 			emit(A64_LDR32(r0, r5, A64_ZR), ctx);
787 #ifndef CONFIG_CPU_BIG_ENDIAN
788 			emit(A64_REV32(0, r0, r0), ctx);
789 #endif
790 			break;
791 		case BPF_H:
792 			emit(A64_LDRH(r0, r5, A64_ZR), ctx);
793 #ifndef CONFIG_CPU_BIG_ENDIAN
794 			emit(A64_REV16(0, r0, r0), ctx);
795 #endif
796 			break;
797 		case BPF_B:
798 			emit(A64_LDRB(r0, r5, A64_ZR), ctx);
799 			break;
800 		}
801 		break;
802 	}
803 	default:
804 		pr_err_once("unknown opcode %02x\n", code);
805 		return -EINVAL;
806 	}
807 
808 	return 0;
809 }
810 
811 static int build_body(struct jit_ctx *ctx)
812 {
813 	const struct bpf_prog *prog = ctx->prog;
814 	int i;
815 
816 	for (i = 0; i < prog->len; i++) {
817 		const struct bpf_insn *insn = &prog->insnsi[i];
818 		int ret;
819 
820 		ret = build_insn(insn, ctx);
821 		if (ret > 0) {
822 			i++;
823 			if (ctx->image == NULL)
824 				ctx->offset[i] = ctx->idx;
825 			continue;
826 		}
827 		if (ctx->image == NULL)
828 			ctx->offset[i] = ctx->idx;
829 		if (ret)
830 			return ret;
831 	}
832 
833 	return 0;
834 }
835 
836 static int validate_code(struct jit_ctx *ctx)
837 {
838 	int i;
839 
840 	for (i = 0; i < ctx->idx; i++) {
841 		u32 a64_insn = le32_to_cpu(ctx->image[i]);
842 
843 		if (a64_insn == AARCH64_BREAK_FAULT)
844 			return -1;
845 	}
846 
847 	return 0;
848 }
849 
850 static inline void bpf_flush_icache(void *start, void *end)
851 {
852 	flush_icache_range((unsigned long)start, (unsigned long)end);
853 }
854 
855 struct arm64_jit_data {
856 	struct bpf_binary_header *header;
857 	u8 *image;
858 	struct jit_ctx ctx;
859 };
860 
861 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
862 {
863 	struct bpf_prog *tmp, *orig_prog = prog;
864 	struct bpf_binary_header *header;
865 	struct arm64_jit_data *jit_data;
866 	bool tmp_blinded = false;
867 	bool extra_pass = false;
868 	struct jit_ctx ctx;
869 	int image_size;
870 	u8 *image_ptr;
871 
872 	if (!prog->jit_requested)
873 		return orig_prog;
874 
875 	tmp = bpf_jit_blind_constants(prog);
876 	/* If blinding was requested and we failed during blinding,
877 	 * we must fall back to the interpreter.
878 	 */
879 	if (IS_ERR(tmp))
880 		return orig_prog;
881 	if (tmp != prog) {
882 		tmp_blinded = true;
883 		prog = tmp;
884 	}
885 
886 	jit_data = prog->aux->jit_data;
887 	if (!jit_data) {
888 		jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL);
889 		if (!jit_data) {
890 			prog = orig_prog;
891 			goto out;
892 		}
893 		prog->aux->jit_data = jit_data;
894 	}
895 	if (jit_data->ctx.offset) {
896 		ctx = jit_data->ctx;
897 		image_ptr = jit_data->image;
898 		header = jit_data->header;
899 		extra_pass = true;
900 		image_size = sizeof(u32) * ctx.idx;
901 		goto skip_init_ctx;
902 	}
903 	memset(&ctx, 0, sizeof(ctx));
904 	ctx.prog = prog;
905 
906 	ctx.offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL);
907 	if (ctx.offset == NULL) {
908 		prog = orig_prog;
909 		goto out_off;
910 	}
911 
912 	/* 1. Initial fake pass to compute ctx->idx. */
913 
914 	/* Fake pass to fill in ctx->offset. */
915 	if (build_body(&ctx)) {
916 		prog = orig_prog;
917 		goto out_off;
918 	}
919 
920 	if (build_prologue(&ctx)) {
921 		prog = orig_prog;
922 		goto out_off;
923 	}
924 
925 	ctx.epilogue_offset = ctx.idx;
926 	build_epilogue(&ctx);
927 
928 	/* Now we know the actual image size. */
929 	image_size = sizeof(u32) * ctx.idx;
930 	header = bpf_jit_binary_alloc(image_size, &image_ptr,
931 				      sizeof(u32), jit_fill_hole);
932 	if (header == NULL) {
933 		prog = orig_prog;
934 		goto out_off;
935 	}
936 
937 	/* 2. Now, the actual pass. */
938 
939 	ctx.image = (__le32 *)image_ptr;
940 skip_init_ctx:
941 	ctx.idx = 0;
942 
943 	build_prologue(&ctx);
944 
945 	if (build_body(&ctx)) {
946 		bpf_jit_binary_free(header);
947 		prog = orig_prog;
948 		goto out_off;
949 	}
950 
951 	build_epilogue(&ctx);
952 
953 	/* 3. Extra pass to validate JITed code. */
954 	if (validate_code(&ctx)) {
955 		bpf_jit_binary_free(header);
956 		prog = orig_prog;
957 		goto out_off;
958 	}
959 
960 	/* And we're done. */
961 	if (bpf_jit_enable > 1)
962 		bpf_jit_dump(prog->len, image_size, 2, ctx.image);
963 
964 	bpf_flush_icache(header, ctx.image + ctx.idx);
965 
966 	if (!prog->is_func || extra_pass) {
967 		if (extra_pass && ctx.idx != jit_data->ctx.idx) {
968 			pr_err_once("multi-func JIT bug %d != %d\n",
969 				    ctx.idx, jit_data->ctx.idx);
970 			bpf_jit_binary_free(header);
971 			prog->bpf_func = NULL;
972 			prog->jited = 0;
973 			goto out_off;
974 		}
975 		bpf_jit_binary_lock_ro(header);
976 	} else {
977 		jit_data->ctx = ctx;
978 		jit_data->image = image_ptr;
979 		jit_data->header = header;
980 	}
981 	prog->bpf_func = (void *)ctx.image;
982 	prog->jited = 1;
983 	prog->jited_len = image_size;
984 
985 	if (!prog->is_func || extra_pass) {
986 out_off:
987 		kfree(ctx.offset);
988 		kfree(jit_data);
989 		prog->aux->jit_data = NULL;
990 	}
991 out:
992 	if (tmp_blinded)
993 		bpf_jit_prog_release_other(prog, prog == orig_prog ?
994 					   tmp : orig_prog);
995 	return prog;
996 }
997