1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * BPF JIT compiler for ARM64 4 * 5 * Copyright (C) 2014-2016 Zi Shen Lim <zlim.lnx@gmail.com> 6 */ 7 8 #define pr_fmt(fmt) "bpf_jit: " fmt 9 10 #include <linux/bpf.h> 11 #include <linux/filter.h> 12 #include <linux/printk.h> 13 #include <linux/slab.h> 14 15 #include <asm/byteorder.h> 16 #include <asm/cacheflush.h> 17 #include <asm/debug-monitors.h> 18 #include <asm/set_memory.h> 19 20 #include "bpf_jit.h" 21 22 #define TMP_REG_1 (MAX_BPF_JIT_REG + 0) 23 #define TMP_REG_2 (MAX_BPF_JIT_REG + 1) 24 #define TCALL_CNT (MAX_BPF_JIT_REG + 2) 25 #define TMP_REG_3 (MAX_BPF_JIT_REG + 3) 26 27 /* Map BPF registers to A64 registers */ 28 static const int bpf2a64[] = { 29 /* return value from in-kernel function, and exit value from eBPF */ 30 [BPF_REG_0] = A64_R(7), 31 /* arguments from eBPF program to in-kernel function */ 32 [BPF_REG_1] = A64_R(0), 33 [BPF_REG_2] = A64_R(1), 34 [BPF_REG_3] = A64_R(2), 35 [BPF_REG_4] = A64_R(3), 36 [BPF_REG_5] = A64_R(4), 37 /* callee saved registers that in-kernel function will preserve */ 38 [BPF_REG_6] = A64_R(19), 39 [BPF_REG_7] = A64_R(20), 40 [BPF_REG_8] = A64_R(21), 41 [BPF_REG_9] = A64_R(22), 42 /* read-only frame pointer to access stack */ 43 [BPF_REG_FP] = A64_R(25), 44 /* temporary registers for internal BPF JIT */ 45 [TMP_REG_1] = A64_R(10), 46 [TMP_REG_2] = A64_R(11), 47 [TMP_REG_3] = A64_R(12), 48 /* tail_call_cnt */ 49 [TCALL_CNT] = A64_R(26), 50 /* temporary register for blinding constants */ 51 [BPF_REG_AX] = A64_R(9), 52 }; 53 54 struct jit_ctx { 55 const struct bpf_prog *prog; 56 int idx; 57 int epilogue_offset; 58 int *offset; 59 __le32 *image; 60 u32 stack_size; 61 }; 62 63 static inline void emit(const u32 insn, struct jit_ctx *ctx) 64 { 65 if (ctx->image != NULL) 66 ctx->image[ctx->idx] = cpu_to_le32(insn); 67 68 ctx->idx++; 69 } 70 71 static inline void emit_a64_mov_i(const int is64, const int reg, 72 const s32 val, struct jit_ctx *ctx) 73 { 74 u16 hi = val >> 16; 75 u16 lo = val & 0xffff; 76 77 if (hi & 0x8000) { 78 if (hi == 0xffff) { 79 emit(A64_MOVN(is64, reg, (u16)~lo, 0), ctx); 80 } else { 81 emit(A64_MOVN(is64, reg, (u16)~hi, 16), ctx); 82 if (lo != 0xffff) 83 emit(A64_MOVK(is64, reg, lo, 0), ctx); 84 } 85 } else { 86 emit(A64_MOVZ(is64, reg, lo, 0), ctx); 87 if (hi) 88 emit(A64_MOVK(is64, reg, hi, 16), ctx); 89 } 90 } 91 92 static int i64_i16_blocks(const u64 val, bool inverse) 93 { 94 return (((val >> 0) & 0xffff) != (inverse ? 0xffff : 0x0000)) + 95 (((val >> 16) & 0xffff) != (inverse ? 0xffff : 0x0000)) + 96 (((val >> 32) & 0xffff) != (inverse ? 0xffff : 0x0000)) + 97 (((val >> 48) & 0xffff) != (inverse ? 0xffff : 0x0000)); 98 } 99 100 static inline void emit_a64_mov_i64(const int reg, const u64 val, 101 struct jit_ctx *ctx) 102 { 103 u64 nrm_tmp = val, rev_tmp = ~val; 104 bool inverse; 105 int shift; 106 107 if (!(nrm_tmp >> 32)) 108 return emit_a64_mov_i(0, reg, (u32)val, ctx); 109 110 inverse = i64_i16_blocks(nrm_tmp, true) < i64_i16_blocks(nrm_tmp, false); 111 shift = max(round_down((inverse ? (fls64(rev_tmp) - 1) : 112 (fls64(nrm_tmp) - 1)), 16), 0); 113 if (inverse) 114 emit(A64_MOVN(1, reg, (rev_tmp >> shift) & 0xffff, shift), ctx); 115 else 116 emit(A64_MOVZ(1, reg, (nrm_tmp >> shift) & 0xffff, shift), ctx); 117 shift -= 16; 118 while (shift >= 0) { 119 if (((nrm_tmp >> shift) & 0xffff) != (inverse ? 0xffff : 0x0000)) 120 emit(A64_MOVK(1, reg, (nrm_tmp >> shift) & 0xffff, shift), ctx); 121 shift -= 16; 122 } 123 } 124 125 /* 126 * Kernel addresses in the vmalloc space use at most 48 bits, and the 127 * remaining bits are guaranteed to be 0x1. So we can compose the address 128 * with a fixed length movn/movk/movk sequence. 129 */ 130 static inline void emit_addr_mov_i64(const int reg, const u64 val, 131 struct jit_ctx *ctx) 132 { 133 u64 tmp = val; 134 int shift = 0; 135 136 emit(A64_MOVN(1, reg, ~tmp & 0xffff, shift), ctx); 137 while (shift < 32) { 138 tmp >>= 16; 139 shift += 16; 140 emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx); 141 } 142 } 143 144 static inline int bpf2a64_offset(int bpf_to, int bpf_from, 145 const struct jit_ctx *ctx) 146 { 147 int to = ctx->offset[bpf_to]; 148 /* -1 to account for the Branch instruction */ 149 int from = ctx->offset[bpf_from] - 1; 150 151 return to - from; 152 } 153 154 static void jit_fill_hole(void *area, unsigned int size) 155 { 156 __le32 *ptr; 157 /* We are guaranteed to have aligned memory. */ 158 for (ptr = area; size >= sizeof(u32); size -= sizeof(u32)) 159 *ptr++ = cpu_to_le32(AARCH64_BREAK_FAULT); 160 } 161 162 static inline int epilogue_offset(const struct jit_ctx *ctx) 163 { 164 int to = ctx->epilogue_offset; 165 int from = ctx->idx; 166 167 return to - from; 168 } 169 170 /* Stack must be multiples of 16B */ 171 #define STACK_ALIGN(sz) (((sz) + 15) & ~15) 172 173 /* Tail call offset to jump into */ 174 #define PROLOGUE_OFFSET 7 175 176 static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf) 177 { 178 const struct bpf_prog *prog = ctx->prog; 179 const u8 r6 = bpf2a64[BPF_REG_6]; 180 const u8 r7 = bpf2a64[BPF_REG_7]; 181 const u8 r8 = bpf2a64[BPF_REG_8]; 182 const u8 r9 = bpf2a64[BPF_REG_9]; 183 const u8 fp = bpf2a64[BPF_REG_FP]; 184 const u8 tcc = bpf2a64[TCALL_CNT]; 185 const int idx0 = ctx->idx; 186 int cur_offset; 187 188 /* 189 * BPF prog stack layout 190 * 191 * high 192 * original A64_SP => 0:+-----+ BPF prologue 193 * |FP/LR| 194 * current A64_FP => -16:+-----+ 195 * | ... | callee saved registers 196 * BPF fp register => -64:+-----+ <= (BPF_FP) 197 * | | 198 * | ... | BPF prog stack 199 * | | 200 * +-----+ <= (BPF_FP - prog->aux->stack_depth) 201 * |RSVD | padding 202 * current A64_SP => +-----+ <= (BPF_FP - ctx->stack_size) 203 * | | 204 * | ... | Function call stack 205 * | | 206 * +-----+ 207 * low 208 * 209 */ 210 211 /* Save FP and LR registers to stay align with ARM64 AAPCS */ 212 emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx); 213 emit(A64_MOV(1, A64_FP, A64_SP), ctx); 214 215 /* Save callee-saved registers */ 216 emit(A64_PUSH(r6, r7, A64_SP), ctx); 217 emit(A64_PUSH(r8, r9, A64_SP), ctx); 218 emit(A64_PUSH(fp, tcc, A64_SP), ctx); 219 220 /* Set up BPF prog stack base register */ 221 emit(A64_MOV(1, fp, A64_SP), ctx); 222 223 if (!ebpf_from_cbpf) { 224 /* Initialize tail_call_cnt */ 225 emit(A64_MOVZ(1, tcc, 0, 0), ctx); 226 227 cur_offset = ctx->idx - idx0; 228 if (cur_offset != PROLOGUE_OFFSET) { 229 pr_err_once("PROLOGUE_OFFSET = %d, expected %d!\n", 230 cur_offset, PROLOGUE_OFFSET); 231 return -1; 232 } 233 } 234 235 ctx->stack_size = STACK_ALIGN(prog->aux->stack_depth); 236 237 /* Set up function call stack */ 238 emit(A64_SUB_I(1, A64_SP, A64_SP, ctx->stack_size), ctx); 239 return 0; 240 } 241 242 static int out_offset = -1; /* initialized on the first pass of build_body() */ 243 static int emit_bpf_tail_call(struct jit_ctx *ctx) 244 { 245 /* bpf_tail_call(void *prog_ctx, struct bpf_array *array, u64 index) */ 246 const u8 r2 = bpf2a64[BPF_REG_2]; 247 const u8 r3 = bpf2a64[BPF_REG_3]; 248 249 const u8 tmp = bpf2a64[TMP_REG_1]; 250 const u8 prg = bpf2a64[TMP_REG_2]; 251 const u8 tcc = bpf2a64[TCALL_CNT]; 252 const int idx0 = ctx->idx; 253 #define cur_offset (ctx->idx - idx0) 254 #define jmp_offset (out_offset - (cur_offset)) 255 size_t off; 256 257 /* if (index >= array->map.max_entries) 258 * goto out; 259 */ 260 off = offsetof(struct bpf_array, map.max_entries); 261 emit_a64_mov_i64(tmp, off, ctx); 262 emit(A64_LDR32(tmp, r2, tmp), ctx); 263 emit(A64_MOV(0, r3, r3), ctx); 264 emit(A64_CMP(0, r3, tmp), ctx); 265 emit(A64_B_(A64_COND_CS, jmp_offset), ctx); 266 267 /* if (tail_call_cnt > MAX_TAIL_CALL_CNT) 268 * goto out; 269 * tail_call_cnt++; 270 */ 271 emit_a64_mov_i64(tmp, MAX_TAIL_CALL_CNT, ctx); 272 emit(A64_CMP(1, tcc, tmp), ctx); 273 emit(A64_B_(A64_COND_HI, jmp_offset), ctx); 274 emit(A64_ADD_I(1, tcc, tcc, 1), ctx); 275 276 /* prog = array->ptrs[index]; 277 * if (prog == NULL) 278 * goto out; 279 */ 280 off = offsetof(struct bpf_array, ptrs); 281 emit_a64_mov_i64(tmp, off, ctx); 282 emit(A64_ADD(1, tmp, r2, tmp), ctx); 283 emit(A64_LSL(1, prg, r3, 3), ctx); 284 emit(A64_LDR64(prg, tmp, prg), ctx); 285 emit(A64_CBZ(1, prg, jmp_offset), ctx); 286 287 /* goto *(prog->bpf_func + prologue_offset); */ 288 off = offsetof(struct bpf_prog, bpf_func); 289 emit_a64_mov_i64(tmp, off, ctx); 290 emit(A64_LDR64(tmp, prg, tmp), ctx); 291 emit(A64_ADD_I(1, tmp, tmp, sizeof(u32) * PROLOGUE_OFFSET), ctx); 292 emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx); 293 emit(A64_BR(tmp), ctx); 294 295 /* out: */ 296 if (out_offset == -1) 297 out_offset = cur_offset; 298 if (cur_offset != out_offset) { 299 pr_err_once("tail_call out_offset = %d, expected %d!\n", 300 cur_offset, out_offset); 301 return -1; 302 } 303 return 0; 304 #undef cur_offset 305 #undef jmp_offset 306 } 307 308 static void build_epilogue(struct jit_ctx *ctx) 309 { 310 const u8 r0 = bpf2a64[BPF_REG_0]; 311 const u8 r6 = bpf2a64[BPF_REG_6]; 312 const u8 r7 = bpf2a64[BPF_REG_7]; 313 const u8 r8 = bpf2a64[BPF_REG_8]; 314 const u8 r9 = bpf2a64[BPF_REG_9]; 315 const u8 fp = bpf2a64[BPF_REG_FP]; 316 317 /* We're done with BPF stack */ 318 emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx); 319 320 /* Restore fs (x25) and x26 */ 321 emit(A64_POP(fp, A64_R(26), A64_SP), ctx); 322 323 /* Restore callee-saved register */ 324 emit(A64_POP(r8, r9, A64_SP), ctx); 325 emit(A64_POP(r6, r7, A64_SP), ctx); 326 327 /* Restore FP/LR registers */ 328 emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx); 329 330 /* Set return value */ 331 emit(A64_MOV(1, A64_R(0), r0), ctx); 332 333 emit(A64_RET(A64_LR), ctx); 334 } 335 336 /* JITs an eBPF instruction. 337 * Returns: 338 * 0 - successfully JITed an 8-byte eBPF instruction. 339 * >0 - successfully JITed a 16-byte eBPF instruction. 340 * <0 - failed to JIT. 341 */ 342 static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, 343 bool extra_pass) 344 { 345 const u8 code = insn->code; 346 const u8 dst = bpf2a64[insn->dst_reg]; 347 const u8 src = bpf2a64[insn->src_reg]; 348 const u8 tmp = bpf2a64[TMP_REG_1]; 349 const u8 tmp2 = bpf2a64[TMP_REG_2]; 350 const u8 tmp3 = bpf2a64[TMP_REG_3]; 351 const s16 off = insn->off; 352 const s32 imm = insn->imm; 353 const int i = insn - ctx->prog->insnsi; 354 const bool is64 = BPF_CLASS(code) == BPF_ALU64 || 355 BPF_CLASS(code) == BPF_JMP; 356 const bool isdw = BPF_SIZE(code) == BPF_DW; 357 u8 jmp_cond, reg; 358 s32 jmp_offset; 359 360 #define check_imm(bits, imm) do { \ 361 if ((((imm) > 0) && ((imm) >> (bits))) || \ 362 (((imm) < 0) && (~(imm) >> (bits)))) { \ 363 pr_info("[%2d] imm=%d(0x%x) out of range\n", \ 364 i, imm, imm); \ 365 return -EINVAL; \ 366 } \ 367 } while (0) 368 #define check_imm19(imm) check_imm(19, imm) 369 #define check_imm26(imm) check_imm(26, imm) 370 371 switch (code) { 372 /* dst = src */ 373 case BPF_ALU | BPF_MOV | BPF_X: 374 case BPF_ALU64 | BPF_MOV | BPF_X: 375 emit(A64_MOV(is64, dst, src), ctx); 376 break; 377 /* dst = dst OP src */ 378 case BPF_ALU | BPF_ADD | BPF_X: 379 case BPF_ALU64 | BPF_ADD | BPF_X: 380 emit(A64_ADD(is64, dst, dst, src), ctx); 381 break; 382 case BPF_ALU | BPF_SUB | BPF_X: 383 case BPF_ALU64 | BPF_SUB | BPF_X: 384 emit(A64_SUB(is64, dst, dst, src), ctx); 385 break; 386 case BPF_ALU | BPF_AND | BPF_X: 387 case BPF_ALU64 | BPF_AND | BPF_X: 388 emit(A64_AND(is64, dst, dst, src), ctx); 389 break; 390 case BPF_ALU | BPF_OR | BPF_X: 391 case BPF_ALU64 | BPF_OR | BPF_X: 392 emit(A64_ORR(is64, dst, dst, src), ctx); 393 break; 394 case BPF_ALU | BPF_XOR | BPF_X: 395 case BPF_ALU64 | BPF_XOR | BPF_X: 396 emit(A64_EOR(is64, dst, dst, src), ctx); 397 break; 398 case BPF_ALU | BPF_MUL | BPF_X: 399 case BPF_ALU64 | BPF_MUL | BPF_X: 400 emit(A64_MUL(is64, dst, dst, src), ctx); 401 break; 402 case BPF_ALU | BPF_DIV | BPF_X: 403 case BPF_ALU64 | BPF_DIV | BPF_X: 404 case BPF_ALU | BPF_MOD | BPF_X: 405 case BPF_ALU64 | BPF_MOD | BPF_X: 406 switch (BPF_OP(code)) { 407 case BPF_DIV: 408 emit(A64_UDIV(is64, dst, dst, src), ctx); 409 break; 410 case BPF_MOD: 411 emit(A64_UDIV(is64, tmp, dst, src), ctx); 412 emit(A64_MSUB(is64, dst, dst, tmp, src), ctx); 413 break; 414 } 415 break; 416 case BPF_ALU | BPF_LSH | BPF_X: 417 case BPF_ALU64 | BPF_LSH | BPF_X: 418 emit(A64_LSLV(is64, dst, dst, src), ctx); 419 break; 420 case BPF_ALU | BPF_RSH | BPF_X: 421 case BPF_ALU64 | BPF_RSH | BPF_X: 422 emit(A64_LSRV(is64, dst, dst, src), ctx); 423 break; 424 case BPF_ALU | BPF_ARSH | BPF_X: 425 case BPF_ALU64 | BPF_ARSH | BPF_X: 426 emit(A64_ASRV(is64, dst, dst, src), ctx); 427 break; 428 /* dst = -dst */ 429 case BPF_ALU | BPF_NEG: 430 case BPF_ALU64 | BPF_NEG: 431 emit(A64_NEG(is64, dst, dst), ctx); 432 break; 433 /* dst = BSWAP##imm(dst) */ 434 case BPF_ALU | BPF_END | BPF_FROM_LE: 435 case BPF_ALU | BPF_END | BPF_FROM_BE: 436 #ifdef CONFIG_CPU_BIG_ENDIAN 437 if (BPF_SRC(code) == BPF_FROM_BE) 438 goto emit_bswap_uxt; 439 #else /* !CONFIG_CPU_BIG_ENDIAN */ 440 if (BPF_SRC(code) == BPF_FROM_LE) 441 goto emit_bswap_uxt; 442 #endif 443 switch (imm) { 444 case 16: 445 emit(A64_REV16(is64, dst, dst), ctx); 446 /* zero-extend 16 bits into 64 bits */ 447 emit(A64_UXTH(is64, dst, dst), ctx); 448 break; 449 case 32: 450 emit(A64_REV32(is64, dst, dst), ctx); 451 /* upper 32 bits already cleared */ 452 break; 453 case 64: 454 emit(A64_REV64(dst, dst), ctx); 455 break; 456 } 457 break; 458 emit_bswap_uxt: 459 switch (imm) { 460 case 16: 461 /* zero-extend 16 bits into 64 bits */ 462 emit(A64_UXTH(is64, dst, dst), ctx); 463 break; 464 case 32: 465 /* zero-extend 32 bits into 64 bits */ 466 emit(A64_UXTW(is64, dst, dst), ctx); 467 break; 468 case 64: 469 /* nop */ 470 break; 471 } 472 break; 473 /* dst = imm */ 474 case BPF_ALU | BPF_MOV | BPF_K: 475 case BPF_ALU64 | BPF_MOV | BPF_K: 476 emit_a64_mov_i(is64, dst, imm, ctx); 477 break; 478 /* dst = dst OP imm */ 479 case BPF_ALU | BPF_ADD | BPF_K: 480 case BPF_ALU64 | BPF_ADD | BPF_K: 481 emit_a64_mov_i(is64, tmp, imm, ctx); 482 emit(A64_ADD(is64, dst, dst, tmp), ctx); 483 break; 484 case BPF_ALU | BPF_SUB | BPF_K: 485 case BPF_ALU64 | BPF_SUB | BPF_K: 486 emit_a64_mov_i(is64, tmp, imm, ctx); 487 emit(A64_SUB(is64, dst, dst, tmp), ctx); 488 break; 489 case BPF_ALU | BPF_AND | BPF_K: 490 case BPF_ALU64 | BPF_AND | BPF_K: 491 emit_a64_mov_i(is64, tmp, imm, ctx); 492 emit(A64_AND(is64, dst, dst, tmp), ctx); 493 break; 494 case BPF_ALU | BPF_OR | BPF_K: 495 case BPF_ALU64 | BPF_OR | BPF_K: 496 emit_a64_mov_i(is64, tmp, imm, ctx); 497 emit(A64_ORR(is64, dst, dst, tmp), ctx); 498 break; 499 case BPF_ALU | BPF_XOR | BPF_K: 500 case BPF_ALU64 | BPF_XOR | BPF_K: 501 emit_a64_mov_i(is64, tmp, imm, ctx); 502 emit(A64_EOR(is64, dst, dst, tmp), ctx); 503 break; 504 case BPF_ALU | BPF_MUL | BPF_K: 505 case BPF_ALU64 | BPF_MUL | BPF_K: 506 emit_a64_mov_i(is64, tmp, imm, ctx); 507 emit(A64_MUL(is64, dst, dst, tmp), ctx); 508 break; 509 case BPF_ALU | BPF_DIV | BPF_K: 510 case BPF_ALU64 | BPF_DIV | BPF_K: 511 emit_a64_mov_i(is64, tmp, imm, ctx); 512 emit(A64_UDIV(is64, dst, dst, tmp), ctx); 513 break; 514 case BPF_ALU | BPF_MOD | BPF_K: 515 case BPF_ALU64 | BPF_MOD | BPF_K: 516 emit_a64_mov_i(is64, tmp2, imm, ctx); 517 emit(A64_UDIV(is64, tmp, dst, tmp2), ctx); 518 emit(A64_MSUB(is64, dst, dst, tmp, tmp2), ctx); 519 break; 520 case BPF_ALU | BPF_LSH | BPF_K: 521 case BPF_ALU64 | BPF_LSH | BPF_K: 522 emit(A64_LSL(is64, dst, dst, imm), ctx); 523 break; 524 case BPF_ALU | BPF_RSH | BPF_K: 525 case BPF_ALU64 | BPF_RSH | BPF_K: 526 emit(A64_LSR(is64, dst, dst, imm), ctx); 527 break; 528 case BPF_ALU | BPF_ARSH | BPF_K: 529 case BPF_ALU64 | BPF_ARSH | BPF_K: 530 emit(A64_ASR(is64, dst, dst, imm), ctx); 531 break; 532 533 /* JUMP off */ 534 case BPF_JMP | BPF_JA: 535 jmp_offset = bpf2a64_offset(i + off, i, ctx); 536 check_imm26(jmp_offset); 537 emit(A64_B(jmp_offset), ctx); 538 break; 539 /* IF (dst COND src) JUMP off */ 540 case BPF_JMP | BPF_JEQ | BPF_X: 541 case BPF_JMP | BPF_JGT | BPF_X: 542 case BPF_JMP | BPF_JLT | BPF_X: 543 case BPF_JMP | BPF_JGE | BPF_X: 544 case BPF_JMP | BPF_JLE | BPF_X: 545 case BPF_JMP | BPF_JNE | BPF_X: 546 case BPF_JMP | BPF_JSGT | BPF_X: 547 case BPF_JMP | BPF_JSLT | BPF_X: 548 case BPF_JMP | BPF_JSGE | BPF_X: 549 case BPF_JMP | BPF_JSLE | BPF_X: 550 case BPF_JMP32 | BPF_JEQ | BPF_X: 551 case BPF_JMP32 | BPF_JGT | BPF_X: 552 case BPF_JMP32 | BPF_JLT | BPF_X: 553 case BPF_JMP32 | BPF_JGE | BPF_X: 554 case BPF_JMP32 | BPF_JLE | BPF_X: 555 case BPF_JMP32 | BPF_JNE | BPF_X: 556 case BPF_JMP32 | BPF_JSGT | BPF_X: 557 case BPF_JMP32 | BPF_JSLT | BPF_X: 558 case BPF_JMP32 | BPF_JSGE | BPF_X: 559 case BPF_JMP32 | BPF_JSLE | BPF_X: 560 emit(A64_CMP(is64, dst, src), ctx); 561 emit_cond_jmp: 562 jmp_offset = bpf2a64_offset(i + off, i, ctx); 563 check_imm19(jmp_offset); 564 switch (BPF_OP(code)) { 565 case BPF_JEQ: 566 jmp_cond = A64_COND_EQ; 567 break; 568 case BPF_JGT: 569 jmp_cond = A64_COND_HI; 570 break; 571 case BPF_JLT: 572 jmp_cond = A64_COND_CC; 573 break; 574 case BPF_JGE: 575 jmp_cond = A64_COND_CS; 576 break; 577 case BPF_JLE: 578 jmp_cond = A64_COND_LS; 579 break; 580 case BPF_JSET: 581 case BPF_JNE: 582 jmp_cond = A64_COND_NE; 583 break; 584 case BPF_JSGT: 585 jmp_cond = A64_COND_GT; 586 break; 587 case BPF_JSLT: 588 jmp_cond = A64_COND_LT; 589 break; 590 case BPF_JSGE: 591 jmp_cond = A64_COND_GE; 592 break; 593 case BPF_JSLE: 594 jmp_cond = A64_COND_LE; 595 break; 596 default: 597 return -EFAULT; 598 } 599 emit(A64_B_(jmp_cond, jmp_offset), ctx); 600 break; 601 case BPF_JMP | BPF_JSET | BPF_X: 602 case BPF_JMP32 | BPF_JSET | BPF_X: 603 emit(A64_TST(is64, dst, src), ctx); 604 goto emit_cond_jmp; 605 /* IF (dst COND imm) JUMP off */ 606 case BPF_JMP | BPF_JEQ | BPF_K: 607 case BPF_JMP | BPF_JGT | BPF_K: 608 case BPF_JMP | BPF_JLT | BPF_K: 609 case BPF_JMP | BPF_JGE | BPF_K: 610 case BPF_JMP | BPF_JLE | BPF_K: 611 case BPF_JMP | BPF_JNE | BPF_K: 612 case BPF_JMP | BPF_JSGT | BPF_K: 613 case BPF_JMP | BPF_JSLT | BPF_K: 614 case BPF_JMP | BPF_JSGE | BPF_K: 615 case BPF_JMP | BPF_JSLE | BPF_K: 616 case BPF_JMP32 | BPF_JEQ | BPF_K: 617 case BPF_JMP32 | BPF_JGT | BPF_K: 618 case BPF_JMP32 | BPF_JLT | BPF_K: 619 case BPF_JMP32 | BPF_JGE | BPF_K: 620 case BPF_JMP32 | BPF_JLE | BPF_K: 621 case BPF_JMP32 | BPF_JNE | BPF_K: 622 case BPF_JMP32 | BPF_JSGT | BPF_K: 623 case BPF_JMP32 | BPF_JSLT | BPF_K: 624 case BPF_JMP32 | BPF_JSGE | BPF_K: 625 case BPF_JMP32 | BPF_JSLE | BPF_K: 626 emit_a64_mov_i(is64, tmp, imm, ctx); 627 emit(A64_CMP(is64, dst, tmp), ctx); 628 goto emit_cond_jmp; 629 case BPF_JMP | BPF_JSET | BPF_K: 630 case BPF_JMP32 | BPF_JSET | BPF_K: 631 emit_a64_mov_i(is64, tmp, imm, ctx); 632 emit(A64_TST(is64, dst, tmp), ctx); 633 goto emit_cond_jmp; 634 /* function call */ 635 case BPF_JMP | BPF_CALL: 636 { 637 const u8 r0 = bpf2a64[BPF_REG_0]; 638 bool func_addr_fixed; 639 u64 func_addr; 640 int ret; 641 642 ret = bpf_jit_get_func_addr(ctx->prog, insn, extra_pass, 643 &func_addr, &func_addr_fixed); 644 if (ret < 0) 645 return ret; 646 emit_addr_mov_i64(tmp, func_addr, ctx); 647 emit(A64_BLR(tmp), ctx); 648 emit(A64_MOV(1, r0, A64_R(0)), ctx); 649 break; 650 } 651 /* tail call */ 652 case BPF_JMP | BPF_TAIL_CALL: 653 if (emit_bpf_tail_call(ctx)) 654 return -EFAULT; 655 break; 656 /* function return */ 657 case BPF_JMP | BPF_EXIT: 658 /* Optimization: when last instruction is EXIT, 659 simply fallthrough to epilogue. */ 660 if (i == ctx->prog->len - 1) 661 break; 662 jmp_offset = epilogue_offset(ctx); 663 check_imm26(jmp_offset); 664 emit(A64_B(jmp_offset), ctx); 665 break; 666 667 /* dst = imm64 */ 668 case BPF_LD | BPF_IMM | BPF_DW: 669 { 670 const struct bpf_insn insn1 = insn[1]; 671 u64 imm64; 672 673 imm64 = (u64)insn1.imm << 32 | (u32)imm; 674 emit_a64_mov_i64(dst, imm64, ctx); 675 676 return 1; 677 } 678 679 /* LDX: dst = *(size *)(src + off) */ 680 case BPF_LDX | BPF_MEM | BPF_W: 681 case BPF_LDX | BPF_MEM | BPF_H: 682 case BPF_LDX | BPF_MEM | BPF_B: 683 case BPF_LDX | BPF_MEM | BPF_DW: 684 emit_a64_mov_i(1, tmp, off, ctx); 685 switch (BPF_SIZE(code)) { 686 case BPF_W: 687 emit(A64_LDR32(dst, src, tmp), ctx); 688 break; 689 case BPF_H: 690 emit(A64_LDRH(dst, src, tmp), ctx); 691 break; 692 case BPF_B: 693 emit(A64_LDRB(dst, src, tmp), ctx); 694 break; 695 case BPF_DW: 696 emit(A64_LDR64(dst, src, tmp), ctx); 697 break; 698 } 699 break; 700 701 /* ST: *(size *)(dst + off) = imm */ 702 case BPF_ST | BPF_MEM | BPF_W: 703 case BPF_ST | BPF_MEM | BPF_H: 704 case BPF_ST | BPF_MEM | BPF_B: 705 case BPF_ST | BPF_MEM | BPF_DW: 706 /* Load imm to a register then store it */ 707 emit_a64_mov_i(1, tmp2, off, ctx); 708 emit_a64_mov_i(1, tmp, imm, ctx); 709 switch (BPF_SIZE(code)) { 710 case BPF_W: 711 emit(A64_STR32(tmp, dst, tmp2), ctx); 712 break; 713 case BPF_H: 714 emit(A64_STRH(tmp, dst, tmp2), ctx); 715 break; 716 case BPF_B: 717 emit(A64_STRB(tmp, dst, tmp2), ctx); 718 break; 719 case BPF_DW: 720 emit(A64_STR64(tmp, dst, tmp2), ctx); 721 break; 722 } 723 break; 724 725 /* STX: *(size *)(dst + off) = src */ 726 case BPF_STX | BPF_MEM | BPF_W: 727 case BPF_STX | BPF_MEM | BPF_H: 728 case BPF_STX | BPF_MEM | BPF_B: 729 case BPF_STX | BPF_MEM | BPF_DW: 730 emit_a64_mov_i(1, tmp, off, ctx); 731 switch (BPF_SIZE(code)) { 732 case BPF_W: 733 emit(A64_STR32(src, dst, tmp), ctx); 734 break; 735 case BPF_H: 736 emit(A64_STRH(src, dst, tmp), ctx); 737 break; 738 case BPF_B: 739 emit(A64_STRB(src, dst, tmp), ctx); 740 break; 741 case BPF_DW: 742 emit(A64_STR64(src, dst, tmp), ctx); 743 break; 744 } 745 break; 746 747 /* STX XADD: lock *(u32 *)(dst + off) += src */ 748 case BPF_STX | BPF_XADD | BPF_W: 749 /* STX XADD: lock *(u64 *)(dst + off) += src */ 750 case BPF_STX | BPF_XADD | BPF_DW: 751 if (!off) { 752 reg = dst; 753 } else { 754 emit_a64_mov_i(1, tmp, off, ctx); 755 emit(A64_ADD(1, tmp, tmp, dst), ctx); 756 reg = tmp; 757 } 758 if (cpus_have_cap(ARM64_HAS_LSE_ATOMICS)) { 759 emit(A64_STADD(isdw, reg, src), ctx); 760 } else { 761 emit(A64_LDXR(isdw, tmp2, reg), ctx); 762 emit(A64_ADD(isdw, tmp2, tmp2, src), ctx); 763 emit(A64_STXR(isdw, tmp2, reg, tmp3), ctx); 764 jmp_offset = -3; 765 check_imm19(jmp_offset); 766 emit(A64_CBNZ(0, tmp3, jmp_offset), ctx); 767 } 768 break; 769 770 default: 771 pr_err_once("unknown opcode %02x\n", code); 772 return -EINVAL; 773 } 774 775 return 0; 776 } 777 778 static int build_body(struct jit_ctx *ctx, bool extra_pass) 779 { 780 const struct bpf_prog *prog = ctx->prog; 781 int i; 782 783 for (i = 0; i < prog->len; i++) { 784 const struct bpf_insn *insn = &prog->insnsi[i]; 785 int ret; 786 787 ret = build_insn(insn, ctx, extra_pass); 788 if (ret > 0) { 789 i++; 790 if (ctx->image == NULL) 791 ctx->offset[i] = ctx->idx; 792 continue; 793 } 794 if (ctx->image == NULL) 795 ctx->offset[i] = ctx->idx; 796 if (ret) 797 return ret; 798 } 799 800 return 0; 801 } 802 803 static int validate_code(struct jit_ctx *ctx) 804 { 805 int i; 806 807 for (i = 0; i < ctx->idx; i++) { 808 u32 a64_insn = le32_to_cpu(ctx->image[i]); 809 810 if (a64_insn == AARCH64_BREAK_FAULT) 811 return -1; 812 } 813 814 return 0; 815 } 816 817 static inline void bpf_flush_icache(void *start, void *end) 818 { 819 flush_icache_range((unsigned long)start, (unsigned long)end); 820 } 821 822 struct arm64_jit_data { 823 struct bpf_binary_header *header; 824 u8 *image; 825 struct jit_ctx ctx; 826 }; 827 828 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) 829 { 830 struct bpf_prog *tmp, *orig_prog = prog; 831 struct bpf_binary_header *header; 832 struct arm64_jit_data *jit_data; 833 bool was_classic = bpf_prog_was_classic(prog); 834 bool tmp_blinded = false; 835 bool extra_pass = false; 836 struct jit_ctx ctx; 837 int image_size; 838 u8 *image_ptr; 839 840 if (!prog->jit_requested) 841 return orig_prog; 842 843 tmp = bpf_jit_blind_constants(prog); 844 /* If blinding was requested and we failed during blinding, 845 * we must fall back to the interpreter. 846 */ 847 if (IS_ERR(tmp)) 848 return orig_prog; 849 if (tmp != prog) { 850 tmp_blinded = true; 851 prog = tmp; 852 } 853 854 jit_data = prog->aux->jit_data; 855 if (!jit_data) { 856 jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL); 857 if (!jit_data) { 858 prog = orig_prog; 859 goto out; 860 } 861 prog->aux->jit_data = jit_data; 862 } 863 if (jit_data->ctx.offset) { 864 ctx = jit_data->ctx; 865 image_ptr = jit_data->image; 866 header = jit_data->header; 867 extra_pass = true; 868 image_size = sizeof(u32) * ctx.idx; 869 goto skip_init_ctx; 870 } 871 memset(&ctx, 0, sizeof(ctx)); 872 ctx.prog = prog; 873 874 ctx.offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL); 875 if (ctx.offset == NULL) { 876 prog = orig_prog; 877 goto out_off; 878 } 879 880 /* 1. Initial fake pass to compute ctx->idx. */ 881 882 /* Fake pass to fill in ctx->offset. */ 883 if (build_body(&ctx, extra_pass)) { 884 prog = orig_prog; 885 goto out_off; 886 } 887 888 if (build_prologue(&ctx, was_classic)) { 889 prog = orig_prog; 890 goto out_off; 891 } 892 893 ctx.epilogue_offset = ctx.idx; 894 build_epilogue(&ctx); 895 896 /* Now we know the actual image size. */ 897 image_size = sizeof(u32) * ctx.idx; 898 header = bpf_jit_binary_alloc(image_size, &image_ptr, 899 sizeof(u32), jit_fill_hole); 900 if (header == NULL) { 901 prog = orig_prog; 902 goto out_off; 903 } 904 905 /* 2. Now, the actual pass. */ 906 907 ctx.image = (__le32 *)image_ptr; 908 skip_init_ctx: 909 ctx.idx = 0; 910 911 build_prologue(&ctx, was_classic); 912 913 if (build_body(&ctx, extra_pass)) { 914 bpf_jit_binary_free(header); 915 prog = orig_prog; 916 goto out_off; 917 } 918 919 build_epilogue(&ctx); 920 921 /* 3. Extra pass to validate JITed code. */ 922 if (validate_code(&ctx)) { 923 bpf_jit_binary_free(header); 924 prog = orig_prog; 925 goto out_off; 926 } 927 928 /* And we're done. */ 929 if (bpf_jit_enable > 1) 930 bpf_jit_dump(prog->len, image_size, 2, ctx.image); 931 932 bpf_flush_icache(header, ctx.image + ctx.idx); 933 934 if (!prog->is_func || extra_pass) { 935 if (extra_pass && ctx.idx != jit_data->ctx.idx) { 936 pr_err_once("multi-func JIT bug %d != %d\n", 937 ctx.idx, jit_data->ctx.idx); 938 bpf_jit_binary_free(header); 939 prog->bpf_func = NULL; 940 prog->jited = 0; 941 goto out_off; 942 } 943 bpf_jit_binary_lock_ro(header); 944 } else { 945 jit_data->ctx = ctx; 946 jit_data->image = image_ptr; 947 jit_data->header = header; 948 } 949 prog->bpf_func = (void *)ctx.image; 950 prog->jited = 1; 951 prog->jited_len = image_size; 952 953 if (!prog->is_func || extra_pass) { 954 bpf_prog_fill_jited_linfo(prog, ctx.offset); 955 out_off: 956 kfree(ctx.offset); 957 kfree(jit_data); 958 prog->aux->jit_data = NULL; 959 } 960 out: 961 if (tmp_blinded) 962 bpf_jit_prog_release_other(prog, prog == orig_prog ? 963 tmp : orig_prog); 964 return prog; 965 } 966 967 void *bpf_jit_alloc_exec(unsigned long size) 968 { 969 return __vmalloc_node_range(size, PAGE_SIZE, BPF_JIT_REGION_START, 970 BPF_JIT_REGION_END, GFP_KERNEL, 971 PAGE_KERNEL, 0, NUMA_NO_NODE, 972 __builtin_return_address(0)); 973 } 974 975 void bpf_jit_free_exec(void *addr) 976 { 977 return vfree(addr); 978 } 979