1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 205a9e3e15SJisheng Zhang #include <linux/cache.h> 21c1cc1552SCatalin Marinas #include <linux/export.h> 22c1cc1552SCatalin Marinas #include <linux/kernel.h> 23c1cc1552SCatalin Marinas #include <linux/errno.h> 24c1cc1552SCatalin Marinas #include <linux/init.h> 2561bd93ceSArd Biesheuvel #include <linux/libfdt.h> 26c1cc1552SCatalin Marinas #include <linux/mman.h> 27c1cc1552SCatalin Marinas #include <linux/nodemask.h> 28c1cc1552SCatalin Marinas #include <linux/memblock.h> 29c1cc1552SCatalin Marinas #include <linux/fs.h> 302475ff9dSCatalin Marinas #include <linux/io.h> 312077be67SLaura Abbott #include <linux/mm.h> 32c1cc1552SCatalin Marinas 3321ab99c2SMark Rutland #include <asm/barrier.h> 34c1cc1552SCatalin Marinas #include <asm/cputype.h> 35af86e597SLaura Abbott #include <asm/fixmap.h> 36068a17a5SMark Rutland #include <asm/kasan.h> 37b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 38c1cc1552SCatalin Marinas #include <asm/sections.h> 39c1cc1552SCatalin Marinas #include <asm/setup.h> 40c1cc1552SCatalin Marinas #include <asm/sizes.h> 41c1cc1552SCatalin Marinas #include <asm/tlb.h> 42c79b954bSJungseok Lee #include <asm/memblock.h> 43c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 441404d6f1SLaura Abbott #include <asm/ptdump.h> 45c1cc1552SCatalin Marinas 46dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 47dd006da2SArd Biesheuvel 485a9e3e15SJisheng Zhang u64 kimage_voffset __ro_after_init; 49a7f8de16SArd Biesheuvel EXPORT_SYMBOL(kimage_voffset); 50a7f8de16SArd Biesheuvel 51c1cc1552SCatalin Marinas /* 52c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 53c1cc1552SCatalin Marinas * and COW. 54c1cc1552SCatalin Marinas */ 555227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; 56c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 57c1cc1552SCatalin Marinas 58f9040773SArd Biesheuvel static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 59f9040773SArd Biesheuvel static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused; 60f9040773SArd Biesheuvel static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused; 61f9040773SArd Biesheuvel 62c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 63c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 64c1cc1552SCatalin Marinas { 65c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 66c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 67c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 68c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 69c1cc1552SCatalin Marinas return vma_prot; 70c1cc1552SCatalin Marinas } 71c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 72c1cc1552SCatalin Marinas 73f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void) 74c1cc1552SCatalin Marinas { 757142392dSSuzuki K. Poulose phys_addr_t phys; 767142392dSSuzuki K. Poulose void *ptr; 777142392dSSuzuki K. Poulose 7821ab99c2SMark Rutland phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 79f4710445SMark Rutland 80f4710445SMark Rutland /* 81f4710445SMark Rutland * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE 82f4710445SMark Rutland * slot will be free, so we can (ab)use the FIX_PTE slot to initialise 83f4710445SMark Rutland * any level of table. 84f4710445SMark Rutland */ 85f4710445SMark Rutland ptr = pte_set_fixmap(phys); 86f4710445SMark Rutland 8721ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 8821ab99c2SMark Rutland 89f4710445SMark Rutland /* 90f4710445SMark Rutland * Implicit barriers also ensure the zeroed page is visible to the page 91f4710445SMark Rutland * table walker 92f4710445SMark Rutland */ 93f4710445SMark Rutland pte_clear_fixmap(); 94f4710445SMark Rutland 95f4710445SMark Rutland return phys; 96c1cc1552SCatalin Marinas } 97c1cc1552SCatalin Marinas 98e98216b5SArd Biesheuvel static bool pgattr_change_is_safe(u64 old, u64 new) 99e98216b5SArd Biesheuvel { 100e98216b5SArd Biesheuvel /* 101e98216b5SArd Biesheuvel * The following mapping attributes may be updated in live 102e98216b5SArd Biesheuvel * kernel mappings without the need for break-before-make. 103e98216b5SArd Biesheuvel */ 104e98216b5SArd Biesheuvel static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE; 105e98216b5SArd Biesheuvel 106e98216b5SArd Biesheuvel return old == 0 || new == 0 || ((old ^ new) & ~mask) == 0; 107e98216b5SArd Biesheuvel } 108e98216b5SArd Biesheuvel 109da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 110667c2759SCatalin Marinas unsigned long end, unsigned long pfn, 111da141706SLaura Abbott pgprot_t prot, 1120bfc445dSArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 1130bfc445dSArd Biesheuvel bool page_mappings_only) 114c1cc1552SCatalin Marinas { 1150bfc445dSArd Biesheuvel pgprot_t __prot = prot; 116c1cc1552SCatalin Marinas pte_t *pte; 117c1cc1552SCatalin Marinas 1184133af6cSCatalin Marinas BUG_ON(pmd_sect(*pmd)); 1194133af6cSCatalin Marinas if (pmd_none(*pmd)) { 120132233a7SLaura Abbott phys_addr_t pte_phys; 121132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 122132233a7SLaura Abbott pte_phys = pgtable_alloc(); 123f4710445SMark Rutland pte = pte_set_fixmap(pte_phys); 124f4710445SMark Rutland __pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE); 125f4710445SMark Rutland pte_clear_fixmap(); 126c1cc1552SCatalin Marinas } 127a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 128c1cc1552SCatalin Marinas 129f4710445SMark Rutland pte = pte_set_fixmap_offset(pmd, addr); 130c1cc1552SCatalin Marinas do { 131e98216b5SArd Biesheuvel pte_t old_pte = *pte; 132e98216b5SArd Biesheuvel 1330bfc445dSArd Biesheuvel /* 1340bfc445dSArd Biesheuvel * Set the contiguous bit for the subsequent group of PTEs if 1350bfc445dSArd Biesheuvel * its size and alignment are appropriate. 1360bfc445dSArd Biesheuvel */ 1370bfc445dSArd Biesheuvel if (((addr | PFN_PHYS(pfn)) & ~CONT_PTE_MASK) == 0) { 1380bfc445dSArd Biesheuvel if (end - addr >= CONT_PTE_SIZE && !page_mappings_only) 1390bfc445dSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 1400bfc445dSArd Biesheuvel else 1410bfc445dSArd Biesheuvel __prot = prot; 1420bfc445dSArd Biesheuvel } 1430bfc445dSArd Biesheuvel 1440bfc445dSArd Biesheuvel set_pte(pte, pfn_pte(pfn, __prot)); 145667c2759SCatalin Marinas pfn++; 146e98216b5SArd Biesheuvel 147e98216b5SArd Biesheuvel /* 148e98216b5SArd Biesheuvel * After the PTE entry has been populated once, we 149e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 150e98216b5SArd Biesheuvel */ 151e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), pte_val(*pte))); 152e98216b5SArd Biesheuvel 153667c2759SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 154f4710445SMark Rutland 155f4710445SMark Rutland pte_clear_fixmap(); 156c1cc1552SCatalin Marinas } 157c1cc1552SCatalin Marinas 15811509a30SMark Rutland static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end, 159da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 16053e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 161f14c66ceSArd Biesheuvel bool page_mappings_only) 162c1cc1552SCatalin Marinas { 1630bfc445dSArd Biesheuvel pgprot_t __prot = prot; 164c1cc1552SCatalin Marinas pmd_t *pmd; 165c1cc1552SCatalin Marinas unsigned long next; 166c1cc1552SCatalin Marinas 167c1cc1552SCatalin Marinas /* 168c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 169c1cc1552SCatalin Marinas */ 1704133af6cSCatalin Marinas BUG_ON(pud_sect(*pud)); 1714133af6cSCatalin Marinas if (pud_none(*pud)) { 172132233a7SLaura Abbott phys_addr_t pmd_phys; 173132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 174132233a7SLaura Abbott pmd_phys = pgtable_alloc(); 175f4710445SMark Rutland pmd = pmd_set_fixmap(pmd_phys); 176f4710445SMark Rutland __pud_populate(pud, pmd_phys, PUD_TYPE_TABLE); 177f4710445SMark Rutland pmd_clear_fixmap(); 178c1cc1552SCatalin Marinas } 179a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 180c1cc1552SCatalin Marinas 181f4710445SMark Rutland pmd = pmd_set_fixmap_offset(pud, addr); 182c1cc1552SCatalin Marinas do { 183e98216b5SArd Biesheuvel pmd_t old_pmd = *pmd; 184e98216b5SArd Biesheuvel 185c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 186e98216b5SArd Biesheuvel 187c1cc1552SCatalin Marinas /* try section mapping first */ 18883863f25SLaura Abbott if (((addr | next | phys) & ~SECTION_MASK) == 0 && 189f14c66ceSArd Biesheuvel !page_mappings_only) { 1900bfc445dSArd Biesheuvel /* 1910bfc445dSArd Biesheuvel * Set the contiguous bit for the subsequent group of 1920bfc445dSArd Biesheuvel * PMDs if its size and alignment are appropriate. 1930bfc445dSArd Biesheuvel */ 1940bfc445dSArd Biesheuvel if (((addr | phys) & ~CONT_PMD_MASK) == 0) { 1950bfc445dSArd Biesheuvel if (end - addr >= CONT_PMD_SIZE) 1960bfc445dSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | 1970bfc445dSArd Biesheuvel PTE_CONT); 1980bfc445dSArd Biesheuvel else 1990bfc445dSArd Biesheuvel __prot = prot; 2000bfc445dSArd Biesheuvel } 2010bfc445dSArd Biesheuvel pmd_set_huge(pmd, phys, __prot); 202e98216b5SArd Biesheuvel 203a55f9929SCatalin Marinas /* 204e98216b5SArd Biesheuvel * After the PMD entry has been populated once, we 205e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 206a55f9929SCatalin Marinas */ 207e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd), 208e98216b5SArd Biesheuvel pmd_val(*pmd))); 209a55f9929SCatalin Marinas } else { 210667c2759SCatalin Marinas alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), 2110bfc445dSArd Biesheuvel prot, pgtable_alloc, 2120bfc445dSArd Biesheuvel page_mappings_only); 213e98216b5SArd Biesheuvel 214e98216b5SArd Biesheuvel BUG_ON(pmd_val(old_pmd) != 0 && 215e98216b5SArd Biesheuvel pmd_val(old_pmd) != pmd_val(*pmd)); 216a55f9929SCatalin Marinas } 217c1cc1552SCatalin Marinas phys += next - addr; 218c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 219f4710445SMark Rutland 220f4710445SMark Rutland pmd_clear_fixmap(); 221c1cc1552SCatalin Marinas } 222c1cc1552SCatalin Marinas 223da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 224da141706SLaura Abbott unsigned long phys) 225da141706SLaura Abbott { 226da141706SLaura Abbott if (PAGE_SHIFT != 12) 227da141706SLaura Abbott return false; 228da141706SLaura Abbott 229da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 230da141706SLaura Abbott return false; 231da141706SLaura Abbott 232da141706SLaura Abbott return true; 233da141706SLaura Abbott } 234da141706SLaura Abbott 23511509a30SMark Rutland static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 236da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 23753e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 238f14c66ceSArd Biesheuvel bool page_mappings_only) 239c1cc1552SCatalin Marinas { 240c79b954bSJungseok Lee pud_t *pud; 241c1cc1552SCatalin Marinas unsigned long next; 242c1cc1552SCatalin Marinas 243c79b954bSJungseok Lee if (pgd_none(*pgd)) { 244132233a7SLaura Abbott phys_addr_t pud_phys; 245132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 246132233a7SLaura Abbott pud_phys = pgtable_alloc(); 247f4710445SMark Rutland __pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE); 248c79b954bSJungseok Lee } 249c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 250c79b954bSJungseok Lee 251f4710445SMark Rutland pud = pud_set_fixmap_offset(pgd, addr); 252c1cc1552SCatalin Marinas do { 253e98216b5SArd Biesheuvel pud_t old_pud = *pud; 254e98216b5SArd Biesheuvel 255c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 256206a2a73SSteve Capper 257206a2a73SSteve Capper /* 258206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 259206a2a73SSteve Capper */ 260f14c66ceSArd Biesheuvel if (use_1G_block(addr, next, phys) && !page_mappings_only) { 261c661cb1cSMark Rutland pud_set_huge(pud, phys, prot); 262206a2a73SSteve Capper 263206a2a73SSteve Capper /* 264e98216b5SArd Biesheuvel * After the PUD entry has been populated once, we 265e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 266206a2a73SSteve Capper */ 267e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pud_val(old_pud), 268e98216b5SArd Biesheuvel pud_val(*pud))); 269206a2a73SSteve Capper } else { 27011509a30SMark Rutland alloc_init_pmd(pud, addr, next, phys, prot, 271f14c66ceSArd Biesheuvel pgtable_alloc, page_mappings_only); 272e98216b5SArd Biesheuvel 273e98216b5SArd Biesheuvel BUG_ON(pud_val(old_pud) != 0 && 274e98216b5SArd Biesheuvel pud_val(old_pud) != pud_val(*pud)); 275206a2a73SSteve Capper } 276c1cc1552SCatalin Marinas phys += next - addr; 277c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 278f4710445SMark Rutland 279f4710445SMark Rutland pud_clear_fixmap(); 280c1cc1552SCatalin Marinas } 281c1cc1552SCatalin Marinas 28240f87d31SArd Biesheuvel static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 28340f87d31SArd Biesheuvel unsigned long virt, phys_addr_t size, 28440f87d31SArd Biesheuvel pgprot_t prot, 28553e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 286f14c66ceSArd Biesheuvel bool page_mappings_only) 287c1cc1552SCatalin Marinas { 288c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 28940f87d31SArd Biesheuvel pgd_t *pgd = pgd_offset_raw(pgdir, virt); 290c1cc1552SCatalin Marinas 291cc5d2b3bSMark Rutland /* 292cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 293cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 294cc5d2b3bSMark Rutland */ 295cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 296cc5d2b3bSMark Rutland return; 297cc5d2b3bSMark Rutland 2989c4e08a3SMark Rutland phys &= PAGE_MASK; 299c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 300c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 301c1cc1552SCatalin Marinas 302c1cc1552SCatalin Marinas end = addr + length; 303c1cc1552SCatalin Marinas do { 304c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 30553e1b329SArd Biesheuvel alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc, 306f14c66ceSArd Biesheuvel page_mappings_only); 307c1cc1552SCatalin Marinas phys += next - addr; 308c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 309c1cc1552SCatalin Marinas } 310c1cc1552SCatalin Marinas 3111378dc3dSArd Biesheuvel static phys_addr_t pgd_pgtable_alloc(void) 312da141706SLaura Abbott { 31321ab99c2SMark Rutland void *ptr = (void *)__get_free_page(PGALLOC_GFP); 3141378dc3dSArd Biesheuvel if (!ptr || !pgtable_page_ctor(virt_to_page(ptr))) 3151378dc3dSArd Biesheuvel BUG(); 31621ab99c2SMark Rutland 31721ab99c2SMark Rutland /* Ensure the zeroed page is visible to the page table walker */ 31821ab99c2SMark Rutland dsb(ishst); 319f4710445SMark Rutland return __pa(ptr); 320da141706SLaura Abbott } 321da141706SLaura Abbott 322132233a7SLaura Abbott /* 323132233a7SLaura Abbott * This function can only be used to modify existing table entries, 324132233a7SLaura Abbott * without allocating new levels of table. Note that this permits the 325132233a7SLaura Abbott * creation of new section or page entries. 326132233a7SLaura Abbott */ 327132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, 328da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 329d7ecbddfSMark Salter { 330d7ecbddfSMark Salter if (virt < VMALLOC_START) { 331d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 332d7ecbddfSMark Salter &phys, virt); 333d7ecbddfSMark Salter return; 334d7ecbddfSMark Salter } 335f14c66ceSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, false); 336d7ecbddfSMark Salter } 337d7ecbddfSMark Salter 3388ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 3398ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 340f14c66ceSArd Biesheuvel pgprot_t prot, bool page_mappings_only) 3418ce837ceSArd Biesheuvel { 3421378dc3dSArd Biesheuvel BUG_ON(mm == &init_mm); 3431378dc3dSArd Biesheuvel 34411509a30SMark Rutland __create_pgd_mapping(mm->pgd, phys, virt, size, prot, 345f14c66ceSArd Biesheuvel pgd_pgtable_alloc, page_mappings_only); 346d7ecbddfSMark Salter } 347d7ecbddfSMark Salter 348da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 349da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 350da141706SLaura Abbott { 351da141706SLaura Abbott if (virt < VMALLOC_START) { 352da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 353da141706SLaura Abbott &phys, virt); 354da141706SLaura Abbott return; 355da141706SLaura Abbott } 356da141706SLaura Abbott 35711509a30SMark Rutland __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, 358f14c66ceSArd Biesheuvel NULL, debug_pagealloc_enabled()); 359da141706SLaura Abbott } 360da141706SLaura Abbott 361068a17a5SMark Rutland static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end) 362da141706SLaura Abbott { 363eac8017fSMiles Chen phys_addr_t kernel_start = __pa_symbol(_text); 364eac8017fSMiles Chen phys_addr_t kernel_end = __pa_symbol(__init_begin); 365068a17a5SMark Rutland 366da141706SLaura Abbott /* 367f9040773SArd Biesheuvel * Take care not to create a writable alias for the 368f9040773SArd Biesheuvel * read-only text and rodata sections of the kernel image. 369da141706SLaura Abbott */ 370da141706SLaura Abbott 3719fdc14c5SArd Biesheuvel /* No overlap with the kernel text/rodata */ 372068a17a5SMark Rutland if (end < kernel_start || start >= kernel_end) { 373068a17a5SMark Rutland __create_pgd_mapping(pgd, start, __phys_to_virt(start), 374068a17a5SMark Rutland end - start, PAGE_KERNEL, 37553e1b329SArd Biesheuvel early_pgtable_alloc, 376f14c66ceSArd Biesheuvel debug_pagealloc_enabled()); 377068a17a5SMark Rutland return; 378da141706SLaura Abbott } 379da141706SLaura Abbott 380068a17a5SMark Rutland /* 3819fdc14c5SArd Biesheuvel * This block overlaps the kernel text/rodata mappings. 382f9040773SArd Biesheuvel * Map the portion(s) which don't overlap. 383068a17a5SMark Rutland */ 384068a17a5SMark Rutland if (start < kernel_start) 385068a17a5SMark Rutland __create_pgd_mapping(pgd, start, 386068a17a5SMark Rutland __phys_to_virt(start), 387068a17a5SMark Rutland kernel_start - start, PAGE_KERNEL, 38853e1b329SArd Biesheuvel early_pgtable_alloc, 389f14c66ceSArd Biesheuvel debug_pagealloc_enabled()); 390068a17a5SMark Rutland if (kernel_end < end) 391068a17a5SMark Rutland __create_pgd_mapping(pgd, kernel_end, 392068a17a5SMark Rutland __phys_to_virt(kernel_end), 393068a17a5SMark Rutland end - kernel_end, PAGE_KERNEL, 39453e1b329SArd Biesheuvel early_pgtable_alloc, 395f14c66ceSArd Biesheuvel debug_pagealloc_enabled()); 396f9040773SArd Biesheuvel 397f9040773SArd Biesheuvel /* 3989fdc14c5SArd Biesheuvel * Map the linear alias of the [_text, __init_begin) interval as 399f9040773SArd Biesheuvel * read-only/non-executable. This makes the contents of the 400f9040773SArd Biesheuvel * region accessible to subsystems such as hibernate, but 401f9040773SArd Biesheuvel * protects it from inadvertent modification or execution. 402f9040773SArd Biesheuvel */ 403f9040773SArd Biesheuvel __create_pgd_mapping(pgd, kernel_start, __phys_to_virt(kernel_start), 404f9040773SArd Biesheuvel kernel_end - kernel_start, PAGE_KERNEL_RO, 405f14c66ceSArd Biesheuvel early_pgtable_alloc, debug_pagealloc_enabled()); 406da141706SLaura Abbott } 407da141706SLaura Abbott 408068a17a5SMark Rutland static void __init map_mem(pgd_t *pgd) 409c1cc1552SCatalin Marinas { 410c1cc1552SCatalin Marinas struct memblock_region *reg; 411f6bc87c3SSteve Capper 412c1cc1552SCatalin Marinas /* map all the memory banks */ 413c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 414c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 415c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 416c1cc1552SCatalin Marinas 417c1cc1552SCatalin Marinas if (start >= end) 418c1cc1552SCatalin Marinas break; 41968709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 42068709f45SArd Biesheuvel continue; 421c1cc1552SCatalin Marinas 422068a17a5SMark Rutland __map_memblock(pgd, start, end); 423c1cc1552SCatalin Marinas } 424c1cc1552SCatalin Marinas } 425c1cc1552SCatalin Marinas 426da141706SLaura Abbott void mark_rodata_ro(void) 427da141706SLaura Abbott { 4282f39b5f9SJeremy Linton unsigned long section_size; 429f9040773SArd Biesheuvel 4309fdc14c5SArd Biesheuvel section_size = (unsigned long)_etext - (unsigned long)_text; 4312077be67SLaura Abbott create_mapping_late(__pa_symbol(_text), (unsigned long)_text, 4322f39b5f9SJeremy Linton section_size, PAGE_KERNEL_ROX); 4332f39b5f9SJeremy Linton /* 4349fdc14c5SArd Biesheuvel * mark .rodata as read only. Use __init_begin rather than __end_rodata 4359fdc14c5SArd Biesheuvel * to cover NOTES and EXCEPTION_TABLE. 4362f39b5f9SJeremy Linton */ 4379fdc14c5SArd Biesheuvel section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata; 4382077be67SLaura Abbott create_mapping_late(__pa_symbol(__start_rodata), (unsigned long)__start_rodata, 4392f39b5f9SJeremy Linton section_size, PAGE_KERNEL_RO); 440e98216b5SArd Biesheuvel 441e98216b5SArd Biesheuvel /* flush the TLBs after updating live kernel mappings */ 442e98216b5SArd Biesheuvel flush_tlb_all(); 4431404d6f1SLaura Abbott 4441404d6f1SLaura Abbott debug_checkwx(); 445da141706SLaura Abbott } 446da141706SLaura Abbott 4472c09ec06SArd Biesheuvel static void __init map_kernel_segment(pgd_t *pgd, void *va_start, void *va_end, 448f9040773SArd Biesheuvel pgprot_t prot, struct vm_struct *vma) 449068a17a5SMark Rutland { 4502077be67SLaura Abbott phys_addr_t pa_start = __pa_symbol(va_start); 451068a17a5SMark Rutland unsigned long size = va_end - va_start; 452068a17a5SMark Rutland 453068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(pa_start)); 454068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(size)); 455068a17a5SMark Rutland 456068a17a5SMark Rutland __create_pgd_mapping(pgd, pa_start, (unsigned long)va_start, size, prot, 457f14c66ceSArd Biesheuvel early_pgtable_alloc, debug_pagealloc_enabled()); 458f9040773SArd Biesheuvel 459f9040773SArd Biesheuvel vma->addr = va_start; 460f9040773SArd Biesheuvel vma->phys_addr = pa_start; 461f9040773SArd Biesheuvel vma->size = size; 462f9040773SArd Biesheuvel vma->flags = VM_MAP; 463f9040773SArd Biesheuvel vma->caller = __builtin_return_address(0); 464f9040773SArd Biesheuvel 465f9040773SArd Biesheuvel vm_area_add_early(vma); 466068a17a5SMark Rutland } 467068a17a5SMark Rutland 468068a17a5SMark Rutland /* 469068a17a5SMark Rutland * Create fine-grained mappings for the kernel. 470068a17a5SMark Rutland */ 471068a17a5SMark Rutland static void __init map_kernel(pgd_t *pgd) 472068a17a5SMark Rutland { 4732f39b5f9SJeremy Linton static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_init, vmlinux_data; 474068a17a5SMark Rutland 4759fdc14c5SArd Biesheuvel map_kernel_segment(pgd, _text, _etext, PAGE_KERNEL_EXEC, &vmlinux_text); 4769fdc14c5SArd Biesheuvel map_kernel_segment(pgd, __start_rodata, __init_begin, PAGE_KERNEL, &vmlinux_rodata); 4772c09ec06SArd Biesheuvel map_kernel_segment(pgd, __init_begin, __init_end, PAGE_KERNEL_EXEC, 478f9040773SArd Biesheuvel &vmlinux_init); 4792c09ec06SArd Biesheuvel map_kernel_segment(pgd, _data, _end, PAGE_KERNEL, &vmlinux_data); 480068a17a5SMark Rutland 481f9040773SArd Biesheuvel if (!pgd_val(*pgd_offset_raw(pgd, FIXADDR_START))) { 482068a17a5SMark Rutland /* 483f9040773SArd Biesheuvel * The fixmap falls in a separate pgd to the kernel, and doesn't 484f9040773SArd Biesheuvel * live in the carveout for the swapper_pg_dir. We can simply 485f9040773SArd Biesheuvel * re-use the existing dir for the fixmap. 486068a17a5SMark Rutland */ 487f9040773SArd Biesheuvel set_pgd(pgd_offset_raw(pgd, FIXADDR_START), 488f9040773SArd Biesheuvel *pgd_offset_k(FIXADDR_START)); 489f9040773SArd Biesheuvel } else if (CONFIG_PGTABLE_LEVELS > 3) { 490f9040773SArd Biesheuvel /* 491f9040773SArd Biesheuvel * The fixmap shares its top level pgd entry with the kernel 492f9040773SArd Biesheuvel * mapping. This can really only occur when we are running 493f9040773SArd Biesheuvel * with 16k/4 levels, so we can simply reuse the pud level 494f9040773SArd Biesheuvel * entry instead. 495f9040773SArd Biesheuvel */ 496f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 497f9040773SArd Biesheuvel set_pud(pud_set_fixmap_offset(pgd, FIXADDR_START), 4982077be67SLaura Abbott __pud(__pa_symbol(bm_pmd) | PUD_TYPE_TABLE)); 499f9040773SArd Biesheuvel pud_clear_fixmap(); 500f9040773SArd Biesheuvel } else { 501f9040773SArd Biesheuvel BUG(); 502f9040773SArd Biesheuvel } 503068a17a5SMark Rutland 504068a17a5SMark Rutland kasan_copy_shadow(pgd); 505068a17a5SMark Rutland } 506068a17a5SMark Rutland 507c1cc1552SCatalin Marinas /* 508c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 509c1cc1552SCatalin Marinas * maps and sets up the zero page. 510c1cc1552SCatalin Marinas */ 511c1cc1552SCatalin Marinas void __init paging_init(void) 512c1cc1552SCatalin Marinas { 513068a17a5SMark Rutland phys_addr_t pgd_phys = early_pgtable_alloc(); 514068a17a5SMark Rutland pgd_t *pgd = pgd_set_fixmap(pgd_phys); 515068a17a5SMark Rutland 516068a17a5SMark Rutland map_kernel(pgd); 517068a17a5SMark Rutland map_mem(pgd); 518068a17a5SMark Rutland 519068a17a5SMark Rutland /* 520068a17a5SMark Rutland * We want to reuse the original swapper_pg_dir so we don't have to 521068a17a5SMark Rutland * communicate the new address to non-coherent secondaries in 522068a17a5SMark Rutland * secondary_entry, and so cpu_switch_mm can generate the address with 523068a17a5SMark Rutland * adrp+add rather than a load from some global variable. 524068a17a5SMark Rutland * 525068a17a5SMark Rutland * To do this we need to go via a temporary pgd. 526068a17a5SMark Rutland */ 527068a17a5SMark Rutland cpu_replace_ttbr1(__va(pgd_phys)); 528068a17a5SMark Rutland memcpy(swapper_pg_dir, pgd, PAGE_SIZE); 5292077be67SLaura Abbott cpu_replace_ttbr1(lm_alias(swapper_pg_dir)); 530068a17a5SMark Rutland 531068a17a5SMark Rutland pgd_clear_fixmap(); 532068a17a5SMark Rutland memblock_free(pgd_phys, PAGE_SIZE); 533068a17a5SMark Rutland 534068a17a5SMark Rutland /* 535068a17a5SMark Rutland * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd 536068a17a5SMark Rutland * allocated with it. 537068a17a5SMark Rutland */ 5382077be67SLaura Abbott memblock_free(__pa_symbol(swapper_pg_dir) + PAGE_SIZE, 539068a17a5SMark Rutland SWAPPER_DIR_SIZE - PAGE_SIZE); 540c1cc1552SCatalin Marinas } 541c1cc1552SCatalin Marinas 542c1cc1552SCatalin Marinas /* 543c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 544c1cc1552SCatalin Marinas */ 545c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 546c1cc1552SCatalin Marinas { 547c1cc1552SCatalin Marinas pgd_t *pgd; 548c1cc1552SCatalin Marinas pud_t *pud; 549c1cc1552SCatalin Marinas pmd_t *pmd; 550c1cc1552SCatalin Marinas pte_t *pte; 551c1cc1552SCatalin Marinas 552c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 553c1cc1552SCatalin Marinas return 0; 554c1cc1552SCatalin Marinas 555c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 556c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 557c1cc1552SCatalin Marinas return 0; 558c1cc1552SCatalin Marinas 559c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 560c1cc1552SCatalin Marinas if (pud_none(*pud)) 561c1cc1552SCatalin Marinas return 0; 562c1cc1552SCatalin Marinas 563206a2a73SSteve Capper if (pud_sect(*pud)) 564206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 565206a2a73SSteve Capper 566c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 567c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 568c1cc1552SCatalin Marinas return 0; 569c1cc1552SCatalin Marinas 570da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 571da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 572da6e4cb6SDave Anderson 573c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 574c1cc1552SCatalin Marinas if (pte_none(*pte)) 575c1cc1552SCatalin Marinas return 0; 576c1cc1552SCatalin Marinas 577c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 578c1cc1552SCatalin Marinas } 579c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 580b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 5810aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 582c1cc1552SCatalin Marinas { 5830aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 584c1cc1552SCatalin Marinas } 585b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 5860aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 587c1cc1552SCatalin Marinas { 5880aad818bSJohannes Weiner unsigned long addr = start; 589c1cc1552SCatalin Marinas unsigned long next; 590c1cc1552SCatalin Marinas pgd_t *pgd; 591c1cc1552SCatalin Marinas pud_t *pud; 592c1cc1552SCatalin Marinas pmd_t *pmd; 593c1cc1552SCatalin Marinas 594c1cc1552SCatalin Marinas do { 595c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 596c1cc1552SCatalin Marinas 597c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 598c1cc1552SCatalin Marinas if (!pgd) 599c1cc1552SCatalin Marinas return -ENOMEM; 600c1cc1552SCatalin Marinas 601c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 602c1cc1552SCatalin Marinas if (!pud) 603c1cc1552SCatalin Marinas return -ENOMEM; 604c1cc1552SCatalin Marinas 605c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 606c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 607c1cc1552SCatalin Marinas void *p = NULL; 608c1cc1552SCatalin Marinas 609c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 610c1cc1552SCatalin Marinas if (!p) 611c1cc1552SCatalin Marinas return -ENOMEM; 612c1cc1552SCatalin Marinas 613a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 614c1cc1552SCatalin Marinas } else 615c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 616c1cc1552SCatalin Marinas } while (addr = next, addr != end); 617c1cc1552SCatalin Marinas 618c1cc1552SCatalin Marinas return 0; 619c1cc1552SCatalin Marinas } 620c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 6210aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 6220197518cSTang Chen { 6230197518cSTang Chen } 624c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 625af86e597SLaura Abbott 626af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 627af86e597SLaura Abbott { 628af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 629af86e597SLaura Abbott 630af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 631af86e597SLaura Abbott 632157962f5SArd Biesheuvel return pud_offset_kimg(pgd, addr); 633af86e597SLaura Abbott } 634af86e597SLaura Abbott 635af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 636af86e597SLaura Abbott { 637af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 638af86e597SLaura Abbott 639af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 640af86e597SLaura Abbott 641157962f5SArd Biesheuvel return pmd_offset_kimg(pud, addr); 642af86e597SLaura Abbott } 643af86e597SLaura Abbott 644af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 645af86e597SLaura Abbott { 646157962f5SArd Biesheuvel return &bm_pte[pte_index(addr)]; 647af86e597SLaura Abbott } 648af86e597SLaura Abbott 6492077be67SLaura Abbott /* 6502077be67SLaura Abbott * The p*d_populate functions call virt_to_phys implicitly so they can't be used 6512077be67SLaura Abbott * directly on kernel symbols (bm_p*d). This function is called too early to use 6522077be67SLaura Abbott * lm_alias so __p*d_populate functions must be used to populate with the 6532077be67SLaura Abbott * physical address from __pa_symbol. 6542077be67SLaura Abbott */ 655af86e597SLaura Abbott void __init early_fixmap_init(void) 656af86e597SLaura Abbott { 657af86e597SLaura Abbott pgd_t *pgd; 658af86e597SLaura Abbott pud_t *pud; 659af86e597SLaura Abbott pmd_t *pmd; 660af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 661af86e597SLaura Abbott 662af86e597SLaura Abbott pgd = pgd_offset_k(addr); 663f80fb3a3SArd Biesheuvel if (CONFIG_PGTABLE_LEVELS > 3 && 6642077be67SLaura Abbott !(pgd_none(*pgd) || pgd_page_paddr(*pgd) == __pa_symbol(bm_pud))) { 665f9040773SArd Biesheuvel /* 666f9040773SArd Biesheuvel * We only end up here if the kernel mapping and the fixmap 667f9040773SArd Biesheuvel * share the top level pgd entry, which should only happen on 668f9040773SArd Biesheuvel * 16k/4 levels configurations. 669f9040773SArd Biesheuvel */ 670f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 671f9040773SArd Biesheuvel pud = pud_offset_kimg(pgd, addr); 672f9040773SArd Biesheuvel } else { 6732077be67SLaura Abbott if (pgd_none(*pgd)) 6742077be67SLaura Abbott __pgd_populate(pgd, __pa_symbol(bm_pud), PUD_TYPE_TABLE); 675157962f5SArd Biesheuvel pud = fixmap_pud(addr); 676f9040773SArd Biesheuvel } 6772077be67SLaura Abbott if (pud_none(*pud)) 6782077be67SLaura Abbott __pud_populate(pud, __pa_symbol(bm_pmd), PMD_TYPE_TABLE); 679157962f5SArd Biesheuvel pmd = fixmap_pmd(addr); 6802077be67SLaura Abbott __pmd_populate(pmd, __pa_symbol(bm_pte), PMD_TYPE_TABLE); 681af86e597SLaura Abbott 682af86e597SLaura Abbott /* 683af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 684157962f5SArd Biesheuvel * we are not prepared: 685af86e597SLaura Abbott */ 686af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 687af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 688af86e597SLaura Abbott 689af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 690af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 691af86e597SLaura Abbott WARN_ON(1); 692af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 693af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 694af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 695af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 696af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 697af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 698af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 699af86e597SLaura Abbott 700af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 701af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 702af86e597SLaura Abbott } 703af86e597SLaura Abbott } 704af86e597SLaura Abbott 705af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 706af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 707af86e597SLaura Abbott { 708af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 709af86e597SLaura Abbott pte_t *pte; 710af86e597SLaura Abbott 711b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 712af86e597SLaura Abbott 713af86e597SLaura Abbott pte = fixmap_pte(addr); 714af86e597SLaura Abbott 715af86e597SLaura Abbott if (pgprot_val(flags)) { 716af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 717af86e597SLaura Abbott } else { 718af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 719af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 720af86e597SLaura Abbott } 721af86e597SLaura Abbott } 72261bd93ceSArd Biesheuvel 723f80fb3a3SArd Biesheuvel void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot) 72461bd93ceSArd Biesheuvel { 72561bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 726f80fb3a3SArd Biesheuvel int offset; 72761bd93ceSArd Biesheuvel void *dt_virt; 72861bd93ceSArd Biesheuvel 72961bd93ceSArd Biesheuvel /* 73061bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 73161bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 73204a84810SArd Biesheuvel * at least 8 bytes so that we can always access the magic and size 73304a84810SArd Biesheuvel * fields of the FDT header after mapping the first chunk, double check 73404a84810SArd Biesheuvel * here if that is indeed the case. 73561bd93ceSArd Biesheuvel */ 73661bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 73761bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 73861bd93ceSArd Biesheuvel return NULL; 73961bd93ceSArd Biesheuvel 74061bd93ceSArd Biesheuvel /* 74161bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 74261bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 743132233a7SLaura Abbott * to call create_mapping_noalloc() this early. 74461bd93ceSArd Biesheuvel * 74561bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 74661bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 74761bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 74861bd93ceSArd Biesheuvel * have to be in the same PUD. 74961bd93ceSArd Biesheuvel */ 75061bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 75161bd93ceSArd Biesheuvel 752b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 753b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 75461bd93ceSArd Biesheuvel 755b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 75661bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 75761bd93ceSArd Biesheuvel 75861bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 759132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), 760132233a7SLaura Abbott dt_virt_base, SWAPPER_BLOCK_SIZE, prot); 76161bd93ceSArd Biesheuvel 76204a84810SArd Biesheuvel if (fdt_magic(dt_virt) != FDT_MAGIC) 76361bd93ceSArd Biesheuvel return NULL; 76461bd93ceSArd Biesheuvel 765f80fb3a3SArd Biesheuvel *size = fdt_totalsize(dt_virt); 766f80fb3a3SArd Biesheuvel if (*size > MAX_FDT_SIZE) 76761bd93ceSArd Biesheuvel return NULL; 76861bd93ceSArd Biesheuvel 769f80fb3a3SArd Biesheuvel if (offset + *size > SWAPPER_BLOCK_SIZE) 770132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 771f80fb3a3SArd Biesheuvel round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot); 772f80fb3a3SArd Biesheuvel 773f80fb3a3SArd Biesheuvel return dt_virt; 774f80fb3a3SArd Biesheuvel } 775f80fb3a3SArd Biesheuvel 776f80fb3a3SArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 777f80fb3a3SArd Biesheuvel { 778f80fb3a3SArd Biesheuvel void *dt_virt; 779f80fb3a3SArd Biesheuvel int size; 780f80fb3a3SArd Biesheuvel 781f80fb3a3SArd Biesheuvel dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO); 782f80fb3a3SArd Biesheuvel if (!dt_virt) 783f80fb3a3SArd Biesheuvel return NULL; 78461bd93ceSArd Biesheuvel 78561bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 78661bd93ceSArd Biesheuvel return dt_virt; 78761bd93ceSArd Biesheuvel } 788324420bfSArd Biesheuvel 789324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void) 790324420bfSArd Biesheuvel { 791324420bfSArd Biesheuvel /* only 4k granule supports level 1 block mappings */ 792324420bfSArd Biesheuvel return IS_ENABLED(CONFIG_ARM64_4K_PAGES); 793324420bfSArd Biesheuvel } 794324420bfSArd Biesheuvel 795324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void) 796324420bfSArd Biesheuvel { 797324420bfSArd Biesheuvel return 1; 798324420bfSArd Biesheuvel } 799324420bfSArd Biesheuvel 800324420bfSArd Biesheuvel int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot) 801324420bfSArd Biesheuvel { 802324420bfSArd Biesheuvel BUG_ON(phys & ~PUD_MASK); 803324420bfSArd Biesheuvel set_pud(pud, __pud(phys | PUD_TYPE_SECT | pgprot_val(mk_sect_prot(prot)))); 804324420bfSArd Biesheuvel return 1; 805324420bfSArd Biesheuvel } 806324420bfSArd Biesheuvel 807324420bfSArd Biesheuvel int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot) 808324420bfSArd Biesheuvel { 809324420bfSArd Biesheuvel BUG_ON(phys & ~PMD_MASK); 810324420bfSArd Biesheuvel set_pmd(pmd, __pmd(phys | PMD_TYPE_SECT | pgprot_val(mk_sect_prot(prot)))); 811324420bfSArd Biesheuvel return 1; 812324420bfSArd Biesheuvel } 813324420bfSArd Biesheuvel 814324420bfSArd Biesheuvel int pud_clear_huge(pud_t *pud) 815324420bfSArd Biesheuvel { 816324420bfSArd Biesheuvel if (!pud_sect(*pud)) 817324420bfSArd Biesheuvel return 0; 818324420bfSArd Biesheuvel pud_clear(pud); 819324420bfSArd Biesheuvel return 1; 820324420bfSArd Biesheuvel } 821324420bfSArd Biesheuvel 822324420bfSArd Biesheuvel int pmd_clear_huge(pmd_t *pmd) 823324420bfSArd Biesheuvel { 824324420bfSArd Biesheuvel if (!pmd_sect(*pmd)) 825324420bfSArd Biesheuvel return 0; 826324420bfSArd Biesheuvel pmd_clear(pmd); 827324420bfSArd Biesheuvel return 1; 828324420bfSArd Biesheuvel } 829