1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 205a9e3e15SJisheng Zhang #include <linux/cache.h> 21c1cc1552SCatalin Marinas #include <linux/export.h> 22c1cc1552SCatalin Marinas #include <linux/kernel.h> 23c1cc1552SCatalin Marinas #include <linux/errno.h> 24c1cc1552SCatalin Marinas #include <linux/init.h> 2561bd93ceSArd Biesheuvel #include <linux/libfdt.h> 26c1cc1552SCatalin Marinas #include <linux/mman.h> 27c1cc1552SCatalin Marinas #include <linux/nodemask.h> 28c1cc1552SCatalin Marinas #include <linux/memblock.h> 29c1cc1552SCatalin Marinas #include <linux/fs.h> 302475ff9dSCatalin Marinas #include <linux/io.h> 312077be67SLaura Abbott #include <linux/mm.h> 32c1cc1552SCatalin Marinas 3321ab99c2SMark Rutland #include <asm/barrier.h> 34c1cc1552SCatalin Marinas #include <asm/cputype.h> 35af86e597SLaura Abbott #include <asm/fixmap.h> 36068a17a5SMark Rutland #include <asm/kasan.h> 37b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 38c1cc1552SCatalin Marinas #include <asm/sections.h> 39c1cc1552SCatalin Marinas #include <asm/setup.h> 40c1cc1552SCatalin Marinas #include <asm/sizes.h> 41c1cc1552SCatalin Marinas #include <asm/tlb.h> 42c79b954bSJungseok Lee #include <asm/memblock.h> 43c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 441404d6f1SLaura Abbott #include <asm/ptdump.h> 45c1cc1552SCatalin Marinas 46dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 47dd006da2SArd Biesheuvel 485a9e3e15SJisheng Zhang u64 kimage_voffset __ro_after_init; 49a7f8de16SArd Biesheuvel EXPORT_SYMBOL(kimage_voffset); 50a7f8de16SArd Biesheuvel 51c1cc1552SCatalin Marinas /* 52c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 53c1cc1552SCatalin Marinas * and COW. 54c1cc1552SCatalin Marinas */ 555227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; 56c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 57c1cc1552SCatalin Marinas 58f9040773SArd Biesheuvel static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 59f9040773SArd Biesheuvel static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused; 60f9040773SArd Biesheuvel static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused; 61f9040773SArd Biesheuvel 62c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 63c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 64c1cc1552SCatalin Marinas { 65c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 66c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 67c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 68c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 69c1cc1552SCatalin Marinas return vma_prot; 70c1cc1552SCatalin Marinas } 71c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 72c1cc1552SCatalin Marinas 73f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void) 74c1cc1552SCatalin Marinas { 757142392dSSuzuki K. Poulose phys_addr_t phys; 767142392dSSuzuki K. Poulose void *ptr; 777142392dSSuzuki K. Poulose 7821ab99c2SMark Rutland phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 79f4710445SMark Rutland 80f4710445SMark Rutland /* 81f4710445SMark Rutland * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE 82f4710445SMark Rutland * slot will be free, so we can (ab)use the FIX_PTE slot to initialise 83f4710445SMark Rutland * any level of table. 84f4710445SMark Rutland */ 85f4710445SMark Rutland ptr = pte_set_fixmap(phys); 86f4710445SMark Rutland 8721ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 8821ab99c2SMark Rutland 89f4710445SMark Rutland /* 90f4710445SMark Rutland * Implicit barriers also ensure the zeroed page is visible to the page 91f4710445SMark Rutland * table walker 92f4710445SMark Rutland */ 93f4710445SMark Rutland pte_clear_fixmap(); 94f4710445SMark Rutland 95f4710445SMark Rutland return phys; 96c1cc1552SCatalin Marinas } 97c1cc1552SCatalin Marinas 98e98216b5SArd Biesheuvel static bool pgattr_change_is_safe(u64 old, u64 new) 99e98216b5SArd Biesheuvel { 100e98216b5SArd Biesheuvel /* 101e98216b5SArd Biesheuvel * The following mapping attributes may be updated in live 102e98216b5SArd Biesheuvel * kernel mappings without the need for break-before-make. 103e98216b5SArd Biesheuvel */ 104e98216b5SArd Biesheuvel static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE; 105e98216b5SArd Biesheuvel 106e98216b5SArd Biesheuvel return old == 0 || new == 0 || ((old ^ new) & ~mask) == 0; 107e98216b5SArd Biesheuvel } 108e98216b5SArd Biesheuvel 109da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 110667c2759SCatalin Marinas unsigned long end, unsigned long pfn, 111da141706SLaura Abbott pgprot_t prot, 112d81bbe6dSMark Rutland phys_addr_t (*pgtable_alloc)(void)) 113c1cc1552SCatalin Marinas { 114c1cc1552SCatalin Marinas pte_t *pte; 115c1cc1552SCatalin Marinas 1164133af6cSCatalin Marinas BUG_ON(pmd_sect(*pmd)); 1174133af6cSCatalin Marinas if (pmd_none(*pmd)) { 118132233a7SLaura Abbott phys_addr_t pte_phys; 119132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 120132233a7SLaura Abbott pte_phys = pgtable_alloc(); 121f4710445SMark Rutland pte = pte_set_fixmap(pte_phys); 122f4710445SMark Rutland __pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE); 123f4710445SMark Rutland pte_clear_fixmap(); 124c1cc1552SCatalin Marinas } 125a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 126c1cc1552SCatalin Marinas 127f4710445SMark Rutland pte = pte_set_fixmap_offset(pmd, addr); 128c1cc1552SCatalin Marinas do { 129e98216b5SArd Biesheuvel pte_t old_pte = *pte; 130e98216b5SArd Biesheuvel 131d81bbe6dSMark Rutland set_pte(pte, pfn_pte(pfn, prot)); 132667c2759SCatalin Marinas pfn++; 133e98216b5SArd Biesheuvel 134e98216b5SArd Biesheuvel /* 135e98216b5SArd Biesheuvel * After the PTE entry has been populated once, we 136e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 137e98216b5SArd Biesheuvel */ 138e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), pte_val(*pte))); 139e98216b5SArd Biesheuvel 140667c2759SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 141f4710445SMark Rutland 142f4710445SMark Rutland pte_clear_fixmap(); 143c1cc1552SCatalin Marinas } 144c1cc1552SCatalin Marinas 14511509a30SMark Rutland static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end, 146da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 14753e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 148f14c66ceSArd Biesheuvel bool page_mappings_only) 149c1cc1552SCatalin Marinas { 150c1cc1552SCatalin Marinas pmd_t *pmd; 151c1cc1552SCatalin Marinas unsigned long next; 152c1cc1552SCatalin Marinas 153c1cc1552SCatalin Marinas /* 154c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 155c1cc1552SCatalin Marinas */ 1564133af6cSCatalin Marinas BUG_ON(pud_sect(*pud)); 1574133af6cSCatalin Marinas if (pud_none(*pud)) { 158132233a7SLaura Abbott phys_addr_t pmd_phys; 159132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 160132233a7SLaura Abbott pmd_phys = pgtable_alloc(); 161f4710445SMark Rutland pmd = pmd_set_fixmap(pmd_phys); 162f4710445SMark Rutland __pud_populate(pud, pmd_phys, PUD_TYPE_TABLE); 163f4710445SMark Rutland pmd_clear_fixmap(); 164c1cc1552SCatalin Marinas } 165a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 166c1cc1552SCatalin Marinas 167f4710445SMark Rutland pmd = pmd_set_fixmap_offset(pud, addr); 168c1cc1552SCatalin Marinas do { 169e98216b5SArd Biesheuvel pmd_t old_pmd = *pmd; 170e98216b5SArd Biesheuvel 171c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 172e98216b5SArd Biesheuvel 173c1cc1552SCatalin Marinas /* try section mapping first */ 17483863f25SLaura Abbott if (((addr | next | phys) & ~SECTION_MASK) == 0 && 175f14c66ceSArd Biesheuvel !page_mappings_only) { 176d81bbe6dSMark Rutland pmd_set_huge(pmd, phys, prot); 177e98216b5SArd Biesheuvel 178a55f9929SCatalin Marinas /* 179e98216b5SArd Biesheuvel * After the PMD entry has been populated once, we 180e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 181a55f9929SCatalin Marinas */ 182e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd), 183e98216b5SArd Biesheuvel pmd_val(*pmd))); 184a55f9929SCatalin Marinas } else { 185667c2759SCatalin Marinas alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), 186d81bbe6dSMark Rutland prot, pgtable_alloc); 187e98216b5SArd Biesheuvel 188e98216b5SArd Biesheuvel BUG_ON(pmd_val(old_pmd) != 0 && 189e98216b5SArd Biesheuvel pmd_val(old_pmd) != pmd_val(*pmd)); 190a55f9929SCatalin Marinas } 191c1cc1552SCatalin Marinas phys += next - addr; 192c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 193f4710445SMark Rutland 194f4710445SMark Rutland pmd_clear_fixmap(); 195c1cc1552SCatalin Marinas } 196c1cc1552SCatalin Marinas 197da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 198da141706SLaura Abbott unsigned long phys) 199da141706SLaura Abbott { 200da141706SLaura Abbott if (PAGE_SHIFT != 12) 201da141706SLaura Abbott return false; 202da141706SLaura Abbott 203da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 204da141706SLaura Abbott return false; 205da141706SLaura Abbott 206da141706SLaura Abbott return true; 207da141706SLaura Abbott } 208da141706SLaura Abbott 20911509a30SMark Rutland static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 210da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 21153e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 212f14c66ceSArd Biesheuvel bool page_mappings_only) 213c1cc1552SCatalin Marinas { 214c79b954bSJungseok Lee pud_t *pud; 215c1cc1552SCatalin Marinas unsigned long next; 216c1cc1552SCatalin Marinas 217c79b954bSJungseok Lee if (pgd_none(*pgd)) { 218132233a7SLaura Abbott phys_addr_t pud_phys; 219132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 220132233a7SLaura Abbott pud_phys = pgtable_alloc(); 221f4710445SMark Rutland __pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE); 222c79b954bSJungseok Lee } 223c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 224c79b954bSJungseok Lee 225f4710445SMark Rutland pud = pud_set_fixmap_offset(pgd, addr); 226c1cc1552SCatalin Marinas do { 227e98216b5SArd Biesheuvel pud_t old_pud = *pud; 228e98216b5SArd Biesheuvel 229c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 230206a2a73SSteve Capper 231206a2a73SSteve Capper /* 232206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 233206a2a73SSteve Capper */ 234f14c66ceSArd Biesheuvel if (use_1G_block(addr, next, phys) && !page_mappings_only) { 235c661cb1cSMark Rutland pud_set_huge(pud, phys, prot); 236206a2a73SSteve Capper 237206a2a73SSteve Capper /* 238e98216b5SArd Biesheuvel * After the PUD entry has been populated once, we 239e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 240206a2a73SSteve Capper */ 241e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pud_val(old_pud), 242e98216b5SArd Biesheuvel pud_val(*pud))); 243206a2a73SSteve Capper } else { 24411509a30SMark Rutland alloc_init_pmd(pud, addr, next, phys, prot, 245f14c66ceSArd Biesheuvel pgtable_alloc, page_mappings_only); 246e98216b5SArd Biesheuvel 247e98216b5SArd Biesheuvel BUG_ON(pud_val(old_pud) != 0 && 248e98216b5SArd Biesheuvel pud_val(old_pud) != pud_val(*pud)); 249206a2a73SSteve Capper } 250c1cc1552SCatalin Marinas phys += next - addr; 251c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 252f4710445SMark Rutland 253f4710445SMark Rutland pud_clear_fixmap(); 254c1cc1552SCatalin Marinas } 255c1cc1552SCatalin Marinas 25640f87d31SArd Biesheuvel static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 25740f87d31SArd Biesheuvel unsigned long virt, phys_addr_t size, 25840f87d31SArd Biesheuvel pgprot_t prot, 25953e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 260f14c66ceSArd Biesheuvel bool page_mappings_only) 261c1cc1552SCatalin Marinas { 262c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 26340f87d31SArd Biesheuvel pgd_t *pgd = pgd_offset_raw(pgdir, virt); 264c1cc1552SCatalin Marinas 265cc5d2b3bSMark Rutland /* 266cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 267cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 268cc5d2b3bSMark Rutland */ 269cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 270cc5d2b3bSMark Rutland return; 271cc5d2b3bSMark Rutland 2729c4e08a3SMark Rutland phys &= PAGE_MASK; 273c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 274c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 275c1cc1552SCatalin Marinas 276c1cc1552SCatalin Marinas end = addr + length; 277c1cc1552SCatalin Marinas do { 278c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 27953e1b329SArd Biesheuvel alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc, 280f14c66ceSArd Biesheuvel page_mappings_only); 281c1cc1552SCatalin Marinas phys += next - addr; 282c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 283c1cc1552SCatalin Marinas } 284c1cc1552SCatalin Marinas 2851378dc3dSArd Biesheuvel static phys_addr_t pgd_pgtable_alloc(void) 286da141706SLaura Abbott { 28721ab99c2SMark Rutland void *ptr = (void *)__get_free_page(PGALLOC_GFP); 2881378dc3dSArd Biesheuvel if (!ptr || !pgtable_page_ctor(virt_to_page(ptr))) 2891378dc3dSArd Biesheuvel BUG(); 29021ab99c2SMark Rutland 29121ab99c2SMark Rutland /* Ensure the zeroed page is visible to the page table walker */ 29221ab99c2SMark Rutland dsb(ishst); 293f4710445SMark Rutland return __pa(ptr); 294da141706SLaura Abbott } 295da141706SLaura Abbott 296132233a7SLaura Abbott /* 297132233a7SLaura Abbott * This function can only be used to modify existing table entries, 298132233a7SLaura Abbott * without allocating new levels of table. Note that this permits the 299132233a7SLaura Abbott * creation of new section or page entries. 300132233a7SLaura Abbott */ 301132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, 302da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 303d7ecbddfSMark Salter { 304d7ecbddfSMark Salter if (virt < VMALLOC_START) { 305d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 306d7ecbddfSMark Salter &phys, virt); 307d7ecbddfSMark Salter return; 308d7ecbddfSMark Salter } 309f14c66ceSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, false); 310d7ecbddfSMark Salter } 311d7ecbddfSMark Salter 3128ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 3138ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 314f14c66ceSArd Biesheuvel pgprot_t prot, bool page_mappings_only) 3158ce837ceSArd Biesheuvel { 3161378dc3dSArd Biesheuvel BUG_ON(mm == &init_mm); 3171378dc3dSArd Biesheuvel 31811509a30SMark Rutland __create_pgd_mapping(mm->pgd, phys, virt, size, prot, 319f14c66ceSArd Biesheuvel pgd_pgtable_alloc, page_mappings_only); 320d7ecbddfSMark Salter } 321d7ecbddfSMark Salter 322da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 323da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 324da141706SLaura Abbott { 325da141706SLaura Abbott if (virt < VMALLOC_START) { 326da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 327da141706SLaura Abbott &phys, virt); 328da141706SLaura Abbott return; 329da141706SLaura Abbott } 330da141706SLaura Abbott 33111509a30SMark Rutland __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, 332f14c66ceSArd Biesheuvel NULL, debug_pagealloc_enabled()); 333da141706SLaura Abbott } 334da141706SLaura Abbott 335068a17a5SMark Rutland static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end) 336da141706SLaura Abbott { 337eac8017fSMiles Chen phys_addr_t kernel_start = __pa_symbol(_text); 338eac8017fSMiles Chen phys_addr_t kernel_end = __pa_symbol(__init_begin); 339068a17a5SMark Rutland 340da141706SLaura Abbott /* 341f9040773SArd Biesheuvel * Take care not to create a writable alias for the 342f9040773SArd Biesheuvel * read-only text and rodata sections of the kernel image. 343da141706SLaura Abbott */ 344da141706SLaura Abbott 3459fdc14c5SArd Biesheuvel /* No overlap with the kernel text/rodata */ 346068a17a5SMark Rutland if (end < kernel_start || start >= kernel_end) { 347068a17a5SMark Rutland __create_pgd_mapping(pgd, start, __phys_to_virt(start), 348068a17a5SMark Rutland end - start, PAGE_KERNEL, 34953e1b329SArd Biesheuvel early_pgtable_alloc, 350f14c66ceSArd Biesheuvel debug_pagealloc_enabled()); 351068a17a5SMark Rutland return; 352da141706SLaura Abbott } 353da141706SLaura Abbott 354068a17a5SMark Rutland /* 3559fdc14c5SArd Biesheuvel * This block overlaps the kernel text/rodata mappings. 356f9040773SArd Biesheuvel * Map the portion(s) which don't overlap. 357068a17a5SMark Rutland */ 358068a17a5SMark Rutland if (start < kernel_start) 359068a17a5SMark Rutland __create_pgd_mapping(pgd, start, 360068a17a5SMark Rutland __phys_to_virt(start), 361068a17a5SMark Rutland kernel_start - start, PAGE_KERNEL, 36253e1b329SArd Biesheuvel early_pgtable_alloc, 363f14c66ceSArd Biesheuvel debug_pagealloc_enabled()); 364068a17a5SMark Rutland if (kernel_end < end) 365068a17a5SMark Rutland __create_pgd_mapping(pgd, kernel_end, 366068a17a5SMark Rutland __phys_to_virt(kernel_end), 367068a17a5SMark Rutland end - kernel_end, PAGE_KERNEL, 36853e1b329SArd Biesheuvel early_pgtable_alloc, 369f14c66ceSArd Biesheuvel debug_pagealloc_enabled()); 370f9040773SArd Biesheuvel 371f9040773SArd Biesheuvel /* 3729fdc14c5SArd Biesheuvel * Map the linear alias of the [_text, __init_begin) interval as 373f9040773SArd Biesheuvel * read-only/non-executable. This makes the contents of the 374f9040773SArd Biesheuvel * region accessible to subsystems such as hibernate, but 375f9040773SArd Biesheuvel * protects it from inadvertent modification or execution. 376f9040773SArd Biesheuvel */ 377f9040773SArd Biesheuvel __create_pgd_mapping(pgd, kernel_start, __phys_to_virt(kernel_start), 378f9040773SArd Biesheuvel kernel_end - kernel_start, PAGE_KERNEL_RO, 379f14c66ceSArd Biesheuvel early_pgtable_alloc, debug_pagealloc_enabled()); 380da141706SLaura Abbott } 381da141706SLaura Abbott 382068a17a5SMark Rutland static void __init map_mem(pgd_t *pgd) 383c1cc1552SCatalin Marinas { 384c1cc1552SCatalin Marinas struct memblock_region *reg; 385f6bc87c3SSteve Capper 386c1cc1552SCatalin Marinas /* map all the memory banks */ 387c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 388c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 389c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 390c1cc1552SCatalin Marinas 391c1cc1552SCatalin Marinas if (start >= end) 392c1cc1552SCatalin Marinas break; 39368709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 39468709f45SArd Biesheuvel continue; 395c1cc1552SCatalin Marinas 396068a17a5SMark Rutland __map_memblock(pgd, start, end); 397c1cc1552SCatalin Marinas } 398c1cc1552SCatalin Marinas } 399c1cc1552SCatalin Marinas 400da141706SLaura Abbott void mark_rodata_ro(void) 401da141706SLaura Abbott { 4022f39b5f9SJeremy Linton unsigned long section_size; 403f9040773SArd Biesheuvel 4049fdc14c5SArd Biesheuvel section_size = (unsigned long)_etext - (unsigned long)_text; 4052077be67SLaura Abbott create_mapping_late(__pa_symbol(_text), (unsigned long)_text, 4062f39b5f9SJeremy Linton section_size, PAGE_KERNEL_ROX); 4072f39b5f9SJeremy Linton /* 4089fdc14c5SArd Biesheuvel * mark .rodata as read only. Use __init_begin rather than __end_rodata 4099fdc14c5SArd Biesheuvel * to cover NOTES and EXCEPTION_TABLE. 4102f39b5f9SJeremy Linton */ 4119fdc14c5SArd Biesheuvel section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata; 4122077be67SLaura Abbott create_mapping_late(__pa_symbol(__start_rodata), (unsigned long)__start_rodata, 4132f39b5f9SJeremy Linton section_size, PAGE_KERNEL_RO); 414e98216b5SArd Biesheuvel 415e98216b5SArd Biesheuvel /* flush the TLBs after updating live kernel mappings */ 416e98216b5SArd Biesheuvel flush_tlb_all(); 4171404d6f1SLaura Abbott 4181404d6f1SLaura Abbott debug_checkwx(); 419da141706SLaura Abbott } 420da141706SLaura Abbott 4212c09ec06SArd Biesheuvel static void __init map_kernel_segment(pgd_t *pgd, void *va_start, void *va_end, 422f9040773SArd Biesheuvel pgprot_t prot, struct vm_struct *vma) 423068a17a5SMark Rutland { 4242077be67SLaura Abbott phys_addr_t pa_start = __pa_symbol(va_start); 425068a17a5SMark Rutland unsigned long size = va_end - va_start; 426068a17a5SMark Rutland 427068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(pa_start)); 428068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(size)); 429068a17a5SMark Rutland 430068a17a5SMark Rutland __create_pgd_mapping(pgd, pa_start, (unsigned long)va_start, size, prot, 431f14c66ceSArd Biesheuvel early_pgtable_alloc, debug_pagealloc_enabled()); 432f9040773SArd Biesheuvel 433f9040773SArd Biesheuvel vma->addr = va_start; 434f9040773SArd Biesheuvel vma->phys_addr = pa_start; 435f9040773SArd Biesheuvel vma->size = size; 436f9040773SArd Biesheuvel vma->flags = VM_MAP; 437f9040773SArd Biesheuvel vma->caller = __builtin_return_address(0); 438f9040773SArd Biesheuvel 439f9040773SArd Biesheuvel vm_area_add_early(vma); 440068a17a5SMark Rutland } 441068a17a5SMark Rutland 442068a17a5SMark Rutland /* 443068a17a5SMark Rutland * Create fine-grained mappings for the kernel. 444068a17a5SMark Rutland */ 445068a17a5SMark Rutland static void __init map_kernel(pgd_t *pgd) 446068a17a5SMark Rutland { 4472f39b5f9SJeremy Linton static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_init, vmlinux_data; 448068a17a5SMark Rutland 4499fdc14c5SArd Biesheuvel map_kernel_segment(pgd, _text, _etext, PAGE_KERNEL_EXEC, &vmlinux_text); 4509fdc14c5SArd Biesheuvel map_kernel_segment(pgd, __start_rodata, __init_begin, PAGE_KERNEL, &vmlinux_rodata); 4512c09ec06SArd Biesheuvel map_kernel_segment(pgd, __init_begin, __init_end, PAGE_KERNEL_EXEC, 452f9040773SArd Biesheuvel &vmlinux_init); 4532c09ec06SArd Biesheuvel map_kernel_segment(pgd, _data, _end, PAGE_KERNEL, &vmlinux_data); 454068a17a5SMark Rutland 455f9040773SArd Biesheuvel if (!pgd_val(*pgd_offset_raw(pgd, FIXADDR_START))) { 456068a17a5SMark Rutland /* 457f9040773SArd Biesheuvel * The fixmap falls in a separate pgd to the kernel, and doesn't 458f9040773SArd Biesheuvel * live in the carveout for the swapper_pg_dir. We can simply 459f9040773SArd Biesheuvel * re-use the existing dir for the fixmap. 460068a17a5SMark Rutland */ 461f9040773SArd Biesheuvel set_pgd(pgd_offset_raw(pgd, FIXADDR_START), 462f9040773SArd Biesheuvel *pgd_offset_k(FIXADDR_START)); 463f9040773SArd Biesheuvel } else if (CONFIG_PGTABLE_LEVELS > 3) { 464f9040773SArd Biesheuvel /* 465f9040773SArd Biesheuvel * The fixmap shares its top level pgd entry with the kernel 466f9040773SArd Biesheuvel * mapping. This can really only occur when we are running 467f9040773SArd Biesheuvel * with 16k/4 levels, so we can simply reuse the pud level 468f9040773SArd Biesheuvel * entry instead. 469f9040773SArd Biesheuvel */ 470f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 471f9040773SArd Biesheuvel set_pud(pud_set_fixmap_offset(pgd, FIXADDR_START), 4722077be67SLaura Abbott __pud(__pa_symbol(bm_pmd) | PUD_TYPE_TABLE)); 473f9040773SArd Biesheuvel pud_clear_fixmap(); 474f9040773SArd Biesheuvel } else { 475f9040773SArd Biesheuvel BUG(); 476f9040773SArd Biesheuvel } 477068a17a5SMark Rutland 478068a17a5SMark Rutland kasan_copy_shadow(pgd); 479068a17a5SMark Rutland } 480068a17a5SMark Rutland 481c1cc1552SCatalin Marinas /* 482c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 483c1cc1552SCatalin Marinas * maps and sets up the zero page. 484c1cc1552SCatalin Marinas */ 485c1cc1552SCatalin Marinas void __init paging_init(void) 486c1cc1552SCatalin Marinas { 487068a17a5SMark Rutland phys_addr_t pgd_phys = early_pgtable_alloc(); 488068a17a5SMark Rutland pgd_t *pgd = pgd_set_fixmap(pgd_phys); 489068a17a5SMark Rutland 490068a17a5SMark Rutland map_kernel(pgd); 491068a17a5SMark Rutland map_mem(pgd); 492068a17a5SMark Rutland 493068a17a5SMark Rutland /* 494068a17a5SMark Rutland * We want to reuse the original swapper_pg_dir so we don't have to 495068a17a5SMark Rutland * communicate the new address to non-coherent secondaries in 496068a17a5SMark Rutland * secondary_entry, and so cpu_switch_mm can generate the address with 497068a17a5SMark Rutland * adrp+add rather than a load from some global variable. 498068a17a5SMark Rutland * 499068a17a5SMark Rutland * To do this we need to go via a temporary pgd. 500068a17a5SMark Rutland */ 501068a17a5SMark Rutland cpu_replace_ttbr1(__va(pgd_phys)); 50212f043ffSArnd Bergmann memcpy(swapper_pg_dir, pgd, PGD_SIZE); 5032077be67SLaura Abbott cpu_replace_ttbr1(lm_alias(swapper_pg_dir)); 504068a17a5SMark Rutland 505068a17a5SMark Rutland pgd_clear_fixmap(); 506068a17a5SMark Rutland memblock_free(pgd_phys, PAGE_SIZE); 507068a17a5SMark Rutland 508068a17a5SMark Rutland /* 509068a17a5SMark Rutland * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd 510068a17a5SMark Rutland * allocated with it. 511068a17a5SMark Rutland */ 5122077be67SLaura Abbott memblock_free(__pa_symbol(swapper_pg_dir) + PAGE_SIZE, 513068a17a5SMark Rutland SWAPPER_DIR_SIZE - PAGE_SIZE); 514c1cc1552SCatalin Marinas } 515c1cc1552SCatalin Marinas 516c1cc1552SCatalin Marinas /* 517c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 518c1cc1552SCatalin Marinas */ 519c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 520c1cc1552SCatalin Marinas { 521c1cc1552SCatalin Marinas pgd_t *pgd; 522c1cc1552SCatalin Marinas pud_t *pud; 523c1cc1552SCatalin Marinas pmd_t *pmd; 524c1cc1552SCatalin Marinas pte_t *pte; 525c1cc1552SCatalin Marinas 526c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 527c1cc1552SCatalin Marinas return 0; 528c1cc1552SCatalin Marinas 529c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 530c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 531c1cc1552SCatalin Marinas return 0; 532c1cc1552SCatalin Marinas 533c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 534c1cc1552SCatalin Marinas if (pud_none(*pud)) 535c1cc1552SCatalin Marinas return 0; 536c1cc1552SCatalin Marinas 537206a2a73SSteve Capper if (pud_sect(*pud)) 538206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 539206a2a73SSteve Capper 540c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 541c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 542c1cc1552SCatalin Marinas return 0; 543c1cc1552SCatalin Marinas 544da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 545da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 546da6e4cb6SDave Anderson 547c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 548c1cc1552SCatalin Marinas if (pte_none(*pte)) 549c1cc1552SCatalin Marinas return 0; 550c1cc1552SCatalin Marinas 551c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 552c1cc1552SCatalin Marinas } 553c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 554b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 5550aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 556c1cc1552SCatalin Marinas { 5570aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 558c1cc1552SCatalin Marinas } 559b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 5600aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 561c1cc1552SCatalin Marinas { 5620aad818bSJohannes Weiner unsigned long addr = start; 563c1cc1552SCatalin Marinas unsigned long next; 564c1cc1552SCatalin Marinas pgd_t *pgd; 565c1cc1552SCatalin Marinas pud_t *pud; 566c1cc1552SCatalin Marinas pmd_t *pmd; 567c1cc1552SCatalin Marinas 568c1cc1552SCatalin Marinas do { 569c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 570c1cc1552SCatalin Marinas 571c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 572c1cc1552SCatalin Marinas if (!pgd) 573c1cc1552SCatalin Marinas return -ENOMEM; 574c1cc1552SCatalin Marinas 575c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 576c1cc1552SCatalin Marinas if (!pud) 577c1cc1552SCatalin Marinas return -ENOMEM; 578c1cc1552SCatalin Marinas 579c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 580c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 581c1cc1552SCatalin Marinas void *p = NULL; 582c1cc1552SCatalin Marinas 583c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 584c1cc1552SCatalin Marinas if (!p) 585c1cc1552SCatalin Marinas return -ENOMEM; 586c1cc1552SCatalin Marinas 587a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 588c1cc1552SCatalin Marinas } else 589c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 590c1cc1552SCatalin Marinas } while (addr = next, addr != end); 591c1cc1552SCatalin Marinas 592c1cc1552SCatalin Marinas return 0; 593c1cc1552SCatalin Marinas } 594c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 5950aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 5960197518cSTang Chen { 5970197518cSTang Chen } 598c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 599af86e597SLaura Abbott 600af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 601af86e597SLaura Abbott { 602af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 603af86e597SLaura Abbott 604af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 605af86e597SLaura Abbott 606157962f5SArd Biesheuvel return pud_offset_kimg(pgd, addr); 607af86e597SLaura Abbott } 608af86e597SLaura Abbott 609af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 610af86e597SLaura Abbott { 611af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 612af86e597SLaura Abbott 613af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 614af86e597SLaura Abbott 615157962f5SArd Biesheuvel return pmd_offset_kimg(pud, addr); 616af86e597SLaura Abbott } 617af86e597SLaura Abbott 618af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 619af86e597SLaura Abbott { 620157962f5SArd Biesheuvel return &bm_pte[pte_index(addr)]; 621af86e597SLaura Abbott } 622af86e597SLaura Abbott 6232077be67SLaura Abbott /* 6242077be67SLaura Abbott * The p*d_populate functions call virt_to_phys implicitly so they can't be used 6252077be67SLaura Abbott * directly on kernel symbols (bm_p*d). This function is called too early to use 6262077be67SLaura Abbott * lm_alias so __p*d_populate functions must be used to populate with the 6272077be67SLaura Abbott * physical address from __pa_symbol. 6282077be67SLaura Abbott */ 629af86e597SLaura Abbott void __init early_fixmap_init(void) 630af86e597SLaura Abbott { 631af86e597SLaura Abbott pgd_t *pgd; 632af86e597SLaura Abbott pud_t *pud; 633af86e597SLaura Abbott pmd_t *pmd; 634af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 635af86e597SLaura Abbott 636af86e597SLaura Abbott pgd = pgd_offset_k(addr); 637f80fb3a3SArd Biesheuvel if (CONFIG_PGTABLE_LEVELS > 3 && 6382077be67SLaura Abbott !(pgd_none(*pgd) || pgd_page_paddr(*pgd) == __pa_symbol(bm_pud))) { 639f9040773SArd Biesheuvel /* 640f9040773SArd Biesheuvel * We only end up here if the kernel mapping and the fixmap 641f9040773SArd Biesheuvel * share the top level pgd entry, which should only happen on 642f9040773SArd Biesheuvel * 16k/4 levels configurations. 643f9040773SArd Biesheuvel */ 644f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 645f9040773SArd Biesheuvel pud = pud_offset_kimg(pgd, addr); 646f9040773SArd Biesheuvel } else { 6472077be67SLaura Abbott if (pgd_none(*pgd)) 6482077be67SLaura Abbott __pgd_populate(pgd, __pa_symbol(bm_pud), PUD_TYPE_TABLE); 649157962f5SArd Biesheuvel pud = fixmap_pud(addr); 650f9040773SArd Biesheuvel } 6512077be67SLaura Abbott if (pud_none(*pud)) 6522077be67SLaura Abbott __pud_populate(pud, __pa_symbol(bm_pmd), PMD_TYPE_TABLE); 653157962f5SArd Biesheuvel pmd = fixmap_pmd(addr); 6542077be67SLaura Abbott __pmd_populate(pmd, __pa_symbol(bm_pte), PMD_TYPE_TABLE); 655af86e597SLaura Abbott 656af86e597SLaura Abbott /* 657af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 658157962f5SArd Biesheuvel * we are not prepared: 659af86e597SLaura Abbott */ 660af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 661af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 662af86e597SLaura Abbott 663af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 664af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 665af86e597SLaura Abbott WARN_ON(1); 666af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 667af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 668af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 669af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 670af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 671af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 672af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 673af86e597SLaura Abbott 674af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 675af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 676af86e597SLaura Abbott } 677af86e597SLaura Abbott } 678af86e597SLaura Abbott 679af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 680af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 681af86e597SLaura Abbott { 682af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 683af86e597SLaura Abbott pte_t *pte; 684af86e597SLaura Abbott 685b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 686af86e597SLaura Abbott 687af86e597SLaura Abbott pte = fixmap_pte(addr); 688af86e597SLaura Abbott 689af86e597SLaura Abbott if (pgprot_val(flags)) { 690af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 691af86e597SLaura Abbott } else { 692af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 693af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 694af86e597SLaura Abbott } 695af86e597SLaura Abbott } 69661bd93ceSArd Biesheuvel 697f80fb3a3SArd Biesheuvel void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot) 69861bd93ceSArd Biesheuvel { 69961bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 700f80fb3a3SArd Biesheuvel int offset; 70161bd93ceSArd Biesheuvel void *dt_virt; 70261bd93ceSArd Biesheuvel 70361bd93ceSArd Biesheuvel /* 70461bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 70561bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 70604a84810SArd Biesheuvel * at least 8 bytes so that we can always access the magic and size 70704a84810SArd Biesheuvel * fields of the FDT header after mapping the first chunk, double check 70804a84810SArd Biesheuvel * here if that is indeed the case. 70961bd93ceSArd Biesheuvel */ 71061bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 71161bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 71261bd93ceSArd Biesheuvel return NULL; 71361bd93ceSArd Biesheuvel 71461bd93ceSArd Biesheuvel /* 71561bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 71661bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 717132233a7SLaura Abbott * to call create_mapping_noalloc() this early. 71861bd93ceSArd Biesheuvel * 71961bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 72061bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 72161bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 72261bd93ceSArd Biesheuvel * have to be in the same PUD. 72361bd93ceSArd Biesheuvel */ 72461bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 72561bd93ceSArd Biesheuvel 726b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 727b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 72861bd93ceSArd Biesheuvel 729b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 73061bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 73161bd93ceSArd Biesheuvel 73261bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 733132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), 734132233a7SLaura Abbott dt_virt_base, SWAPPER_BLOCK_SIZE, prot); 73561bd93ceSArd Biesheuvel 73604a84810SArd Biesheuvel if (fdt_magic(dt_virt) != FDT_MAGIC) 73761bd93ceSArd Biesheuvel return NULL; 73861bd93ceSArd Biesheuvel 739f80fb3a3SArd Biesheuvel *size = fdt_totalsize(dt_virt); 740f80fb3a3SArd Biesheuvel if (*size > MAX_FDT_SIZE) 74161bd93ceSArd Biesheuvel return NULL; 74261bd93ceSArd Biesheuvel 743f80fb3a3SArd Biesheuvel if (offset + *size > SWAPPER_BLOCK_SIZE) 744132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 745f80fb3a3SArd Biesheuvel round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot); 746f80fb3a3SArd Biesheuvel 747f80fb3a3SArd Biesheuvel return dt_virt; 748f80fb3a3SArd Biesheuvel } 749f80fb3a3SArd Biesheuvel 750f80fb3a3SArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 751f80fb3a3SArd Biesheuvel { 752f80fb3a3SArd Biesheuvel void *dt_virt; 753f80fb3a3SArd Biesheuvel int size; 754f80fb3a3SArd Biesheuvel 755f80fb3a3SArd Biesheuvel dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO); 756f80fb3a3SArd Biesheuvel if (!dt_virt) 757f80fb3a3SArd Biesheuvel return NULL; 75861bd93ceSArd Biesheuvel 75961bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 76061bd93ceSArd Biesheuvel return dt_virt; 76161bd93ceSArd Biesheuvel } 762324420bfSArd Biesheuvel 763324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void) 764324420bfSArd Biesheuvel { 765324420bfSArd Biesheuvel /* only 4k granule supports level 1 block mappings */ 766324420bfSArd Biesheuvel return IS_ENABLED(CONFIG_ARM64_4K_PAGES); 767324420bfSArd Biesheuvel } 768324420bfSArd Biesheuvel 769324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void) 770324420bfSArd Biesheuvel { 771324420bfSArd Biesheuvel return 1; 772324420bfSArd Biesheuvel } 773324420bfSArd Biesheuvel 774324420bfSArd Biesheuvel int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot) 775324420bfSArd Biesheuvel { 776324420bfSArd Biesheuvel BUG_ON(phys & ~PUD_MASK); 777324420bfSArd Biesheuvel set_pud(pud, __pud(phys | PUD_TYPE_SECT | pgprot_val(mk_sect_prot(prot)))); 778324420bfSArd Biesheuvel return 1; 779324420bfSArd Biesheuvel } 780324420bfSArd Biesheuvel 781324420bfSArd Biesheuvel int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot) 782324420bfSArd Biesheuvel { 783324420bfSArd Biesheuvel BUG_ON(phys & ~PMD_MASK); 784324420bfSArd Biesheuvel set_pmd(pmd, __pmd(phys | PMD_TYPE_SECT | pgprot_val(mk_sect_prot(prot)))); 785324420bfSArd Biesheuvel return 1; 786324420bfSArd Biesheuvel } 787324420bfSArd Biesheuvel 788324420bfSArd Biesheuvel int pud_clear_huge(pud_t *pud) 789324420bfSArd Biesheuvel { 790324420bfSArd Biesheuvel if (!pud_sect(*pud)) 791324420bfSArd Biesheuvel return 0; 792324420bfSArd Biesheuvel pud_clear(pud); 793324420bfSArd Biesheuvel return 1; 794324420bfSArd Biesheuvel } 795324420bfSArd Biesheuvel 796324420bfSArd Biesheuvel int pmd_clear_huge(pmd_t *pmd) 797324420bfSArd Biesheuvel { 798324420bfSArd Biesheuvel if (!pmd_sect(*pmd)) 799324420bfSArd Biesheuvel return 0; 800324420bfSArd Biesheuvel pmd_clear(pmd); 801324420bfSArd Biesheuvel return 1; 802324420bfSArd Biesheuvel } 803