xref: /openbmc/linux/arch/arm64/mm/mmu.c (revision 2330b7ca)
1c1cc1552SCatalin Marinas /*
2c1cc1552SCatalin Marinas  * Based on arch/arm/mm/mmu.c
3c1cc1552SCatalin Marinas  *
4c1cc1552SCatalin Marinas  * Copyright (C) 1995-2005 Russell King
5c1cc1552SCatalin Marinas  * Copyright (C) 2012 ARM Ltd.
6c1cc1552SCatalin Marinas  *
7c1cc1552SCatalin Marinas  * This program is free software; you can redistribute it and/or modify
8c1cc1552SCatalin Marinas  * it under the terms of the GNU General Public License version 2 as
9c1cc1552SCatalin Marinas  * published by the Free Software Foundation.
10c1cc1552SCatalin Marinas  *
11c1cc1552SCatalin Marinas  * This program is distributed in the hope that it will be useful,
12c1cc1552SCatalin Marinas  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13c1cc1552SCatalin Marinas  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14c1cc1552SCatalin Marinas  * GNU General Public License for more details.
15c1cc1552SCatalin Marinas  *
16c1cc1552SCatalin Marinas  * You should have received a copy of the GNU General Public License
17c1cc1552SCatalin Marinas  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18c1cc1552SCatalin Marinas  */
19c1cc1552SCatalin Marinas 
205a9e3e15SJisheng Zhang #include <linux/cache.h>
21c1cc1552SCatalin Marinas #include <linux/export.h>
22c1cc1552SCatalin Marinas #include <linux/kernel.h>
23c1cc1552SCatalin Marinas #include <linux/errno.h>
24c1cc1552SCatalin Marinas #include <linux/init.h>
2598d2e153STakahiro Akashi #include <linux/ioport.h>
2698d2e153STakahiro Akashi #include <linux/kexec.h>
2761bd93ceSArd Biesheuvel #include <linux/libfdt.h>
28c1cc1552SCatalin Marinas #include <linux/mman.h>
29c1cc1552SCatalin Marinas #include <linux/nodemask.h>
30c1cc1552SCatalin Marinas #include <linux/memblock.h>
31c1cc1552SCatalin Marinas #include <linux/fs.h>
322475ff9dSCatalin Marinas #include <linux/io.h>
332077be67SLaura Abbott #include <linux/mm.h>
346efd8499STobias Klauser #include <linux/vmalloc.h>
35c1cc1552SCatalin Marinas 
3621ab99c2SMark Rutland #include <asm/barrier.h>
37c1cc1552SCatalin Marinas #include <asm/cputype.h>
38af86e597SLaura Abbott #include <asm/fixmap.h>
39068a17a5SMark Rutland #include <asm/kasan.h>
40b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h>
41c1cc1552SCatalin Marinas #include <asm/sections.h>
42c1cc1552SCatalin Marinas #include <asm/setup.h>
43c1cc1552SCatalin Marinas #include <asm/sizes.h>
44c1cc1552SCatalin Marinas #include <asm/tlb.h>
45c79b954bSJungseok Lee #include <asm/memblock.h>
46c1cc1552SCatalin Marinas #include <asm/mmu_context.h>
471404d6f1SLaura Abbott #include <asm/ptdump.h>
48ec28bb9cSChintan Pandya #include <asm/tlbflush.h>
49c1cc1552SCatalin Marinas 
50c0951366SArd Biesheuvel #define NO_BLOCK_MAPPINGS	BIT(0)
51d27cfa1fSArd Biesheuvel #define NO_CONT_MAPPINGS	BIT(1)
52c0951366SArd Biesheuvel 
53dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS);
54fa2a8445SKristina Martsenko u64 idmap_ptrs_per_pgd = PTRS_PER_PGD;
55dd006da2SArd Biesheuvel 
565a9e3e15SJisheng Zhang u64 kimage_voffset __ro_after_init;
57a7f8de16SArd Biesheuvel EXPORT_SYMBOL(kimage_voffset);
58a7f8de16SArd Biesheuvel 
59c1cc1552SCatalin Marinas /*
60c1cc1552SCatalin Marinas  * Empty_zero_page is a special page that is used for zero-initialized data
61c1cc1552SCatalin Marinas  * and COW.
62c1cc1552SCatalin Marinas  */
635227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss;
64c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page);
65c1cc1552SCatalin Marinas 
66f9040773SArd Biesheuvel static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
67f9040773SArd Biesheuvel static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused;
68f9040773SArd Biesheuvel static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused;
69f9040773SArd Biesheuvel 
702330b7caSJun Yao static DEFINE_SPINLOCK(swapper_pgdir_lock);
712330b7caSJun Yao 
722330b7caSJun Yao void set_swapper_pgd(pgd_t *pgdp, pgd_t pgd)
732330b7caSJun Yao {
742330b7caSJun Yao 	pgd_t *fixmap_pgdp;
752330b7caSJun Yao 
762330b7caSJun Yao 	spin_lock(&swapper_pgdir_lock);
772330b7caSJun Yao 	fixmap_pgdp = pgd_set_fixmap(__pa(pgdp));
782330b7caSJun Yao 	WRITE_ONCE(*fixmap_pgdp, pgd);
792330b7caSJun Yao 	/*
802330b7caSJun Yao 	 * We need dsb(ishst) here to ensure the page-table-walker sees
812330b7caSJun Yao 	 * our new entry before set_p?d() returns. The fixmap's
822330b7caSJun Yao 	 * flush_tlb_kernel_range() via clear_fixmap() does this for us.
832330b7caSJun Yao 	 */
842330b7caSJun Yao 	pgd_clear_fixmap();
852330b7caSJun Yao 	spin_unlock(&swapper_pgdir_lock);
862330b7caSJun Yao }
872330b7caSJun Yao 
88c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
89c1cc1552SCatalin Marinas 			      unsigned long size, pgprot_t vma_prot)
90c1cc1552SCatalin Marinas {
91c1cc1552SCatalin Marinas 	if (!pfn_valid(pfn))
92c1cc1552SCatalin Marinas 		return pgprot_noncached(vma_prot);
93c1cc1552SCatalin Marinas 	else if (file->f_flags & O_SYNC)
94c1cc1552SCatalin Marinas 		return pgprot_writecombine(vma_prot);
95c1cc1552SCatalin Marinas 	return vma_prot;
96c1cc1552SCatalin Marinas }
97c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot);
98c1cc1552SCatalin Marinas 
99f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void)
100c1cc1552SCatalin Marinas {
1017142392dSSuzuki K. Poulose 	phys_addr_t phys;
1027142392dSSuzuki K. Poulose 	void *ptr;
1037142392dSSuzuki K. Poulose 
10421ab99c2SMark Rutland 	phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
105f4710445SMark Rutland 
106f4710445SMark Rutland 	/*
107f4710445SMark Rutland 	 * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE
108f4710445SMark Rutland 	 * slot will be free, so we can (ab)use the FIX_PTE slot to initialise
109f4710445SMark Rutland 	 * any level of table.
110f4710445SMark Rutland 	 */
111f4710445SMark Rutland 	ptr = pte_set_fixmap(phys);
112f4710445SMark Rutland 
11321ab99c2SMark Rutland 	memset(ptr, 0, PAGE_SIZE);
11421ab99c2SMark Rutland 
115f4710445SMark Rutland 	/*
116f4710445SMark Rutland 	 * Implicit barriers also ensure the zeroed page is visible to the page
117f4710445SMark Rutland 	 * table walker
118f4710445SMark Rutland 	 */
119f4710445SMark Rutland 	pte_clear_fixmap();
120f4710445SMark Rutland 
121f4710445SMark Rutland 	return phys;
122c1cc1552SCatalin Marinas }
123c1cc1552SCatalin Marinas 
124e98216b5SArd Biesheuvel static bool pgattr_change_is_safe(u64 old, u64 new)
125e98216b5SArd Biesheuvel {
126e98216b5SArd Biesheuvel 	/*
127e98216b5SArd Biesheuvel 	 * The following mapping attributes may be updated in live
128e98216b5SArd Biesheuvel 	 * kernel mappings without the need for break-before-make.
129e98216b5SArd Biesheuvel 	 */
130753e8abcSArd Biesheuvel 	static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE | PTE_NG;
131e98216b5SArd Biesheuvel 
132141d1497SArd Biesheuvel 	/* creating or taking down mappings is always safe */
133141d1497SArd Biesheuvel 	if (old == 0 || new == 0)
134141d1497SArd Biesheuvel 		return true;
135141d1497SArd Biesheuvel 
136141d1497SArd Biesheuvel 	/* live contiguous mappings may not be manipulated at all */
137141d1497SArd Biesheuvel 	if ((old | new) & PTE_CONT)
138141d1497SArd Biesheuvel 		return false;
139141d1497SArd Biesheuvel 
140753e8abcSArd Biesheuvel 	/* Transitioning from Non-Global to Global is unsafe */
141753e8abcSArd Biesheuvel 	if (old & ~new & PTE_NG)
142753e8abcSArd Biesheuvel 		return false;
1434e602056SWill Deacon 
144141d1497SArd Biesheuvel 	return ((old ^ new) & ~mask) == 0;
145e98216b5SArd Biesheuvel }
146e98216b5SArd Biesheuvel 
14720a004e7SWill Deacon static void init_pte(pmd_t *pmdp, unsigned long addr, unsigned long end,
148d27cfa1fSArd Biesheuvel 		     phys_addr_t phys, pgprot_t prot)
149c1cc1552SCatalin Marinas {
15020a004e7SWill Deacon 	pte_t *ptep;
151c1cc1552SCatalin Marinas 
15220a004e7SWill Deacon 	ptep = pte_set_fixmap_offset(pmdp, addr);
153c1cc1552SCatalin Marinas 	do {
15420a004e7SWill Deacon 		pte_t old_pte = READ_ONCE(*ptep);
155e98216b5SArd Biesheuvel 
15620a004e7SWill Deacon 		set_pte(ptep, pfn_pte(__phys_to_pfn(phys), prot));
157e98216b5SArd Biesheuvel 
158e98216b5SArd Biesheuvel 		/*
159e98216b5SArd Biesheuvel 		 * After the PTE entry has been populated once, we
160e98216b5SArd Biesheuvel 		 * only allow updates to the permission attributes.
161e98216b5SArd Biesheuvel 		 */
16220a004e7SWill Deacon 		BUG_ON(!pgattr_change_is_safe(pte_val(old_pte),
16320a004e7SWill Deacon 					      READ_ONCE(pte_val(*ptep))));
164e98216b5SArd Biesheuvel 
165e393cf40SArd Biesheuvel 		phys += PAGE_SIZE;
16620a004e7SWill Deacon 	} while (ptep++, addr += PAGE_SIZE, addr != end);
167f4710445SMark Rutland 
168f4710445SMark Rutland 	pte_clear_fixmap();
169c1cc1552SCatalin Marinas }
170c1cc1552SCatalin Marinas 
17120a004e7SWill Deacon static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr,
172d27cfa1fSArd Biesheuvel 				unsigned long end, phys_addr_t phys,
173d27cfa1fSArd Biesheuvel 				pgprot_t prot,
17453e1b329SArd Biesheuvel 				phys_addr_t (*pgtable_alloc)(void),
175c0951366SArd Biesheuvel 				int flags)
176c1cc1552SCatalin Marinas {
177c1cc1552SCatalin Marinas 	unsigned long next;
17820a004e7SWill Deacon 	pmd_t pmd = READ_ONCE(*pmdp);
179c1cc1552SCatalin Marinas 
18020a004e7SWill Deacon 	BUG_ON(pmd_sect(pmd));
18120a004e7SWill Deacon 	if (pmd_none(pmd)) {
182d27cfa1fSArd Biesheuvel 		phys_addr_t pte_phys;
183132233a7SLaura Abbott 		BUG_ON(!pgtable_alloc);
184d27cfa1fSArd Biesheuvel 		pte_phys = pgtable_alloc();
18520a004e7SWill Deacon 		__pmd_populate(pmdp, pte_phys, PMD_TYPE_TABLE);
18620a004e7SWill Deacon 		pmd = READ_ONCE(*pmdp);
187c1cc1552SCatalin Marinas 	}
18820a004e7SWill Deacon 	BUG_ON(pmd_bad(pmd));
189d27cfa1fSArd Biesheuvel 
190d27cfa1fSArd Biesheuvel 	do {
191d27cfa1fSArd Biesheuvel 		pgprot_t __prot = prot;
192d27cfa1fSArd Biesheuvel 
193d27cfa1fSArd Biesheuvel 		next = pte_cont_addr_end(addr, end);
194d27cfa1fSArd Biesheuvel 
195d27cfa1fSArd Biesheuvel 		/* use a contiguous mapping if the range is suitably aligned */
196d27cfa1fSArd Biesheuvel 		if ((((addr | next | phys) & ~CONT_PTE_MASK) == 0) &&
197d27cfa1fSArd Biesheuvel 		    (flags & NO_CONT_MAPPINGS) == 0)
198d27cfa1fSArd Biesheuvel 			__prot = __pgprot(pgprot_val(prot) | PTE_CONT);
199d27cfa1fSArd Biesheuvel 
20020a004e7SWill Deacon 		init_pte(pmdp, addr, next, phys, __prot);
201d27cfa1fSArd Biesheuvel 
202d27cfa1fSArd Biesheuvel 		phys += next - addr;
203d27cfa1fSArd Biesheuvel 	} while (addr = next, addr != end);
204d27cfa1fSArd Biesheuvel }
205d27cfa1fSArd Biesheuvel 
20620a004e7SWill Deacon static void init_pmd(pud_t *pudp, unsigned long addr, unsigned long end,
207d27cfa1fSArd Biesheuvel 		     phys_addr_t phys, pgprot_t prot,
208d27cfa1fSArd Biesheuvel 		     phys_addr_t (*pgtable_alloc)(void), int flags)
209d27cfa1fSArd Biesheuvel {
210d27cfa1fSArd Biesheuvel 	unsigned long next;
21120a004e7SWill Deacon 	pmd_t *pmdp;
212c1cc1552SCatalin Marinas 
21320a004e7SWill Deacon 	pmdp = pmd_set_fixmap_offset(pudp, addr);
214c1cc1552SCatalin Marinas 	do {
21520a004e7SWill Deacon 		pmd_t old_pmd = READ_ONCE(*pmdp);
216e98216b5SArd Biesheuvel 
217c1cc1552SCatalin Marinas 		next = pmd_addr_end(addr, end);
218e98216b5SArd Biesheuvel 
219c1cc1552SCatalin Marinas 		/* try section mapping first */
22083863f25SLaura Abbott 		if (((addr | next | phys) & ~SECTION_MASK) == 0 &&
221c0951366SArd Biesheuvel 		    (flags & NO_BLOCK_MAPPINGS) == 0) {
22220a004e7SWill Deacon 			pmd_set_huge(pmdp, phys, prot);
223e98216b5SArd Biesheuvel 
224a55f9929SCatalin Marinas 			/*
225e98216b5SArd Biesheuvel 			 * After the PMD entry has been populated once, we
226e98216b5SArd Biesheuvel 			 * only allow updates to the permission attributes.
227a55f9929SCatalin Marinas 			 */
228e98216b5SArd Biesheuvel 			BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd),
22920a004e7SWill Deacon 						      READ_ONCE(pmd_val(*pmdp))));
230a55f9929SCatalin Marinas 		} else {
23120a004e7SWill Deacon 			alloc_init_cont_pte(pmdp, addr, next, phys, prot,
232d27cfa1fSArd Biesheuvel 					    pgtable_alloc, flags);
233e98216b5SArd Biesheuvel 
234e98216b5SArd Biesheuvel 			BUG_ON(pmd_val(old_pmd) != 0 &&
23520a004e7SWill Deacon 			       pmd_val(old_pmd) != READ_ONCE(pmd_val(*pmdp)));
236a55f9929SCatalin Marinas 		}
237c1cc1552SCatalin Marinas 		phys += next - addr;
23820a004e7SWill Deacon 	} while (pmdp++, addr = next, addr != end);
239f4710445SMark Rutland 
240f4710445SMark Rutland 	pmd_clear_fixmap();
241c1cc1552SCatalin Marinas }
242c1cc1552SCatalin Marinas 
24320a004e7SWill Deacon static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr,
244d27cfa1fSArd Biesheuvel 				unsigned long end, phys_addr_t phys,
245d27cfa1fSArd Biesheuvel 				pgprot_t prot,
246d27cfa1fSArd Biesheuvel 				phys_addr_t (*pgtable_alloc)(void), int flags)
247d27cfa1fSArd Biesheuvel {
248d27cfa1fSArd Biesheuvel 	unsigned long next;
24920a004e7SWill Deacon 	pud_t pud = READ_ONCE(*pudp);
250d27cfa1fSArd Biesheuvel 
251d27cfa1fSArd Biesheuvel 	/*
252d27cfa1fSArd Biesheuvel 	 * Check for initial section mappings in the pgd/pud.
253d27cfa1fSArd Biesheuvel 	 */
25420a004e7SWill Deacon 	BUG_ON(pud_sect(pud));
25520a004e7SWill Deacon 	if (pud_none(pud)) {
256d27cfa1fSArd Biesheuvel 		phys_addr_t pmd_phys;
257d27cfa1fSArd Biesheuvel 		BUG_ON(!pgtable_alloc);
258d27cfa1fSArd Biesheuvel 		pmd_phys = pgtable_alloc();
25920a004e7SWill Deacon 		__pud_populate(pudp, pmd_phys, PUD_TYPE_TABLE);
26020a004e7SWill Deacon 		pud = READ_ONCE(*pudp);
261d27cfa1fSArd Biesheuvel 	}
26220a004e7SWill Deacon 	BUG_ON(pud_bad(pud));
263d27cfa1fSArd Biesheuvel 
264d27cfa1fSArd Biesheuvel 	do {
265d27cfa1fSArd Biesheuvel 		pgprot_t __prot = prot;
266d27cfa1fSArd Biesheuvel 
267d27cfa1fSArd Biesheuvel 		next = pmd_cont_addr_end(addr, end);
268d27cfa1fSArd Biesheuvel 
269d27cfa1fSArd Biesheuvel 		/* use a contiguous mapping if the range is suitably aligned */
270d27cfa1fSArd Biesheuvel 		if ((((addr | next | phys) & ~CONT_PMD_MASK) == 0) &&
271d27cfa1fSArd Biesheuvel 		    (flags & NO_CONT_MAPPINGS) == 0)
272d27cfa1fSArd Biesheuvel 			__prot = __pgprot(pgprot_val(prot) | PTE_CONT);
273d27cfa1fSArd Biesheuvel 
27420a004e7SWill Deacon 		init_pmd(pudp, addr, next, phys, __prot, pgtable_alloc, flags);
275d27cfa1fSArd Biesheuvel 
276d27cfa1fSArd Biesheuvel 		phys += next - addr;
277d27cfa1fSArd Biesheuvel 	} while (addr = next, addr != end);
278d27cfa1fSArd Biesheuvel }
279d27cfa1fSArd Biesheuvel 
280da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next,
281da141706SLaura Abbott 			unsigned long phys)
282da141706SLaura Abbott {
283da141706SLaura Abbott 	if (PAGE_SHIFT != 12)
284da141706SLaura Abbott 		return false;
285da141706SLaura Abbott 
286da141706SLaura Abbott 	if (((addr | next | phys) & ~PUD_MASK) != 0)
287da141706SLaura Abbott 		return false;
288da141706SLaura Abbott 
289da141706SLaura Abbott 	return true;
290da141706SLaura Abbott }
291da141706SLaura Abbott 
29220a004e7SWill Deacon static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end,
293da141706SLaura Abbott 			   phys_addr_t phys, pgprot_t prot,
29453e1b329SArd Biesheuvel 			   phys_addr_t (*pgtable_alloc)(void),
295c0951366SArd Biesheuvel 			   int flags)
296c1cc1552SCatalin Marinas {
297c1cc1552SCatalin Marinas 	unsigned long next;
29820a004e7SWill Deacon 	pud_t *pudp;
29920a004e7SWill Deacon 	pgd_t pgd = READ_ONCE(*pgdp);
300c1cc1552SCatalin Marinas 
30120a004e7SWill Deacon 	if (pgd_none(pgd)) {
302132233a7SLaura Abbott 		phys_addr_t pud_phys;
303132233a7SLaura Abbott 		BUG_ON(!pgtable_alloc);
304132233a7SLaura Abbott 		pud_phys = pgtable_alloc();
30520a004e7SWill Deacon 		__pgd_populate(pgdp, pud_phys, PUD_TYPE_TABLE);
30620a004e7SWill Deacon 		pgd = READ_ONCE(*pgdp);
307c79b954bSJungseok Lee 	}
30820a004e7SWill Deacon 	BUG_ON(pgd_bad(pgd));
309c79b954bSJungseok Lee 
31020a004e7SWill Deacon 	pudp = pud_set_fixmap_offset(pgdp, addr);
311c1cc1552SCatalin Marinas 	do {
31220a004e7SWill Deacon 		pud_t old_pud = READ_ONCE(*pudp);
313e98216b5SArd Biesheuvel 
314c1cc1552SCatalin Marinas 		next = pud_addr_end(addr, end);
315206a2a73SSteve Capper 
316206a2a73SSteve Capper 		/*
317206a2a73SSteve Capper 		 * For 4K granule only, attempt to put down a 1GB block
318206a2a73SSteve Capper 		 */
319c0951366SArd Biesheuvel 		if (use_1G_block(addr, next, phys) &&
320c0951366SArd Biesheuvel 		    (flags & NO_BLOCK_MAPPINGS) == 0) {
32120a004e7SWill Deacon 			pud_set_huge(pudp, phys, prot);
322206a2a73SSteve Capper 
323206a2a73SSteve Capper 			/*
324e98216b5SArd Biesheuvel 			 * After the PUD entry has been populated once, we
325e98216b5SArd Biesheuvel 			 * only allow updates to the permission attributes.
326206a2a73SSteve Capper 			 */
327e98216b5SArd Biesheuvel 			BUG_ON(!pgattr_change_is_safe(pud_val(old_pud),
32820a004e7SWill Deacon 						      READ_ONCE(pud_val(*pudp))));
329206a2a73SSteve Capper 		} else {
33020a004e7SWill Deacon 			alloc_init_cont_pmd(pudp, addr, next, phys, prot,
331c0951366SArd Biesheuvel 					    pgtable_alloc, flags);
332e98216b5SArd Biesheuvel 
333e98216b5SArd Biesheuvel 			BUG_ON(pud_val(old_pud) != 0 &&
33420a004e7SWill Deacon 			       pud_val(old_pud) != READ_ONCE(pud_val(*pudp)));
335206a2a73SSteve Capper 		}
336c1cc1552SCatalin Marinas 		phys += next - addr;
33720a004e7SWill Deacon 	} while (pudp++, addr = next, addr != end);
338f4710445SMark Rutland 
339f4710445SMark Rutland 	pud_clear_fixmap();
340c1cc1552SCatalin Marinas }
341c1cc1552SCatalin Marinas 
34240f87d31SArd Biesheuvel static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
34340f87d31SArd Biesheuvel 				 unsigned long virt, phys_addr_t size,
34440f87d31SArd Biesheuvel 				 pgprot_t prot,
34553e1b329SArd Biesheuvel 				 phys_addr_t (*pgtable_alloc)(void),
346c0951366SArd Biesheuvel 				 int flags)
347c1cc1552SCatalin Marinas {
348c1cc1552SCatalin Marinas 	unsigned long addr, length, end, next;
34920a004e7SWill Deacon 	pgd_t *pgdp = pgd_offset_raw(pgdir, virt);
350c1cc1552SCatalin Marinas 
351cc5d2b3bSMark Rutland 	/*
352cc5d2b3bSMark Rutland 	 * If the virtual and physical address don't have the same offset
353cc5d2b3bSMark Rutland 	 * within a page, we cannot map the region as the caller expects.
354cc5d2b3bSMark Rutland 	 */
355cc5d2b3bSMark Rutland 	if (WARN_ON((phys ^ virt) & ~PAGE_MASK))
356cc5d2b3bSMark Rutland 		return;
357cc5d2b3bSMark Rutland 
3589c4e08a3SMark Rutland 	phys &= PAGE_MASK;
359c1cc1552SCatalin Marinas 	addr = virt & PAGE_MASK;
360c1cc1552SCatalin Marinas 	length = PAGE_ALIGN(size + (virt & ~PAGE_MASK));
361c1cc1552SCatalin Marinas 
362c1cc1552SCatalin Marinas 	end = addr + length;
363c1cc1552SCatalin Marinas 	do {
364c1cc1552SCatalin Marinas 		next = pgd_addr_end(addr, end);
36520a004e7SWill Deacon 		alloc_init_pud(pgdp, addr, next, phys, prot, pgtable_alloc,
366c0951366SArd Biesheuvel 			       flags);
367c1cc1552SCatalin Marinas 		phys += next - addr;
36820a004e7SWill Deacon 	} while (pgdp++, addr = next, addr != end);
369c1cc1552SCatalin Marinas }
370c1cc1552SCatalin Marinas 
3711378dc3dSArd Biesheuvel static phys_addr_t pgd_pgtable_alloc(void)
372da141706SLaura Abbott {
37321ab99c2SMark Rutland 	void *ptr = (void *)__get_free_page(PGALLOC_GFP);
3741378dc3dSArd Biesheuvel 	if (!ptr || !pgtable_page_ctor(virt_to_page(ptr)))
3751378dc3dSArd Biesheuvel 		BUG();
37621ab99c2SMark Rutland 
37721ab99c2SMark Rutland 	/* Ensure the zeroed page is visible to the page table walker */
37821ab99c2SMark Rutland 	dsb(ishst);
379f4710445SMark Rutland 	return __pa(ptr);
380da141706SLaura Abbott }
381da141706SLaura Abbott 
382132233a7SLaura Abbott /*
383132233a7SLaura Abbott  * This function can only be used to modify existing table entries,
384132233a7SLaura Abbott  * without allocating new levels of table. Note that this permits the
385132233a7SLaura Abbott  * creation of new section or page entries.
386132233a7SLaura Abbott  */
387132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt,
388da141706SLaura Abbott 				  phys_addr_t size, pgprot_t prot)
389d7ecbddfSMark Salter {
390d7ecbddfSMark Salter 	if (virt < VMALLOC_START) {
391d7ecbddfSMark Salter 		pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
392d7ecbddfSMark Salter 			&phys, virt);
393d7ecbddfSMark Salter 		return;
394d7ecbddfSMark Salter 	}
395d27cfa1fSArd Biesheuvel 	__create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL,
396d27cfa1fSArd Biesheuvel 			     NO_CONT_MAPPINGS);
397d7ecbddfSMark Salter }
398d7ecbddfSMark Salter 
3998ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
4008ce837ceSArd Biesheuvel 			       unsigned long virt, phys_addr_t size,
401f14c66ceSArd Biesheuvel 			       pgprot_t prot, bool page_mappings_only)
4028ce837ceSArd Biesheuvel {
403c0951366SArd Biesheuvel 	int flags = 0;
404c0951366SArd Biesheuvel 
4051378dc3dSArd Biesheuvel 	BUG_ON(mm == &init_mm);
4061378dc3dSArd Biesheuvel 
407c0951366SArd Biesheuvel 	if (page_mappings_only)
408d27cfa1fSArd Biesheuvel 		flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;
409c0951366SArd Biesheuvel 
41011509a30SMark Rutland 	__create_pgd_mapping(mm->pgd, phys, virt, size, prot,
411c0951366SArd Biesheuvel 			     pgd_pgtable_alloc, flags);
412d7ecbddfSMark Salter }
413d7ecbddfSMark Salter 
414aa8c09beSArd Biesheuvel static void update_mapping_prot(phys_addr_t phys, unsigned long virt,
415da141706SLaura Abbott 				phys_addr_t size, pgprot_t prot)
416da141706SLaura Abbott {
417da141706SLaura Abbott 	if (virt < VMALLOC_START) {
418aa8c09beSArd Biesheuvel 		pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n",
419da141706SLaura Abbott 			&phys, virt);
420da141706SLaura Abbott 		return;
421da141706SLaura Abbott 	}
422da141706SLaura Abbott 
423d27cfa1fSArd Biesheuvel 	__create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL,
424d27cfa1fSArd Biesheuvel 			     NO_CONT_MAPPINGS);
425aa8c09beSArd Biesheuvel 
426aa8c09beSArd Biesheuvel 	/* flush the TLBs after updating live kernel mappings */
427aa8c09beSArd Biesheuvel 	flush_tlb_kernel_range(virt, virt + size);
428da141706SLaura Abbott }
429da141706SLaura Abbott 
43020a004e7SWill Deacon static void __init __map_memblock(pgd_t *pgdp, phys_addr_t start,
43198d2e153STakahiro Akashi 				  phys_addr_t end, pgprot_t prot, int flags)
432da141706SLaura Abbott {
43320a004e7SWill Deacon 	__create_pgd_mapping(pgdp, start, __phys_to_virt(start), end - start,
43498d2e153STakahiro Akashi 			     prot, early_pgtable_alloc, flags);
435da141706SLaura Abbott }
436da141706SLaura Abbott 
4375ea5306cSArd Biesheuvel void __init mark_linear_text_alias_ro(void)
4385ea5306cSArd Biesheuvel {
4395ea5306cSArd Biesheuvel 	/*
4405ea5306cSArd Biesheuvel 	 * Remove the write permissions from the linear alias of .text/.rodata
4415ea5306cSArd Biesheuvel 	 */
4425ea5306cSArd Biesheuvel 	update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text),
4435ea5306cSArd Biesheuvel 			    (unsigned long)__init_begin - (unsigned long)_text,
4445ea5306cSArd Biesheuvel 			    PAGE_KERNEL_RO);
4455ea5306cSArd Biesheuvel }
4465ea5306cSArd Biesheuvel 
44720a004e7SWill Deacon static void __init map_mem(pgd_t *pgdp)
448c1cc1552SCatalin Marinas {
44998d2e153STakahiro Akashi 	phys_addr_t kernel_start = __pa_symbol(_text);
45098d2e153STakahiro Akashi 	phys_addr_t kernel_end = __pa_symbol(__init_begin);
451c1cc1552SCatalin Marinas 	struct memblock_region *reg;
45298d2e153STakahiro Akashi 	int flags = 0;
45398d2e153STakahiro Akashi 
45498d2e153STakahiro Akashi 	if (debug_pagealloc_enabled())
45598d2e153STakahiro Akashi 		flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;
45698d2e153STakahiro Akashi 
45798d2e153STakahiro Akashi 	/*
45898d2e153STakahiro Akashi 	 * Take care not to create a writable alias for the
45998d2e153STakahiro Akashi 	 * read-only text and rodata sections of the kernel image.
46098d2e153STakahiro Akashi 	 * So temporarily mark them as NOMAP to skip mappings in
46198d2e153STakahiro Akashi 	 * the following for-loop
46298d2e153STakahiro Akashi 	 */
46398d2e153STakahiro Akashi 	memblock_mark_nomap(kernel_start, kernel_end - kernel_start);
46498d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE
46598d2e153STakahiro Akashi 	if (crashk_res.end)
46698d2e153STakahiro Akashi 		memblock_mark_nomap(crashk_res.start,
46798d2e153STakahiro Akashi 				    resource_size(&crashk_res));
46898d2e153STakahiro Akashi #endif
469f6bc87c3SSteve Capper 
470c1cc1552SCatalin Marinas 	/* map all the memory banks */
471c1cc1552SCatalin Marinas 	for_each_memblock(memory, reg) {
472c1cc1552SCatalin Marinas 		phys_addr_t start = reg->base;
473c1cc1552SCatalin Marinas 		phys_addr_t end = start + reg->size;
474c1cc1552SCatalin Marinas 
475c1cc1552SCatalin Marinas 		if (start >= end)
476c1cc1552SCatalin Marinas 			break;
47768709f45SArd Biesheuvel 		if (memblock_is_nomap(reg))
47868709f45SArd Biesheuvel 			continue;
479c1cc1552SCatalin Marinas 
48020a004e7SWill Deacon 		__map_memblock(pgdp, start, end, PAGE_KERNEL, flags);
481c1cc1552SCatalin Marinas 	}
48298d2e153STakahiro Akashi 
48398d2e153STakahiro Akashi 	/*
48498d2e153STakahiro Akashi 	 * Map the linear alias of the [_text, __init_begin) interval
48598d2e153STakahiro Akashi 	 * as non-executable now, and remove the write permission in
48698d2e153STakahiro Akashi 	 * mark_linear_text_alias_ro() below (which will be called after
48798d2e153STakahiro Akashi 	 * alternative patching has completed). This makes the contents
48898d2e153STakahiro Akashi 	 * of the region accessible to subsystems such as hibernate,
48998d2e153STakahiro Akashi 	 * but protects it from inadvertent modification or execution.
49098d2e153STakahiro Akashi 	 * Note that contiguous mappings cannot be remapped in this way,
49198d2e153STakahiro Akashi 	 * so we should avoid them here.
49298d2e153STakahiro Akashi 	 */
49320a004e7SWill Deacon 	__map_memblock(pgdp, kernel_start, kernel_end,
49498d2e153STakahiro Akashi 		       PAGE_KERNEL, NO_CONT_MAPPINGS);
49598d2e153STakahiro Akashi 	memblock_clear_nomap(kernel_start, kernel_end - kernel_start);
49698d2e153STakahiro Akashi 
49798d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE
49898d2e153STakahiro Akashi 	/*
49998d2e153STakahiro Akashi 	 * Use page-level mappings here so that we can shrink the region
50098d2e153STakahiro Akashi 	 * in page granularity and put back unused memory to buddy system
50198d2e153STakahiro Akashi 	 * through /sys/kernel/kexec_crash_size interface.
50298d2e153STakahiro Akashi 	 */
50398d2e153STakahiro Akashi 	if (crashk_res.end) {
50420a004e7SWill Deacon 		__map_memblock(pgdp, crashk_res.start, crashk_res.end + 1,
50598d2e153STakahiro Akashi 			       PAGE_KERNEL,
50698d2e153STakahiro Akashi 			       NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS);
50798d2e153STakahiro Akashi 		memblock_clear_nomap(crashk_res.start,
50898d2e153STakahiro Akashi 				     resource_size(&crashk_res));
50998d2e153STakahiro Akashi 	}
51098d2e153STakahiro Akashi #endif
511c1cc1552SCatalin Marinas }
512c1cc1552SCatalin Marinas 
513da141706SLaura Abbott void mark_rodata_ro(void)
514da141706SLaura Abbott {
5152f39b5f9SJeremy Linton 	unsigned long section_size;
516f9040773SArd Biesheuvel 
5172f39b5f9SJeremy Linton 	/*
5189fdc14c5SArd Biesheuvel 	 * mark .rodata as read only. Use __init_begin rather than __end_rodata
5199fdc14c5SArd Biesheuvel 	 * to cover NOTES and EXCEPTION_TABLE.
5202f39b5f9SJeremy Linton 	 */
5219fdc14c5SArd Biesheuvel 	section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata;
522aa8c09beSArd Biesheuvel 	update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata,
5232f39b5f9SJeremy Linton 			    section_size, PAGE_KERNEL_RO);
524e98216b5SArd Biesheuvel 
5251404d6f1SLaura Abbott 	debug_checkwx();
526da141706SLaura Abbott }
527da141706SLaura Abbott 
52820a004e7SWill Deacon static void __init map_kernel_segment(pgd_t *pgdp, void *va_start, void *va_end,
529d27cfa1fSArd Biesheuvel 				      pgprot_t prot, struct vm_struct *vma,
53092bbd16eSWill Deacon 				      int flags, unsigned long vm_flags)
531068a17a5SMark Rutland {
5322077be67SLaura Abbott 	phys_addr_t pa_start = __pa_symbol(va_start);
533068a17a5SMark Rutland 	unsigned long size = va_end - va_start;
534068a17a5SMark Rutland 
535068a17a5SMark Rutland 	BUG_ON(!PAGE_ALIGNED(pa_start));
536068a17a5SMark Rutland 	BUG_ON(!PAGE_ALIGNED(size));
537068a17a5SMark Rutland 
53820a004e7SWill Deacon 	__create_pgd_mapping(pgdp, pa_start, (unsigned long)va_start, size, prot,
539d27cfa1fSArd Biesheuvel 			     early_pgtable_alloc, flags);
540f9040773SArd Biesheuvel 
54192bbd16eSWill Deacon 	if (!(vm_flags & VM_NO_GUARD))
54292bbd16eSWill Deacon 		size += PAGE_SIZE;
54392bbd16eSWill Deacon 
544f9040773SArd Biesheuvel 	vma->addr	= va_start;
545f9040773SArd Biesheuvel 	vma->phys_addr	= pa_start;
546f9040773SArd Biesheuvel 	vma->size	= size;
54792bbd16eSWill Deacon 	vma->flags	= VM_MAP | vm_flags;
548f9040773SArd Biesheuvel 	vma->caller	= __builtin_return_address(0);
549f9040773SArd Biesheuvel 
550f9040773SArd Biesheuvel 	vm_area_add_early(vma);
551068a17a5SMark Rutland }
552068a17a5SMark Rutland 
55328b066daSArd Biesheuvel static int __init parse_rodata(char *arg)
55428b066daSArd Biesheuvel {
55528b066daSArd Biesheuvel 	return strtobool(arg, &rodata_enabled);
55628b066daSArd Biesheuvel }
55728b066daSArd Biesheuvel early_param("rodata", parse_rodata);
55828b066daSArd Biesheuvel 
55951a0048bSWill Deacon #ifdef CONFIG_UNMAP_KERNEL_AT_EL0
56051a0048bSWill Deacon static int __init map_entry_trampoline(void)
56151a0048bSWill Deacon {
56251a0048bSWill Deacon 	pgprot_t prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC;
56351a0048bSWill Deacon 	phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start);
56451a0048bSWill Deacon 
56551a0048bSWill Deacon 	/* The trampoline is always mapped and can therefore be global */
56651a0048bSWill Deacon 	pgprot_val(prot) &= ~PTE_NG;
56751a0048bSWill Deacon 
56851a0048bSWill Deacon 	/* Map only the text into the trampoline page table */
56951a0048bSWill Deacon 	memset(tramp_pg_dir, 0, PGD_SIZE);
57051a0048bSWill Deacon 	__create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE,
57151a0048bSWill Deacon 			     prot, pgd_pgtable_alloc, 0);
57251a0048bSWill Deacon 
5736c27c408SWill Deacon 	/* Map both the text and data into the kernel page table */
57451a0048bSWill Deacon 	__set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot);
5756c27c408SWill Deacon 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) {
5766c27c408SWill Deacon 		extern char __entry_tramp_data_start[];
5776c27c408SWill Deacon 
5786c27c408SWill Deacon 		__set_fixmap(FIX_ENTRY_TRAMP_DATA,
5796c27c408SWill Deacon 			     __pa_symbol(__entry_tramp_data_start),
5806c27c408SWill Deacon 			     PAGE_KERNEL_RO);
5816c27c408SWill Deacon 	}
5826c27c408SWill Deacon 
58351a0048bSWill Deacon 	return 0;
58451a0048bSWill Deacon }
58551a0048bSWill Deacon core_initcall(map_entry_trampoline);
58651a0048bSWill Deacon #endif
58751a0048bSWill Deacon 
588068a17a5SMark Rutland /*
589068a17a5SMark Rutland  * Create fine-grained mappings for the kernel.
590068a17a5SMark Rutland  */
59120a004e7SWill Deacon static void __init map_kernel(pgd_t *pgdp)
592068a17a5SMark Rutland {
5932ebe088bSArd Biesheuvel 	static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext,
5942ebe088bSArd Biesheuvel 				vmlinux_initdata, vmlinux_data;
595068a17a5SMark Rutland 
59628b066daSArd Biesheuvel 	/*
59728b066daSArd Biesheuvel 	 * External debuggers may need to write directly to the text
59828b066daSArd Biesheuvel 	 * mapping to install SW breakpoints. Allow this (only) when
59928b066daSArd Biesheuvel 	 * explicitly requested with rodata=off.
60028b066daSArd Biesheuvel 	 */
60128b066daSArd Biesheuvel 	pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC;
60228b066daSArd Biesheuvel 
603d27cfa1fSArd Biesheuvel 	/*
604d27cfa1fSArd Biesheuvel 	 * Only rodata will be remapped with different permissions later on,
605d27cfa1fSArd Biesheuvel 	 * all other segments are allowed to use contiguous mappings.
606d27cfa1fSArd Biesheuvel 	 */
60720a004e7SWill Deacon 	map_kernel_segment(pgdp, _text, _etext, text_prot, &vmlinux_text, 0,
60892bbd16eSWill Deacon 			   VM_NO_GUARD);
60920a004e7SWill Deacon 	map_kernel_segment(pgdp, __start_rodata, __inittext_begin, PAGE_KERNEL,
61092bbd16eSWill Deacon 			   &vmlinux_rodata, NO_CONT_MAPPINGS, VM_NO_GUARD);
61120a004e7SWill Deacon 	map_kernel_segment(pgdp, __inittext_begin, __inittext_end, text_prot,
61292bbd16eSWill Deacon 			   &vmlinux_inittext, 0, VM_NO_GUARD);
61320a004e7SWill Deacon 	map_kernel_segment(pgdp, __initdata_begin, __initdata_end, PAGE_KERNEL,
61492bbd16eSWill Deacon 			   &vmlinux_initdata, 0, VM_NO_GUARD);
61520a004e7SWill Deacon 	map_kernel_segment(pgdp, _data, _end, PAGE_KERNEL, &vmlinux_data, 0, 0);
616068a17a5SMark Rutland 
61720a004e7SWill Deacon 	if (!READ_ONCE(pgd_val(*pgd_offset_raw(pgdp, FIXADDR_START)))) {
618068a17a5SMark Rutland 		/*
619f9040773SArd Biesheuvel 		 * The fixmap falls in a separate pgd to the kernel, and doesn't
620f9040773SArd Biesheuvel 		 * live in the carveout for the swapper_pg_dir. We can simply
621f9040773SArd Biesheuvel 		 * re-use the existing dir for the fixmap.
622068a17a5SMark Rutland 		 */
62320a004e7SWill Deacon 		set_pgd(pgd_offset_raw(pgdp, FIXADDR_START),
62420a004e7SWill Deacon 			READ_ONCE(*pgd_offset_k(FIXADDR_START)));
625f9040773SArd Biesheuvel 	} else if (CONFIG_PGTABLE_LEVELS > 3) {
626f9040773SArd Biesheuvel 		/*
627f9040773SArd Biesheuvel 		 * The fixmap shares its top level pgd entry with the kernel
628f9040773SArd Biesheuvel 		 * mapping. This can really only occur when we are running
629f9040773SArd Biesheuvel 		 * with 16k/4 levels, so we can simply reuse the pud level
630f9040773SArd Biesheuvel 		 * entry instead.
631f9040773SArd Biesheuvel 		 */
632f9040773SArd Biesheuvel 		BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
63320a004e7SWill Deacon 		pud_populate(&init_mm,
63420a004e7SWill Deacon 			     pud_set_fixmap_offset(pgdp, FIXADDR_START),
63519338304SKristina Martsenko 			     lm_alias(bm_pmd));
636f9040773SArd Biesheuvel 		pud_clear_fixmap();
637f9040773SArd Biesheuvel 	} else {
638f9040773SArd Biesheuvel 		BUG();
639f9040773SArd Biesheuvel 	}
640068a17a5SMark Rutland 
64120a004e7SWill Deacon 	kasan_copy_shadow(pgdp);
642068a17a5SMark Rutland }
643068a17a5SMark Rutland 
644c1cc1552SCatalin Marinas /*
645c1cc1552SCatalin Marinas  * paging_init() sets up the page tables, initialises the zone memory
646c1cc1552SCatalin Marinas  * maps and sets up the zero page.
647c1cc1552SCatalin Marinas  */
648c1cc1552SCatalin Marinas void __init paging_init(void)
649c1cc1552SCatalin Marinas {
6502330b7caSJun Yao 	pgd_t *pgdp = pgd_set_fixmap(__pa_symbol(swapper_pg_dir));
6512330b7caSJun Yao 
6522330b7caSJun Yao 	map_kernel(pgdp);
6532330b7caSJun Yao 	map_mem(pgdp);
6542330b7caSJun Yao 
6552330b7caSJun Yao 	pgd_clear_fixmap();
656068a17a5SMark Rutland 
6572077be67SLaura Abbott 	cpu_replace_ttbr1(lm_alias(swapper_pg_dir));
6582b5548b6SJun Yao 	init_mm.pgd = swapper_pg_dir;
659068a17a5SMark Rutland 
6602b5548b6SJun Yao 	memblock_free(__pa_symbol(init_pg_dir),
6612b5548b6SJun Yao 		      __pa_symbol(init_pg_end) - __pa_symbol(init_pg_dir));
662c1cc1552SCatalin Marinas }
663c1cc1552SCatalin Marinas 
664c1cc1552SCatalin Marinas /*
665c1cc1552SCatalin Marinas  * Check whether a kernel address is valid (derived from arch/x86/).
666c1cc1552SCatalin Marinas  */
667c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr)
668c1cc1552SCatalin Marinas {
66920a004e7SWill Deacon 	pgd_t *pgdp;
67020a004e7SWill Deacon 	pud_t *pudp, pud;
67120a004e7SWill Deacon 	pmd_t *pmdp, pmd;
67220a004e7SWill Deacon 	pte_t *ptep, pte;
673c1cc1552SCatalin Marinas 
674c1cc1552SCatalin Marinas 	if ((((long)addr) >> VA_BITS) != -1UL)
675c1cc1552SCatalin Marinas 		return 0;
676c1cc1552SCatalin Marinas 
67720a004e7SWill Deacon 	pgdp = pgd_offset_k(addr);
67820a004e7SWill Deacon 	if (pgd_none(READ_ONCE(*pgdp)))
679c1cc1552SCatalin Marinas 		return 0;
680c1cc1552SCatalin Marinas 
68120a004e7SWill Deacon 	pudp = pud_offset(pgdp, addr);
68220a004e7SWill Deacon 	pud = READ_ONCE(*pudp);
68320a004e7SWill Deacon 	if (pud_none(pud))
684c1cc1552SCatalin Marinas 		return 0;
685c1cc1552SCatalin Marinas 
68620a004e7SWill Deacon 	if (pud_sect(pud))
68720a004e7SWill Deacon 		return pfn_valid(pud_pfn(pud));
688206a2a73SSteve Capper 
68920a004e7SWill Deacon 	pmdp = pmd_offset(pudp, addr);
69020a004e7SWill Deacon 	pmd = READ_ONCE(*pmdp);
69120a004e7SWill Deacon 	if (pmd_none(pmd))
692c1cc1552SCatalin Marinas 		return 0;
693c1cc1552SCatalin Marinas 
69420a004e7SWill Deacon 	if (pmd_sect(pmd))
69520a004e7SWill Deacon 		return pfn_valid(pmd_pfn(pmd));
696da6e4cb6SDave Anderson 
69720a004e7SWill Deacon 	ptep = pte_offset_kernel(pmdp, addr);
69820a004e7SWill Deacon 	pte = READ_ONCE(*ptep);
69920a004e7SWill Deacon 	if (pte_none(pte))
700c1cc1552SCatalin Marinas 		return 0;
701c1cc1552SCatalin Marinas 
70220a004e7SWill Deacon 	return pfn_valid(pte_pfn(pte));
703c1cc1552SCatalin Marinas }
704c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP
705b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS
7067b73d978SChristoph Hellwig int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
7077b73d978SChristoph Hellwig 		struct vmem_altmap *altmap)
708c1cc1552SCatalin Marinas {
7090aad818bSJohannes Weiner 	return vmemmap_populate_basepages(start, end, node);
710c1cc1552SCatalin Marinas }
711b433dce0SSuzuki K. Poulose #else	/* !ARM64_SWAPPER_USES_SECTION_MAPS */
7127b73d978SChristoph Hellwig int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
7137b73d978SChristoph Hellwig 		struct vmem_altmap *altmap)
714c1cc1552SCatalin Marinas {
7150aad818bSJohannes Weiner 	unsigned long addr = start;
716c1cc1552SCatalin Marinas 	unsigned long next;
71720a004e7SWill Deacon 	pgd_t *pgdp;
71820a004e7SWill Deacon 	pud_t *pudp;
71920a004e7SWill Deacon 	pmd_t *pmdp;
720c1cc1552SCatalin Marinas 
721c1cc1552SCatalin Marinas 	do {
722c1cc1552SCatalin Marinas 		next = pmd_addr_end(addr, end);
723c1cc1552SCatalin Marinas 
72420a004e7SWill Deacon 		pgdp = vmemmap_pgd_populate(addr, node);
72520a004e7SWill Deacon 		if (!pgdp)
726c1cc1552SCatalin Marinas 			return -ENOMEM;
727c1cc1552SCatalin Marinas 
72820a004e7SWill Deacon 		pudp = vmemmap_pud_populate(pgdp, addr, node);
72920a004e7SWill Deacon 		if (!pudp)
730c1cc1552SCatalin Marinas 			return -ENOMEM;
731c1cc1552SCatalin Marinas 
73220a004e7SWill Deacon 		pmdp = pmd_offset(pudp, addr);
73320a004e7SWill Deacon 		if (pmd_none(READ_ONCE(*pmdp))) {
734c1cc1552SCatalin Marinas 			void *p = NULL;
735c1cc1552SCatalin Marinas 
736c1cc1552SCatalin Marinas 			p = vmemmap_alloc_block_buf(PMD_SIZE, node);
737c1cc1552SCatalin Marinas 			if (!p)
738c1cc1552SCatalin Marinas 				return -ENOMEM;
739c1cc1552SCatalin Marinas 
74020a004e7SWill Deacon 			pmd_set_huge(pmdp, __pa(p), __pgprot(PROT_SECT_NORMAL));
741c1cc1552SCatalin Marinas 		} else
74220a004e7SWill Deacon 			vmemmap_verify((pte_t *)pmdp, node, addr, next);
743c1cc1552SCatalin Marinas 	} while (addr = next, addr != end);
744c1cc1552SCatalin Marinas 
745c1cc1552SCatalin Marinas 	return 0;
746c1cc1552SCatalin Marinas }
747c1cc1552SCatalin Marinas #endif	/* CONFIG_ARM64_64K_PAGES */
74824b6d416SChristoph Hellwig void vmemmap_free(unsigned long start, unsigned long end,
74924b6d416SChristoph Hellwig 		struct vmem_altmap *altmap)
7500197518cSTang Chen {
7510197518cSTang Chen }
752c1cc1552SCatalin Marinas #endif	/* CONFIG_SPARSEMEM_VMEMMAP */
753af86e597SLaura Abbott 
754af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr)
755af86e597SLaura Abbott {
75620a004e7SWill Deacon 	pgd_t *pgdp = pgd_offset_k(addr);
75720a004e7SWill Deacon 	pgd_t pgd = READ_ONCE(*pgdp);
758af86e597SLaura Abbott 
75920a004e7SWill Deacon 	BUG_ON(pgd_none(pgd) || pgd_bad(pgd));
760af86e597SLaura Abbott 
76120a004e7SWill Deacon 	return pud_offset_kimg(pgdp, addr);
762af86e597SLaura Abbott }
763af86e597SLaura Abbott 
764af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr)
765af86e597SLaura Abbott {
76620a004e7SWill Deacon 	pud_t *pudp = fixmap_pud(addr);
76720a004e7SWill Deacon 	pud_t pud = READ_ONCE(*pudp);
768af86e597SLaura Abbott 
76920a004e7SWill Deacon 	BUG_ON(pud_none(pud) || pud_bad(pud));
770af86e597SLaura Abbott 
77120a004e7SWill Deacon 	return pmd_offset_kimg(pudp, addr);
772af86e597SLaura Abbott }
773af86e597SLaura Abbott 
774af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr)
775af86e597SLaura Abbott {
776157962f5SArd Biesheuvel 	return &bm_pte[pte_index(addr)];
777af86e597SLaura Abbott }
778af86e597SLaura Abbott 
7792077be67SLaura Abbott /*
7802077be67SLaura Abbott  * The p*d_populate functions call virt_to_phys implicitly so they can't be used
7812077be67SLaura Abbott  * directly on kernel symbols (bm_p*d). This function is called too early to use
7822077be67SLaura Abbott  * lm_alias so __p*d_populate functions must be used to populate with the
7832077be67SLaura Abbott  * physical address from __pa_symbol.
7842077be67SLaura Abbott  */
785af86e597SLaura Abbott void __init early_fixmap_init(void)
786af86e597SLaura Abbott {
78720a004e7SWill Deacon 	pgd_t *pgdp, pgd;
78820a004e7SWill Deacon 	pud_t *pudp;
78920a004e7SWill Deacon 	pmd_t *pmdp;
790af86e597SLaura Abbott 	unsigned long addr = FIXADDR_START;
791af86e597SLaura Abbott 
79220a004e7SWill Deacon 	pgdp = pgd_offset_k(addr);
79320a004e7SWill Deacon 	pgd = READ_ONCE(*pgdp);
794f80fb3a3SArd Biesheuvel 	if (CONFIG_PGTABLE_LEVELS > 3 &&
79520a004e7SWill Deacon 	    !(pgd_none(pgd) || pgd_page_paddr(pgd) == __pa_symbol(bm_pud))) {
796f9040773SArd Biesheuvel 		/*
797f9040773SArd Biesheuvel 		 * We only end up here if the kernel mapping and the fixmap
798f9040773SArd Biesheuvel 		 * share the top level pgd entry, which should only happen on
799f9040773SArd Biesheuvel 		 * 16k/4 levels configurations.
800f9040773SArd Biesheuvel 		 */
801f9040773SArd Biesheuvel 		BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
80220a004e7SWill Deacon 		pudp = pud_offset_kimg(pgdp, addr);
803f9040773SArd Biesheuvel 	} else {
80420a004e7SWill Deacon 		if (pgd_none(pgd))
80520a004e7SWill Deacon 			__pgd_populate(pgdp, __pa_symbol(bm_pud), PUD_TYPE_TABLE);
80620a004e7SWill Deacon 		pudp = fixmap_pud(addr);
807f9040773SArd Biesheuvel 	}
80820a004e7SWill Deacon 	if (pud_none(READ_ONCE(*pudp)))
80920a004e7SWill Deacon 		__pud_populate(pudp, __pa_symbol(bm_pmd), PMD_TYPE_TABLE);
81020a004e7SWill Deacon 	pmdp = fixmap_pmd(addr);
81120a004e7SWill Deacon 	__pmd_populate(pmdp, __pa_symbol(bm_pte), PMD_TYPE_TABLE);
812af86e597SLaura Abbott 
813af86e597SLaura Abbott 	/*
814af86e597SLaura Abbott 	 * The boot-ioremap range spans multiple pmds, for which
815157962f5SArd Biesheuvel 	 * we are not prepared:
816af86e597SLaura Abbott 	 */
817af86e597SLaura Abbott 	BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
818af86e597SLaura Abbott 		     != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
819af86e597SLaura Abbott 
82020a004e7SWill Deacon 	if ((pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)))
82120a004e7SWill Deacon 	     || pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) {
822af86e597SLaura Abbott 		WARN_ON(1);
82320a004e7SWill Deacon 		pr_warn("pmdp %p != %p, %p\n",
82420a004e7SWill Deacon 			pmdp, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)),
825af86e597SLaura Abbott 			fixmap_pmd(fix_to_virt(FIX_BTMAP_END)));
826af86e597SLaura Abbott 		pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
827af86e597SLaura Abbott 			fix_to_virt(FIX_BTMAP_BEGIN));
828af86e597SLaura Abbott 		pr_warn("fix_to_virt(FIX_BTMAP_END):   %08lx\n",
829af86e597SLaura Abbott 			fix_to_virt(FIX_BTMAP_END));
830af86e597SLaura Abbott 
831af86e597SLaura Abbott 		pr_warn("FIX_BTMAP_END:       %d\n", FIX_BTMAP_END);
832af86e597SLaura Abbott 		pr_warn("FIX_BTMAP_BEGIN:     %d\n", FIX_BTMAP_BEGIN);
833af86e597SLaura Abbott 	}
834af86e597SLaura Abbott }
835af86e597SLaura Abbott 
83618b4b276SJames Morse /*
83718b4b276SJames Morse  * Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we
83818b4b276SJames Morse  * ever need to use IPIs for TLB broadcasting, then we're in trouble here.
83918b4b276SJames Morse  */
840af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx,
841af86e597SLaura Abbott 			       phys_addr_t phys, pgprot_t flags)
842af86e597SLaura Abbott {
843af86e597SLaura Abbott 	unsigned long addr = __fix_to_virt(idx);
84420a004e7SWill Deacon 	pte_t *ptep;
845af86e597SLaura Abbott 
846b63dbef9SMark Rutland 	BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
847af86e597SLaura Abbott 
84820a004e7SWill Deacon 	ptep = fixmap_pte(addr);
849af86e597SLaura Abbott 
850af86e597SLaura Abbott 	if (pgprot_val(flags)) {
85120a004e7SWill Deacon 		set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, flags));
852af86e597SLaura Abbott 	} else {
85320a004e7SWill Deacon 		pte_clear(&init_mm, addr, ptep);
854af86e597SLaura Abbott 		flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
855af86e597SLaura Abbott 	}
856af86e597SLaura Abbott }
85761bd93ceSArd Biesheuvel 
858f80fb3a3SArd Biesheuvel void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot)
85961bd93ceSArd Biesheuvel {
86061bd93ceSArd Biesheuvel 	const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
861f80fb3a3SArd Biesheuvel 	int offset;
86261bd93ceSArd Biesheuvel 	void *dt_virt;
86361bd93ceSArd Biesheuvel 
86461bd93ceSArd Biesheuvel 	/*
86561bd93ceSArd Biesheuvel 	 * Check whether the physical FDT address is set and meets the minimum
86661bd93ceSArd Biesheuvel 	 * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be
86704a84810SArd Biesheuvel 	 * at least 8 bytes so that we can always access the magic and size
86804a84810SArd Biesheuvel 	 * fields of the FDT header after mapping the first chunk, double check
86904a84810SArd Biesheuvel 	 * here if that is indeed the case.
87061bd93ceSArd Biesheuvel 	 */
87161bd93ceSArd Biesheuvel 	BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
87261bd93ceSArd Biesheuvel 	if (!dt_phys || dt_phys % MIN_FDT_ALIGN)
87361bd93ceSArd Biesheuvel 		return NULL;
87461bd93ceSArd Biesheuvel 
87561bd93ceSArd Biesheuvel 	/*
87661bd93ceSArd Biesheuvel 	 * Make sure that the FDT region can be mapped without the need to
87761bd93ceSArd Biesheuvel 	 * allocate additional translation table pages, so that it is safe
878132233a7SLaura Abbott 	 * to call create_mapping_noalloc() this early.
87961bd93ceSArd Biesheuvel 	 *
88061bd93ceSArd Biesheuvel 	 * On 64k pages, the FDT will be mapped using PTEs, so we need to
88161bd93ceSArd Biesheuvel 	 * be in the same PMD as the rest of the fixmap.
88261bd93ceSArd Biesheuvel 	 * On 4k pages, we'll use section mappings for the FDT so we only
88361bd93ceSArd Biesheuvel 	 * have to be in the same PUD.
88461bd93ceSArd Biesheuvel 	 */
88561bd93ceSArd Biesheuvel 	BUILD_BUG_ON(dt_virt_base % SZ_2M);
88661bd93ceSArd Biesheuvel 
887b433dce0SSuzuki K. Poulose 	BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT !=
888b433dce0SSuzuki K. Poulose 		     __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT);
88961bd93ceSArd Biesheuvel 
890b433dce0SSuzuki K. Poulose 	offset = dt_phys % SWAPPER_BLOCK_SIZE;
89161bd93ceSArd Biesheuvel 	dt_virt = (void *)dt_virt_base + offset;
89261bd93ceSArd Biesheuvel 
89361bd93ceSArd Biesheuvel 	/* map the first chunk so we can read the size from the header */
894132233a7SLaura Abbott 	create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE),
895132233a7SLaura Abbott 			dt_virt_base, SWAPPER_BLOCK_SIZE, prot);
89661bd93ceSArd Biesheuvel 
89704a84810SArd Biesheuvel 	if (fdt_magic(dt_virt) != FDT_MAGIC)
89861bd93ceSArd Biesheuvel 		return NULL;
89961bd93ceSArd Biesheuvel 
900f80fb3a3SArd Biesheuvel 	*size = fdt_totalsize(dt_virt);
901f80fb3a3SArd Biesheuvel 	if (*size > MAX_FDT_SIZE)
90261bd93ceSArd Biesheuvel 		return NULL;
90361bd93ceSArd Biesheuvel 
904f80fb3a3SArd Biesheuvel 	if (offset + *size > SWAPPER_BLOCK_SIZE)
905132233a7SLaura Abbott 		create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base,
906f80fb3a3SArd Biesheuvel 			       round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot);
907f80fb3a3SArd Biesheuvel 
908f80fb3a3SArd Biesheuvel 	return dt_virt;
909f80fb3a3SArd Biesheuvel }
910f80fb3a3SArd Biesheuvel 
911f80fb3a3SArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys)
912f80fb3a3SArd Biesheuvel {
913f80fb3a3SArd Biesheuvel 	void *dt_virt;
914f80fb3a3SArd Biesheuvel 	int size;
915f80fb3a3SArd Biesheuvel 
916f80fb3a3SArd Biesheuvel 	dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO);
917f80fb3a3SArd Biesheuvel 	if (!dt_virt)
918f80fb3a3SArd Biesheuvel 		return NULL;
91961bd93ceSArd Biesheuvel 
92061bd93ceSArd Biesheuvel 	memblock_reserve(dt_phys, size);
92161bd93ceSArd Biesheuvel 	return dt_virt;
92261bd93ceSArd Biesheuvel }
923324420bfSArd Biesheuvel 
924324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void)
925324420bfSArd Biesheuvel {
926324420bfSArd Biesheuvel 	/* only 4k granule supports level 1 block mappings */
927324420bfSArd Biesheuvel 	return IS_ENABLED(CONFIG_ARM64_4K_PAGES);
928324420bfSArd Biesheuvel }
929324420bfSArd Biesheuvel 
930324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void)
931324420bfSArd Biesheuvel {
932324420bfSArd Biesheuvel 	return 1;
933324420bfSArd Biesheuvel }
934324420bfSArd Biesheuvel 
93520a004e7SWill Deacon int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot)
936324420bfSArd Biesheuvel {
93719338304SKristina Martsenko 	pgprot_t sect_prot = __pgprot(PUD_TYPE_SECT |
93819338304SKristina Martsenko 					pgprot_val(mk_sect_prot(prot)));
93982034c23SLaura Abbott 	pud_t new_pud = pfn_pud(__phys_to_pfn(phys), sect_prot);
94015122ee2SWill Deacon 
94182034c23SLaura Abbott 	/* Only allow permission changes for now */
94282034c23SLaura Abbott 	if (!pgattr_change_is_safe(READ_ONCE(pud_val(*pudp)),
94382034c23SLaura Abbott 				   pud_val(new_pud)))
94415122ee2SWill Deacon 		return 0;
94515122ee2SWill Deacon 
946324420bfSArd Biesheuvel 	BUG_ON(phys & ~PUD_MASK);
94782034c23SLaura Abbott 	set_pud(pudp, new_pud);
948324420bfSArd Biesheuvel 	return 1;
949324420bfSArd Biesheuvel }
950324420bfSArd Biesheuvel 
95120a004e7SWill Deacon int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot)
952324420bfSArd Biesheuvel {
95319338304SKristina Martsenko 	pgprot_t sect_prot = __pgprot(PMD_TYPE_SECT |
95419338304SKristina Martsenko 					pgprot_val(mk_sect_prot(prot)));
95582034c23SLaura Abbott 	pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), sect_prot);
95615122ee2SWill Deacon 
95782034c23SLaura Abbott 	/* Only allow permission changes for now */
95882034c23SLaura Abbott 	if (!pgattr_change_is_safe(READ_ONCE(pmd_val(*pmdp)),
95982034c23SLaura Abbott 				   pmd_val(new_pmd)))
96015122ee2SWill Deacon 		return 0;
96115122ee2SWill Deacon 
962324420bfSArd Biesheuvel 	BUG_ON(phys & ~PMD_MASK);
96382034c23SLaura Abbott 	set_pmd(pmdp, new_pmd);
964324420bfSArd Biesheuvel 	return 1;
965324420bfSArd Biesheuvel }
966324420bfSArd Biesheuvel 
96720a004e7SWill Deacon int pud_clear_huge(pud_t *pudp)
968324420bfSArd Biesheuvel {
96920a004e7SWill Deacon 	if (!pud_sect(READ_ONCE(*pudp)))
970324420bfSArd Biesheuvel 		return 0;
97120a004e7SWill Deacon 	pud_clear(pudp);
972324420bfSArd Biesheuvel 	return 1;
973324420bfSArd Biesheuvel }
974324420bfSArd Biesheuvel 
97520a004e7SWill Deacon int pmd_clear_huge(pmd_t *pmdp)
976324420bfSArd Biesheuvel {
97720a004e7SWill Deacon 	if (!pmd_sect(READ_ONCE(*pmdp)))
978324420bfSArd Biesheuvel 		return 0;
97920a004e7SWill Deacon 	pmd_clear(pmdp);
980324420bfSArd Biesheuvel 	return 1;
981324420bfSArd Biesheuvel }
982b6bdb751SToshi Kani 
983ec28bb9cSChintan Pandya int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr)
984b6bdb751SToshi Kani {
985ec28bb9cSChintan Pandya 	pte_t *table;
986ec28bb9cSChintan Pandya 	pmd_t pmd;
987ec28bb9cSChintan Pandya 
988ec28bb9cSChintan Pandya 	pmd = READ_ONCE(*pmdp);
989ec28bb9cSChintan Pandya 
990ec28bb9cSChintan Pandya 	/* No-op for empty entry and WARN_ON for valid entry */
991ec28bb9cSChintan Pandya 	if (!pmd_present(pmd) || !pmd_table(pmd)) {
992ec28bb9cSChintan Pandya 		VM_WARN_ON(!pmd_table(pmd));
993ec28bb9cSChintan Pandya 		return 1;
994b6bdb751SToshi Kani 	}
995b6bdb751SToshi Kani 
996ec28bb9cSChintan Pandya 	table = pte_offset_kernel(pmdp, addr);
997ec28bb9cSChintan Pandya 	pmd_clear(pmdp);
998ec28bb9cSChintan Pandya 	__flush_tlb_kernel_pgtable(addr);
999ec28bb9cSChintan Pandya 	pte_free_kernel(NULL, table);
1000ec28bb9cSChintan Pandya 	return 1;
1001ec28bb9cSChintan Pandya }
1002ec28bb9cSChintan Pandya 
1003ec28bb9cSChintan Pandya int pud_free_pmd_page(pud_t *pudp, unsigned long addr)
1004b6bdb751SToshi Kani {
1005ec28bb9cSChintan Pandya 	pmd_t *table;
1006ec28bb9cSChintan Pandya 	pmd_t *pmdp;
1007ec28bb9cSChintan Pandya 	pud_t pud;
1008ec28bb9cSChintan Pandya 	unsigned long next, end;
1009ec28bb9cSChintan Pandya 
1010ec28bb9cSChintan Pandya 	pud = READ_ONCE(*pudp);
1011ec28bb9cSChintan Pandya 
1012ec28bb9cSChintan Pandya 	/* No-op for empty entry and WARN_ON for valid entry */
1013ec28bb9cSChintan Pandya 	if (!pud_present(pud) || !pud_table(pud)) {
1014ec28bb9cSChintan Pandya 		VM_WARN_ON(!pud_table(pud));
1015ec28bb9cSChintan Pandya 		return 1;
1016ec28bb9cSChintan Pandya 	}
1017ec28bb9cSChintan Pandya 
1018ec28bb9cSChintan Pandya 	table = pmd_offset(pudp, addr);
1019ec28bb9cSChintan Pandya 	pmdp = table;
1020ec28bb9cSChintan Pandya 	next = addr;
1021ec28bb9cSChintan Pandya 	end = addr + PUD_SIZE;
1022ec28bb9cSChintan Pandya 	do {
1023ec28bb9cSChintan Pandya 		pmd_free_pte_page(pmdp, next);
1024ec28bb9cSChintan Pandya 	} while (pmdp++, next += PMD_SIZE, next != end);
1025ec28bb9cSChintan Pandya 
1026ec28bb9cSChintan Pandya 	pud_clear(pudp);
1027ec28bb9cSChintan Pandya 	__flush_tlb_kernel_pgtable(addr);
1028ec28bb9cSChintan Pandya 	pmd_free(NULL, table);
1029ec28bb9cSChintan Pandya 	return 1;
1030b6bdb751SToshi Kani }
1031