1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 205a9e3e15SJisheng Zhang #include <linux/cache.h> 21c1cc1552SCatalin Marinas #include <linux/export.h> 22c1cc1552SCatalin Marinas #include <linux/kernel.h> 23c1cc1552SCatalin Marinas #include <linux/errno.h> 24c1cc1552SCatalin Marinas #include <linux/init.h> 2561bd93ceSArd Biesheuvel #include <linux/libfdt.h> 26c1cc1552SCatalin Marinas #include <linux/mman.h> 27c1cc1552SCatalin Marinas #include <linux/nodemask.h> 28c1cc1552SCatalin Marinas #include <linux/memblock.h> 29c1cc1552SCatalin Marinas #include <linux/fs.h> 302475ff9dSCatalin Marinas #include <linux/io.h> 31c1cc1552SCatalin Marinas 3221ab99c2SMark Rutland #include <asm/barrier.h> 33c1cc1552SCatalin Marinas #include <asm/cputype.h> 34af86e597SLaura Abbott #include <asm/fixmap.h> 35068a17a5SMark Rutland #include <asm/kasan.h> 36b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 37c1cc1552SCatalin Marinas #include <asm/sections.h> 38c1cc1552SCatalin Marinas #include <asm/setup.h> 39c1cc1552SCatalin Marinas #include <asm/sizes.h> 40c1cc1552SCatalin Marinas #include <asm/tlb.h> 41c79b954bSJungseok Lee #include <asm/memblock.h> 42c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 43c1cc1552SCatalin Marinas 44dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 45dd006da2SArd Biesheuvel 465a9e3e15SJisheng Zhang u64 kimage_voffset __ro_after_init; 47a7f8de16SArd Biesheuvel EXPORT_SYMBOL(kimage_voffset); 48a7f8de16SArd Biesheuvel 49c1cc1552SCatalin Marinas /* 50c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 51c1cc1552SCatalin Marinas * and COW. 52c1cc1552SCatalin Marinas */ 535227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; 54c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 55c1cc1552SCatalin Marinas 56f9040773SArd Biesheuvel static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 57f9040773SArd Biesheuvel static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused; 58f9040773SArd Biesheuvel static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused; 59f9040773SArd Biesheuvel 60c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 61c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 62c1cc1552SCatalin Marinas { 63c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 64c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 65c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 66c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 67c1cc1552SCatalin Marinas return vma_prot; 68c1cc1552SCatalin Marinas } 69c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 70c1cc1552SCatalin Marinas 71f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void) 72c1cc1552SCatalin Marinas { 737142392dSSuzuki K. Poulose phys_addr_t phys; 747142392dSSuzuki K. Poulose void *ptr; 757142392dSSuzuki K. Poulose 7621ab99c2SMark Rutland phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 77f4710445SMark Rutland 78f4710445SMark Rutland /* 79f4710445SMark Rutland * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE 80f4710445SMark Rutland * slot will be free, so we can (ab)use the FIX_PTE slot to initialise 81f4710445SMark Rutland * any level of table. 82f4710445SMark Rutland */ 83f4710445SMark Rutland ptr = pte_set_fixmap(phys); 84f4710445SMark Rutland 8521ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 8621ab99c2SMark Rutland 87f4710445SMark Rutland /* 88f4710445SMark Rutland * Implicit barriers also ensure the zeroed page is visible to the page 89f4710445SMark Rutland * table walker 90f4710445SMark Rutland */ 91f4710445SMark Rutland pte_clear_fixmap(); 92f4710445SMark Rutland 93f4710445SMark Rutland return phys; 94c1cc1552SCatalin Marinas } 95c1cc1552SCatalin Marinas 96e98216b5SArd Biesheuvel static bool pgattr_change_is_safe(u64 old, u64 new) 97e98216b5SArd Biesheuvel { 98e98216b5SArd Biesheuvel /* 99e98216b5SArd Biesheuvel * The following mapping attributes may be updated in live 100e98216b5SArd Biesheuvel * kernel mappings without the need for break-before-make. 101e98216b5SArd Biesheuvel */ 102e98216b5SArd Biesheuvel static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE; 103e98216b5SArd Biesheuvel 104e98216b5SArd Biesheuvel return old == 0 || new == 0 || ((old ^ new) & ~mask) == 0; 105e98216b5SArd Biesheuvel } 106e98216b5SArd Biesheuvel 107da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 108667c2759SCatalin Marinas unsigned long end, unsigned long pfn, 109da141706SLaura Abbott pgprot_t prot, 1100bfc445dSArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 1110bfc445dSArd Biesheuvel bool page_mappings_only) 112c1cc1552SCatalin Marinas { 1130bfc445dSArd Biesheuvel pgprot_t __prot = prot; 114c1cc1552SCatalin Marinas pte_t *pte; 115c1cc1552SCatalin Marinas 1164133af6cSCatalin Marinas BUG_ON(pmd_sect(*pmd)); 1174133af6cSCatalin Marinas if (pmd_none(*pmd)) { 118132233a7SLaura Abbott phys_addr_t pte_phys; 119132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 120132233a7SLaura Abbott pte_phys = pgtable_alloc(); 121f4710445SMark Rutland pte = pte_set_fixmap(pte_phys); 122f4710445SMark Rutland __pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE); 123f4710445SMark Rutland pte_clear_fixmap(); 124c1cc1552SCatalin Marinas } 125a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 126c1cc1552SCatalin Marinas 127f4710445SMark Rutland pte = pte_set_fixmap_offset(pmd, addr); 128c1cc1552SCatalin Marinas do { 129e98216b5SArd Biesheuvel pte_t old_pte = *pte; 130e98216b5SArd Biesheuvel 1310bfc445dSArd Biesheuvel /* 1320bfc445dSArd Biesheuvel * Set the contiguous bit for the subsequent group of PTEs if 1330bfc445dSArd Biesheuvel * its size and alignment are appropriate. 1340bfc445dSArd Biesheuvel */ 1350bfc445dSArd Biesheuvel if (((addr | PFN_PHYS(pfn)) & ~CONT_PTE_MASK) == 0) { 1360bfc445dSArd Biesheuvel if (end - addr >= CONT_PTE_SIZE && !page_mappings_only) 1370bfc445dSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 1380bfc445dSArd Biesheuvel else 1390bfc445dSArd Biesheuvel __prot = prot; 1400bfc445dSArd Biesheuvel } 1410bfc445dSArd Biesheuvel 1420bfc445dSArd Biesheuvel set_pte(pte, pfn_pte(pfn, __prot)); 143667c2759SCatalin Marinas pfn++; 144e98216b5SArd Biesheuvel 145e98216b5SArd Biesheuvel /* 146e98216b5SArd Biesheuvel * After the PTE entry has been populated once, we 147e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 148e98216b5SArd Biesheuvel */ 149e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), pte_val(*pte))); 150e98216b5SArd Biesheuvel 151667c2759SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 152f4710445SMark Rutland 153f4710445SMark Rutland pte_clear_fixmap(); 154c1cc1552SCatalin Marinas } 155c1cc1552SCatalin Marinas 15611509a30SMark Rutland static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end, 157da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 15853e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 159f14c66ceSArd Biesheuvel bool page_mappings_only) 160c1cc1552SCatalin Marinas { 1610bfc445dSArd Biesheuvel pgprot_t __prot = prot; 162c1cc1552SCatalin Marinas pmd_t *pmd; 163c1cc1552SCatalin Marinas unsigned long next; 164c1cc1552SCatalin Marinas 165c1cc1552SCatalin Marinas /* 166c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 167c1cc1552SCatalin Marinas */ 1684133af6cSCatalin Marinas BUG_ON(pud_sect(*pud)); 1694133af6cSCatalin Marinas if (pud_none(*pud)) { 170132233a7SLaura Abbott phys_addr_t pmd_phys; 171132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 172132233a7SLaura Abbott pmd_phys = pgtable_alloc(); 173f4710445SMark Rutland pmd = pmd_set_fixmap(pmd_phys); 174f4710445SMark Rutland __pud_populate(pud, pmd_phys, PUD_TYPE_TABLE); 175f4710445SMark Rutland pmd_clear_fixmap(); 176c1cc1552SCatalin Marinas } 177a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 178c1cc1552SCatalin Marinas 179f4710445SMark Rutland pmd = pmd_set_fixmap_offset(pud, addr); 180c1cc1552SCatalin Marinas do { 181e98216b5SArd Biesheuvel pmd_t old_pmd = *pmd; 182e98216b5SArd Biesheuvel 183c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 184e98216b5SArd Biesheuvel 185c1cc1552SCatalin Marinas /* try section mapping first */ 18683863f25SLaura Abbott if (((addr | next | phys) & ~SECTION_MASK) == 0 && 187f14c66ceSArd Biesheuvel !page_mappings_only) { 1880bfc445dSArd Biesheuvel /* 1890bfc445dSArd Biesheuvel * Set the contiguous bit for the subsequent group of 1900bfc445dSArd Biesheuvel * PMDs if its size and alignment are appropriate. 1910bfc445dSArd Biesheuvel */ 1920bfc445dSArd Biesheuvel if (((addr | phys) & ~CONT_PMD_MASK) == 0) { 1930bfc445dSArd Biesheuvel if (end - addr >= CONT_PMD_SIZE) 1940bfc445dSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | 1950bfc445dSArd Biesheuvel PTE_CONT); 1960bfc445dSArd Biesheuvel else 1970bfc445dSArd Biesheuvel __prot = prot; 1980bfc445dSArd Biesheuvel } 1990bfc445dSArd Biesheuvel pmd_set_huge(pmd, phys, __prot); 200e98216b5SArd Biesheuvel 201a55f9929SCatalin Marinas /* 202e98216b5SArd Biesheuvel * After the PMD entry has been populated once, we 203e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 204a55f9929SCatalin Marinas */ 205e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd), 206e98216b5SArd Biesheuvel pmd_val(*pmd))); 207a55f9929SCatalin Marinas } else { 208667c2759SCatalin Marinas alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), 2090bfc445dSArd Biesheuvel prot, pgtable_alloc, 2100bfc445dSArd Biesheuvel page_mappings_only); 211e98216b5SArd Biesheuvel 212e98216b5SArd Biesheuvel BUG_ON(pmd_val(old_pmd) != 0 && 213e98216b5SArd Biesheuvel pmd_val(old_pmd) != pmd_val(*pmd)); 214a55f9929SCatalin Marinas } 215c1cc1552SCatalin Marinas phys += next - addr; 216c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 217f4710445SMark Rutland 218f4710445SMark Rutland pmd_clear_fixmap(); 219c1cc1552SCatalin Marinas } 220c1cc1552SCatalin Marinas 221da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 222da141706SLaura Abbott unsigned long phys) 223da141706SLaura Abbott { 224da141706SLaura Abbott if (PAGE_SHIFT != 12) 225da141706SLaura Abbott return false; 226da141706SLaura Abbott 227da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 228da141706SLaura Abbott return false; 229da141706SLaura Abbott 230da141706SLaura Abbott return true; 231da141706SLaura Abbott } 232da141706SLaura Abbott 23311509a30SMark Rutland static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 234da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 23553e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 236f14c66ceSArd Biesheuvel bool page_mappings_only) 237c1cc1552SCatalin Marinas { 238c79b954bSJungseok Lee pud_t *pud; 239c1cc1552SCatalin Marinas unsigned long next; 240c1cc1552SCatalin Marinas 241c79b954bSJungseok Lee if (pgd_none(*pgd)) { 242132233a7SLaura Abbott phys_addr_t pud_phys; 243132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 244132233a7SLaura Abbott pud_phys = pgtable_alloc(); 245f4710445SMark Rutland __pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE); 246c79b954bSJungseok Lee } 247c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 248c79b954bSJungseok Lee 249f4710445SMark Rutland pud = pud_set_fixmap_offset(pgd, addr); 250c1cc1552SCatalin Marinas do { 251e98216b5SArd Biesheuvel pud_t old_pud = *pud; 252e98216b5SArd Biesheuvel 253c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 254206a2a73SSteve Capper 255206a2a73SSteve Capper /* 256206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 257206a2a73SSteve Capper */ 258f14c66ceSArd Biesheuvel if (use_1G_block(addr, next, phys) && !page_mappings_only) { 259c661cb1cSMark Rutland pud_set_huge(pud, phys, prot); 260206a2a73SSteve Capper 261206a2a73SSteve Capper /* 262e98216b5SArd Biesheuvel * After the PUD entry has been populated once, we 263e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 264206a2a73SSteve Capper */ 265e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pud_val(old_pud), 266e98216b5SArd Biesheuvel pud_val(*pud))); 267206a2a73SSteve Capper } else { 26811509a30SMark Rutland alloc_init_pmd(pud, addr, next, phys, prot, 269f14c66ceSArd Biesheuvel pgtable_alloc, page_mappings_only); 270e98216b5SArd Biesheuvel 271e98216b5SArd Biesheuvel BUG_ON(pud_val(old_pud) != 0 && 272e98216b5SArd Biesheuvel pud_val(old_pud) != pud_val(*pud)); 273206a2a73SSteve Capper } 274c1cc1552SCatalin Marinas phys += next - addr; 275c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 276f4710445SMark Rutland 277f4710445SMark Rutland pud_clear_fixmap(); 278c1cc1552SCatalin Marinas } 279c1cc1552SCatalin Marinas 28040f87d31SArd Biesheuvel static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 28140f87d31SArd Biesheuvel unsigned long virt, phys_addr_t size, 28240f87d31SArd Biesheuvel pgprot_t prot, 28353e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 284f14c66ceSArd Biesheuvel bool page_mappings_only) 285c1cc1552SCatalin Marinas { 286c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 28740f87d31SArd Biesheuvel pgd_t *pgd = pgd_offset_raw(pgdir, virt); 288c1cc1552SCatalin Marinas 289cc5d2b3bSMark Rutland /* 290cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 291cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 292cc5d2b3bSMark Rutland */ 293cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 294cc5d2b3bSMark Rutland return; 295cc5d2b3bSMark Rutland 2969c4e08a3SMark Rutland phys &= PAGE_MASK; 297c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 298c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 299c1cc1552SCatalin Marinas 300c1cc1552SCatalin Marinas end = addr + length; 301c1cc1552SCatalin Marinas do { 302c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 30353e1b329SArd Biesheuvel alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc, 304f14c66ceSArd Biesheuvel page_mappings_only); 305c1cc1552SCatalin Marinas phys += next - addr; 306c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 307c1cc1552SCatalin Marinas } 308c1cc1552SCatalin Marinas 3091378dc3dSArd Biesheuvel static phys_addr_t pgd_pgtable_alloc(void) 310da141706SLaura Abbott { 31121ab99c2SMark Rutland void *ptr = (void *)__get_free_page(PGALLOC_GFP); 3121378dc3dSArd Biesheuvel if (!ptr || !pgtable_page_ctor(virt_to_page(ptr))) 3131378dc3dSArd Biesheuvel BUG(); 31421ab99c2SMark Rutland 31521ab99c2SMark Rutland /* Ensure the zeroed page is visible to the page table walker */ 31621ab99c2SMark Rutland dsb(ishst); 317f4710445SMark Rutland return __pa(ptr); 318da141706SLaura Abbott } 319da141706SLaura Abbott 320132233a7SLaura Abbott /* 321132233a7SLaura Abbott * This function can only be used to modify existing table entries, 322132233a7SLaura Abbott * without allocating new levels of table. Note that this permits the 323132233a7SLaura Abbott * creation of new section or page entries. 324132233a7SLaura Abbott */ 325132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, 326da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 327d7ecbddfSMark Salter { 328d7ecbddfSMark Salter if (virt < VMALLOC_START) { 329d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 330d7ecbddfSMark Salter &phys, virt); 331d7ecbddfSMark Salter return; 332d7ecbddfSMark Salter } 333f14c66ceSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, false); 334d7ecbddfSMark Salter } 335d7ecbddfSMark Salter 3368ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 3378ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 338f14c66ceSArd Biesheuvel pgprot_t prot, bool page_mappings_only) 3398ce837ceSArd Biesheuvel { 3401378dc3dSArd Biesheuvel BUG_ON(mm == &init_mm); 3411378dc3dSArd Biesheuvel 34211509a30SMark Rutland __create_pgd_mapping(mm->pgd, phys, virt, size, prot, 343f14c66ceSArd Biesheuvel pgd_pgtable_alloc, page_mappings_only); 344d7ecbddfSMark Salter } 345d7ecbddfSMark Salter 346da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 347da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 348da141706SLaura Abbott { 349da141706SLaura Abbott if (virt < VMALLOC_START) { 350da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 351da141706SLaura Abbott &phys, virt); 352da141706SLaura Abbott return; 353da141706SLaura Abbott } 354da141706SLaura Abbott 35511509a30SMark Rutland __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, 356f14c66ceSArd Biesheuvel NULL, debug_pagealloc_enabled()); 357da141706SLaura Abbott } 358da141706SLaura Abbott 359068a17a5SMark Rutland static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end) 360da141706SLaura Abbott { 3617eb90f2fSArd Biesheuvel unsigned long kernel_start = __pa(_text); 3629fdc14c5SArd Biesheuvel unsigned long kernel_end = __pa(__init_begin); 363068a17a5SMark Rutland 364da141706SLaura Abbott /* 365f9040773SArd Biesheuvel * Take care not to create a writable alias for the 366f9040773SArd Biesheuvel * read-only text and rodata sections of the kernel image. 367da141706SLaura Abbott */ 368da141706SLaura Abbott 3699fdc14c5SArd Biesheuvel /* No overlap with the kernel text/rodata */ 370068a17a5SMark Rutland if (end < kernel_start || start >= kernel_end) { 371068a17a5SMark Rutland __create_pgd_mapping(pgd, start, __phys_to_virt(start), 372068a17a5SMark Rutland end - start, PAGE_KERNEL, 37353e1b329SArd Biesheuvel early_pgtable_alloc, 374f14c66ceSArd Biesheuvel debug_pagealloc_enabled()); 375068a17a5SMark Rutland return; 376da141706SLaura Abbott } 377da141706SLaura Abbott 378068a17a5SMark Rutland /* 3799fdc14c5SArd Biesheuvel * This block overlaps the kernel text/rodata mappings. 380f9040773SArd Biesheuvel * Map the portion(s) which don't overlap. 381068a17a5SMark Rutland */ 382068a17a5SMark Rutland if (start < kernel_start) 383068a17a5SMark Rutland __create_pgd_mapping(pgd, start, 384068a17a5SMark Rutland __phys_to_virt(start), 385068a17a5SMark Rutland kernel_start - start, PAGE_KERNEL, 38653e1b329SArd Biesheuvel early_pgtable_alloc, 387f14c66ceSArd Biesheuvel debug_pagealloc_enabled()); 388068a17a5SMark Rutland if (kernel_end < end) 389068a17a5SMark Rutland __create_pgd_mapping(pgd, kernel_end, 390068a17a5SMark Rutland __phys_to_virt(kernel_end), 391068a17a5SMark Rutland end - kernel_end, PAGE_KERNEL, 39253e1b329SArd Biesheuvel early_pgtable_alloc, 393f14c66ceSArd Biesheuvel debug_pagealloc_enabled()); 394f9040773SArd Biesheuvel 395f9040773SArd Biesheuvel /* 3969fdc14c5SArd Biesheuvel * Map the linear alias of the [_text, __init_begin) interval as 397f9040773SArd Biesheuvel * read-only/non-executable. This makes the contents of the 398f9040773SArd Biesheuvel * region accessible to subsystems such as hibernate, but 399f9040773SArd Biesheuvel * protects it from inadvertent modification or execution. 400f9040773SArd Biesheuvel */ 401f9040773SArd Biesheuvel __create_pgd_mapping(pgd, kernel_start, __phys_to_virt(kernel_start), 402f9040773SArd Biesheuvel kernel_end - kernel_start, PAGE_KERNEL_RO, 403f14c66ceSArd Biesheuvel early_pgtable_alloc, debug_pagealloc_enabled()); 404da141706SLaura Abbott } 405da141706SLaura Abbott 406068a17a5SMark Rutland static void __init map_mem(pgd_t *pgd) 407c1cc1552SCatalin Marinas { 408c1cc1552SCatalin Marinas struct memblock_region *reg; 409f6bc87c3SSteve Capper 410c1cc1552SCatalin Marinas /* map all the memory banks */ 411c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 412c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 413c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 414c1cc1552SCatalin Marinas 415c1cc1552SCatalin Marinas if (start >= end) 416c1cc1552SCatalin Marinas break; 41768709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 41868709f45SArd Biesheuvel continue; 419c1cc1552SCatalin Marinas 420068a17a5SMark Rutland __map_memblock(pgd, start, end); 421c1cc1552SCatalin Marinas } 422c1cc1552SCatalin Marinas } 423c1cc1552SCatalin Marinas 424da141706SLaura Abbott void mark_rodata_ro(void) 425da141706SLaura Abbott { 4262f39b5f9SJeremy Linton unsigned long section_size; 427f9040773SArd Biesheuvel 4289fdc14c5SArd Biesheuvel section_size = (unsigned long)_etext - (unsigned long)_text; 4297eb90f2fSArd Biesheuvel create_mapping_late(__pa(_text), (unsigned long)_text, 4302f39b5f9SJeremy Linton section_size, PAGE_KERNEL_ROX); 4312f39b5f9SJeremy Linton /* 4329fdc14c5SArd Biesheuvel * mark .rodata as read only. Use __init_begin rather than __end_rodata 4339fdc14c5SArd Biesheuvel * to cover NOTES and EXCEPTION_TABLE. 4342f39b5f9SJeremy Linton */ 4359fdc14c5SArd Biesheuvel section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata; 4362f39b5f9SJeremy Linton create_mapping_late(__pa(__start_rodata), (unsigned long)__start_rodata, 4372f39b5f9SJeremy Linton section_size, PAGE_KERNEL_RO); 438e98216b5SArd Biesheuvel 439e98216b5SArd Biesheuvel /* flush the TLBs after updating live kernel mappings */ 440e98216b5SArd Biesheuvel flush_tlb_all(); 441da141706SLaura Abbott } 442da141706SLaura Abbott 4432c09ec06SArd Biesheuvel static void __init map_kernel_segment(pgd_t *pgd, void *va_start, void *va_end, 444f9040773SArd Biesheuvel pgprot_t prot, struct vm_struct *vma) 445068a17a5SMark Rutland { 446068a17a5SMark Rutland phys_addr_t pa_start = __pa(va_start); 447068a17a5SMark Rutland unsigned long size = va_end - va_start; 448068a17a5SMark Rutland 449068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(pa_start)); 450068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(size)); 451068a17a5SMark Rutland 452068a17a5SMark Rutland __create_pgd_mapping(pgd, pa_start, (unsigned long)va_start, size, prot, 453f14c66ceSArd Biesheuvel early_pgtable_alloc, debug_pagealloc_enabled()); 454f9040773SArd Biesheuvel 455f9040773SArd Biesheuvel vma->addr = va_start; 456f9040773SArd Biesheuvel vma->phys_addr = pa_start; 457f9040773SArd Biesheuvel vma->size = size; 458f9040773SArd Biesheuvel vma->flags = VM_MAP; 459f9040773SArd Biesheuvel vma->caller = __builtin_return_address(0); 460f9040773SArd Biesheuvel 461f9040773SArd Biesheuvel vm_area_add_early(vma); 462068a17a5SMark Rutland } 463068a17a5SMark Rutland 464068a17a5SMark Rutland /* 465068a17a5SMark Rutland * Create fine-grained mappings for the kernel. 466068a17a5SMark Rutland */ 467068a17a5SMark Rutland static void __init map_kernel(pgd_t *pgd) 468068a17a5SMark Rutland { 4692f39b5f9SJeremy Linton static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_init, vmlinux_data; 470068a17a5SMark Rutland 4719fdc14c5SArd Biesheuvel map_kernel_segment(pgd, _text, _etext, PAGE_KERNEL_EXEC, &vmlinux_text); 4729fdc14c5SArd Biesheuvel map_kernel_segment(pgd, __start_rodata, __init_begin, PAGE_KERNEL, &vmlinux_rodata); 4732c09ec06SArd Biesheuvel map_kernel_segment(pgd, __init_begin, __init_end, PAGE_KERNEL_EXEC, 474f9040773SArd Biesheuvel &vmlinux_init); 4752c09ec06SArd Biesheuvel map_kernel_segment(pgd, _data, _end, PAGE_KERNEL, &vmlinux_data); 476068a17a5SMark Rutland 477f9040773SArd Biesheuvel if (!pgd_val(*pgd_offset_raw(pgd, FIXADDR_START))) { 478068a17a5SMark Rutland /* 479f9040773SArd Biesheuvel * The fixmap falls in a separate pgd to the kernel, and doesn't 480f9040773SArd Biesheuvel * live in the carveout for the swapper_pg_dir. We can simply 481f9040773SArd Biesheuvel * re-use the existing dir for the fixmap. 482068a17a5SMark Rutland */ 483f9040773SArd Biesheuvel set_pgd(pgd_offset_raw(pgd, FIXADDR_START), 484f9040773SArd Biesheuvel *pgd_offset_k(FIXADDR_START)); 485f9040773SArd Biesheuvel } else if (CONFIG_PGTABLE_LEVELS > 3) { 486f9040773SArd Biesheuvel /* 487f9040773SArd Biesheuvel * The fixmap shares its top level pgd entry with the kernel 488f9040773SArd Biesheuvel * mapping. This can really only occur when we are running 489f9040773SArd Biesheuvel * with 16k/4 levels, so we can simply reuse the pud level 490f9040773SArd Biesheuvel * entry instead. 491f9040773SArd Biesheuvel */ 492f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 493f9040773SArd Biesheuvel set_pud(pud_set_fixmap_offset(pgd, FIXADDR_START), 494f9040773SArd Biesheuvel __pud(__pa(bm_pmd) | PUD_TYPE_TABLE)); 495f9040773SArd Biesheuvel pud_clear_fixmap(); 496f9040773SArd Biesheuvel } else { 497f9040773SArd Biesheuvel BUG(); 498f9040773SArd Biesheuvel } 499068a17a5SMark Rutland 500068a17a5SMark Rutland kasan_copy_shadow(pgd); 501068a17a5SMark Rutland } 502068a17a5SMark Rutland 503c1cc1552SCatalin Marinas /* 504c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 505c1cc1552SCatalin Marinas * maps and sets up the zero page. 506c1cc1552SCatalin Marinas */ 507c1cc1552SCatalin Marinas void __init paging_init(void) 508c1cc1552SCatalin Marinas { 509068a17a5SMark Rutland phys_addr_t pgd_phys = early_pgtable_alloc(); 510068a17a5SMark Rutland pgd_t *pgd = pgd_set_fixmap(pgd_phys); 511068a17a5SMark Rutland 512068a17a5SMark Rutland map_kernel(pgd); 513068a17a5SMark Rutland map_mem(pgd); 514068a17a5SMark Rutland 515068a17a5SMark Rutland /* 516068a17a5SMark Rutland * We want to reuse the original swapper_pg_dir so we don't have to 517068a17a5SMark Rutland * communicate the new address to non-coherent secondaries in 518068a17a5SMark Rutland * secondary_entry, and so cpu_switch_mm can generate the address with 519068a17a5SMark Rutland * adrp+add rather than a load from some global variable. 520068a17a5SMark Rutland * 521068a17a5SMark Rutland * To do this we need to go via a temporary pgd. 522068a17a5SMark Rutland */ 523068a17a5SMark Rutland cpu_replace_ttbr1(__va(pgd_phys)); 524068a17a5SMark Rutland memcpy(swapper_pg_dir, pgd, PAGE_SIZE); 525068a17a5SMark Rutland cpu_replace_ttbr1(swapper_pg_dir); 526068a17a5SMark Rutland 527068a17a5SMark Rutland pgd_clear_fixmap(); 528068a17a5SMark Rutland memblock_free(pgd_phys, PAGE_SIZE); 529068a17a5SMark Rutland 530068a17a5SMark Rutland /* 531068a17a5SMark Rutland * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd 532068a17a5SMark Rutland * allocated with it. 533068a17a5SMark Rutland */ 534068a17a5SMark Rutland memblock_free(__pa(swapper_pg_dir) + PAGE_SIZE, 535068a17a5SMark Rutland SWAPPER_DIR_SIZE - PAGE_SIZE); 536c1cc1552SCatalin Marinas } 537c1cc1552SCatalin Marinas 538c1cc1552SCatalin Marinas /* 539c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 540c1cc1552SCatalin Marinas */ 541c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 542c1cc1552SCatalin Marinas { 543c1cc1552SCatalin Marinas pgd_t *pgd; 544c1cc1552SCatalin Marinas pud_t *pud; 545c1cc1552SCatalin Marinas pmd_t *pmd; 546c1cc1552SCatalin Marinas pte_t *pte; 547c1cc1552SCatalin Marinas 548c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 549c1cc1552SCatalin Marinas return 0; 550c1cc1552SCatalin Marinas 551c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 552c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 553c1cc1552SCatalin Marinas return 0; 554c1cc1552SCatalin Marinas 555c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 556c1cc1552SCatalin Marinas if (pud_none(*pud)) 557c1cc1552SCatalin Marinas return 0; 558c1cc1552SCatalin Marinas 559206a2a73SSteve Capper if (pud_sect(*pud)) 560206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 561206a2a73SSteve Capper 562c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 563c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 564c1cc1552SCatalin Marinas return 0; 565c1cc1552SCatalin Marinas 566da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 567da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 568da6e4cb6SDave Anderson 569c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 570c1cc1552SCatalin Marinas if (pte_none(*pte)) 571c1cc1552SCatalin Marinas return 0; 572c1cc1552SCatalin Marinas 573c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 574c1cc1552SCatalin Marinas } 575c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 576b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 5770aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 578c1cc1552SCatalin Marinas { 5790aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 580c1cc1552SCatalin Marinas } 581b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 5820aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 583c1cc1552SCatalin Marinas { 5840aad818bSJohannes Weiner unsigned long addr = start; 585c1cc1552SCatalin Marinas unsigned long next; 586c1cc1552SCatalin Marinas pgd_t *pgd; 587c1cc1552SCatalin Marinas pud_t *pud; 588c1cc1552SCatalin Marinas pmd_t *pmd; 589c1cc1552SCatalin Marinas 590c1cc1552SCatalin Marinas do { 591c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 592c1cc1552SCatalin Marinas 593c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 594c1cc1552SCatalin Marinas if (!pgd) 595c1cc1552SCatalin Marinas return -ENOMEM; 596c1cc1552SCatalin Marinas 597c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 598c1cc1552SCatalin Marinas if (!pud) 599c1cc1552SCatalin Marinas return -ENOMEM; 600c1cc1552SCatalin Marinas 601c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 602c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 603c1cc1552SCatalin Marinas void *p = NULL; 604c1cc1552SCatalin Marinas 605c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 606c1cc1552SCatalin Marinas if (!p) 607c1cc1552SCatalin Marinas return -ENOMEM; 608c1cc1552SCatalin Marinas 609a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 610c1cc1552SCatalin Marinas } else 611c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 612c1cc1552SCatalin Marinas } while (addr = next, addr != end); 613c1cc1552SCatalin Marinas 614c1cc1552SCatalin Marinas return 0; 615c1cc1552SCatalin Marinas } 616c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 6170aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 6180197518cSTang Chen { 6190197518cSTang Chen } 620c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 621af86e597SLaura Abbott 622af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 623af86e597SLaura Abbott { 624af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 625af86e597SLaura Abbott 626af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 627af86e597SLaura Abbott 628157962f5SArd Biesheuvel return pud_offset_kimg(pgd, addr); 629af86e597SLaura Abbott } 630af86e597SLaura Abbott 631af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 632af86e597SLaura Abbott { 633af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 634af86e597SLaura Abbott 635af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 636af86e597SLaura Abbott 637157962f5SArd Biesheuvel return pmd_offset_kimg(pud, addr); 638af86e597SLaura Abbott } 639af86e597SLaura Abbott 640af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 641af86e597SLaura Abbott { 642157962f5SArd Biesheuvel return &bm_pte[pte_index(addr)]; 643af86e597SLaura Abbott } 644af86e597SLaura Abbott 645af86e597SLaura Abbott void __init early_fixmap_init(void) 646af86e597SLaura Abbott { 647af86e597SLaura Abbott pgd_t *pgd; 648af86e597SLaura Abbott pud_t *pud; 649af86e597SLaura Abbott pmd_t *pmd; 650af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 651af86e597SLaura Abbott 652af86e597SLaura Abbott pgd = pgd_offset_k(addr); 653f80fb3a3SArd Biesheuvel if (CONFIG_PGTABLE_LEVELS > 3 && 654f80fb3a3SArd Biesheuvel !(pgd_none(*pgd) || pgd_page_paddr(*pgd) == __pa(bm_pud))) { 655f9040773SArd Biesheuvel /* 656f9040773SArd Biesheuvel * We only end up here if the kernel mapping and the fixmap 657f9040773SArd Biesheuvel * share the top level pgd entry, which should only happen on 658f9040773SArd Biesheuvel * 16k/4 levels configurations. 659f9040773SArd Biesheuvel */ 660f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 661f9040773SArd Biesheuvel pud = pud_offset_kimg(pgd, addr); 662f9040773SArd Biesheuvel } else { 663af86e597SLaura Abbott pgd_populate(&init_mm, pgd, bm_pud); 664157962f5SArd Biesheuvel pud = fixmap_pud(addr); 665f9040773SArd Biesheuvel } 666af86e597SLaura Abbott pud_populate(&init_mm, pud, bm_pmd); 667157962f5SArd Biesheuvel pmd = fixmap_pmd(addr); 668af86e597SLaura Abbott pmd_populate_kernel(&init_mm, pmd, bm_pte); 669af86e597SLaura Abbott 670af86e597SLaura Abbott /* 671af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 672157962f5SArd Biesheuvel * we are not prepared: 673af86e597SLaura Abbott */ 674af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 675af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 676af86e597SLaura Abbott 677af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 678af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 679af86e597SLaura Abbott WARN_ON(1); 680af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 681af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 682af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 683af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 684af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 685af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 686af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 687af86e597SLaura Abbott 688af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 689af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 690af86e597SLaura Abbott } 691af86e597SLaura Abbott } 692af86e597SLaura Abbott 693af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 694af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 695af86e597SLaura Abbott { 696af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 697af86e597SLaura Abbott pte_t *pte; 698af86e597SLaura Abbott 699b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 700af86e597SLaura Abbott 701af86e597SLaura Abbott pte = fixmap_pte(addr); 702af86e597SLaura Abbott 703af86e597SLaura Abbott if (pgprot_val(flags)) { 704af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 705af86e597SLaura Abbott } else { 706af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 707af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 708af86e597SLaura Abbott } 709af86e597SLaura Abbott } 71061bd93ceSArd Biesheuvel 711f80fb3a3SArd Biesheuvel void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot) 71261bd93ceSArd Biesheuvel { 71361bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 714f80fb3a3SArd Biesheuvel int offset; 71561bd93ceSArd Biesheuvel void *dt_virt; 71661bd93ceSArd Biesheuvel 71761bd93ceSArd Biesheuvel /* 71861bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 71961bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 72004a84810SArd Biesheuvel * at least 8 bytes so that we can always access the magic and size 72104a84810SArd Biesheuvel * fields of the FDT header after mapping the first chunk, double check 72204a84810SArd Biesheuvel * here if that is indeed the case. 72361bd93ceSArd Biesheuvel */ 72461bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 72561bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 72661bd93ceSArd Biesheuvel return NULL; 72761bd93ceSArd Biesheuvel 72861bd93ceSArd Biesheuvel /* 72961bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 73061bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 731132233a7SLaura Abbott * to call create_mapping_noalloc() this early. 73261bd93ceSArd Biesheuvel * 73361bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 73461bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 73561bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 73661bd93ceSArd Biesheuvel * have to be in the same PUD. 73761bd93ceSArd Biesheuvel */ 73861bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 73961bd93ceSArd Biesheuvel 740b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 741b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 74261bd93ceSArd Biesheuvel 743b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 74461bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 74561bd93ceSArd Biesheuvel 74661bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 747132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), 748132233a7SLaura Abbott dt_virt_base, SWAPPER_BLOCK_SIZE, prot); 74961bd93ceSArd Biesheuvel 75004a84810SArd Biesheuvel if (fdt_magic(dt_virt) != FDT_MAGIC) 75161bd93ceSArd Biesheuvel return NULL; 75261bd93ceSArd Biesheuvel 753f80fb3a3SArd Biesheuvel *size = fdt_totalsize(dt_virt); 754f80fb3a3SArd Biesheuvel if (*size > MAX_FDT_SIZE) 75561bd93ceSArd Biesheuvel return NULL; 75661bd93ceSArd Biesheuvel 757f80fb3a3SArd Biesheuvel if (offset + *size > SWAPPER_BLOCK_SIZE) 758132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 759f80fb3a3SArd Biesheuvel round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot); 760f80fb3a3SArd Biesheuvel 761f80fb3a3SArd Biesheuvel return dt_virt; 762f80fb3a3SArd Biesheuvel } 763f80fb3a3SArd Biesheuvel 764f80fb3a3SArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 765f80fb3a3SArd Biesheuvel { 766f80fb3a3SArd Biesheuvel void *dt_virt; 767f80fb3a3SArd Biesheuvel int size; 768f80fb3a3SArd Biesheuvel 769f80fb3a3SArd Biesheuvel dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO); 770f80fb3a3SArd Biesheuvel if (!dt_virt) 771f80fb3a3SArd Biesheuvel return NULL; 77261bd93ceSArd Biesheuvel 77361bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 77461bd93ceSArd Biesheuvel return dt_virt; 77561bd93ceSArd Biesheuvel } 776324420bfSArd Biesheuvel 777324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void) 778324420bfSArd Biesheuvel { 779324420bfSArd Biesheuvel /* only 4k granule supports level 1 block mappings */ 780324420bfSArd Biesheuvel return IS_ENABLED(CONFIG_ARM64_4K_PAGES); 781324420bfSArd Biesheuvel } 782324420bfSArd Biesheuvel 783324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void) 784324420bfSArd Biesheuvel { 785324420bfSArd Biesheuvel return 1; 786324420bfSArd Biesheuvel } 787324420bfSArd Biesheuvel 788324420bfSArd Biesheuvel int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot) 789324420bfSArd Biesheuvel { 790324420bfSArd Biesheuvel BUG_ON(phys & ~PUD_MASK); 791324420bfSArd Biesheuvel set_pud(pud, __pud(phys | PUD_TYPE_SECT | pgprot_val(mk_sect_prot(prot)))); 792324420bfSArd Biesheuvel return 1; 793324420bfSArd Biesheuvel } 794324420bfSArd Biesheuvel 795324420bfSArd Biesheuvel int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot) 796324420bfSArd Biesheuvel { 797324420bfSArd Biesheuvel BUG_ON(phys & ~PMD_MASK); 798324420bfSArd Biesheuvel set_pmd(pmd, __pmd(phys | PMD_TYPE_SECT | pgprot_val(mk_sect_prot(prot)))); 799324420bfSArd Biesheuvel return 1; 800324420bfSArd Biesheuvel } 801324420bfSArd Biesheuvel 802324420bfSArd Biesheuvel int pud_clear_huge(pud_t *pud) 803324420bfSArd Biesheuvel { 804324420bfSArd Biesheuvel if (!pud_sect(*pud)) 805324420bfSArd Biesheuvel return 0; 806324420bfSArd Biesheuvel pud_clear(pud); 807324420bfSArd Biesheuvel return 1; 808324420bfSArd Biesheuvel } 809324420bfSArd Biesheuvel 810324420bfSArd Biesheuvel int pmd_clear_huge(pmd_t *pmd) 811324420bfSArd Biesheuvel { 812324420bfSArd Biesheuvel if (!pmd_sect(*pmd)) 813324420bfSArd Biesheuvel return 0; 814324420bfSArd Biesheuvel pmd_clear(pmd); 815324420bfSArd Biesheuvel return 1; 816324420bfSArd Biesheuvel } 817