1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Based on arch/arm/mm/fault.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright (C) 1995-2004 Russell King 7 * Copyright (C) 2012 ARM Ltd. 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/bitfield.h> 12 #include <linux/extable.h> 13 #include <linux/signal.h> 14 #include <linux/mm.h> 15 #include <linux/hardirq.h> 16 #include <linux/init.h> 17 #include <linux/kprobes.h> 18 #include <linux/uaccess.h> 19 #include <linux/page-flags.h> 20 #include <linux/sched/signal.h> 21 #include <linux/sched/debug.h> 22 #include <linux/highmem.h> 23 #include <linux/perf_event.h> 24 #include <linux/preempt.h> 25 #include <linux/hugetlb.h> 26 27 #include <asm/acpi.h> 28 #include <asm/bug.h> 29 #include <asm/cmpxchg.h> 30 #include <asm/cpufeature.h> 31 #include <asm/exception.h> 32 #include <asm/daifflags.h> 33 #include <asm/debug-monitors.h> 34 #include <asm/esr.h> 35 #include <asm/kprobes.h> 36 #include <asm/processor.h> 37 #include <asm/sysreg.h> 38 #include <asm/system_misc.h> 39 #include <asm/pgtable.h> 40 #include <asm/tlbflush.h> 41 #include <asm/traps.h> 42 43 struct fault_info { 44 int (*fn)(unsigned long addr, unsigned int esr, 45 struct pt_regs *regs); 46 int sig; 47 int code; 48 const char *name; 49 }; 50 51 static const struct fault_info fault_info[]; 52 static struct fault_info debug_fault_info[]; 53 54 static inline const struct fault_info *esr_to_fault_info(unsigned int esr) 55 { 56 return fault_info + (esr & ESR_ELx_FSC); 57 } 58 59 static inline const struct fault_info *esr_to_debug_fault_info(unsigned int esr) 60 { 61 return debug_fault_info + DBG_ESR_EVT(esr); 62 } 63 64 static void data_abort_decode(unsigned int esr) 65 { 66 pr_alert("Data abort info:\n"); 67 68 if (esr & ESR_ELx_ISV) { 69 pr_alert(" Access size = %u byte(s)\n", 70 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT)); 71 pr_alert(" SSE = %lu, SRT = %lu\n", 72 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT, 73 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT); 74 pr_alert(" SF = %lu, AR = %lu\n", 75 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT, 76 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT); 77 } else { 78 pr_alert(" ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK); 79 } 80 81 pr_alert(" CM = %lu, WnR = %lu\n", 82 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT, 83 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT); 84 } 85 86 static void mem_abort_decode(unsigned int esr) 87 { 88 pr_alert("Mem abort info:\n"); 89 90 pr_alert(" ESR = 0x%08x\n", esr); 91 pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n", 92 ESR_ELx_EC(esr), esr_get_class_string(esr), 93 (esr & ESR_ELx_IL) ? 32 : 16); 94 pr_alert(" SET = %lu, FnV = %lu\n", 95 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT, 96 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT); 97 pr_alert(" EA = %lu, S1PTW = %lu\n", 98 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT, 99 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT); 100 101 if (esr_is_data_abort(esr)) 102 data_abort_decode(esr); 103 } 104 105 static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm) 106 { 107 /* Either init_pg_dir or swapper_pg_dir */ 108 if (mm == &init_mm) 109 return __pa_symbol(mm->pgd); 110 111 return (unsigned long)virt_to_phys(mm->pgd); 112 } 113 114 /* 115 * Dump out the page tables associated with 'addr' in the currently active mm. 116 */ 117 static void show_pte(unsigned long addr) 118 { 119 struct mm_struct *mm; 120 pgd_t *pgdp; 121 pgd_t pgd; 122 123 if (is_ttbr0_addr(addr)) { 124 /* TTBR0 */ 125 mm = current->active_mm; 126 if (mm == &init_mm) { 127 pr_alert("[%016lx] user address but active_mm is swapper\n", 128 addr); 129 return; 130 } 131 } else if (is_ttbr1_addr(addr)) { 132 /* TTBR1 */ 133 mm = &init_mm; 134 } else { 135 pr_alert("[%016lx] address between user and kernel address ranges\n", 136 addr); 137 return; 138 } 139 140 pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n", 141 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K, 142 vabits_actual, mm_to_pgd_phys(mm)); 143 pgdp = pgd_offset(mm, addr); 144 pgd = READ_ONCE(*pgdp); 145 pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd)); 146 147 do { 148 pud_t *pudp, pud; 149 pmd_t *pmdp, pmd; 150 pte_t *ptep, pte; 151 152 if (pgd_none(pgd) || pgd_bad(pgd)) 153 break; 154 155 pudp = pud_offset(pgdp, addr); 156 pud = READ_ONCE(*pudp); 157 pr_cont(", pud=%016llx", pud_val(pud)); 158 if (pud_none(pud) || pud_bad(pud)) 159 break; 160 161 pmdp = pmd_offset(pudp, addr); 162 pmd = READ_ONCE(*pmdp); 163 pr_cont(", pmd=%016llx", pmd_val(pmd)); 164 if (pmd_none(pmd) || pmd_bad(pmd)) 165 break; 166 167 ptep = pte_offset_map(pmdp, addr); 168 pte = READ_ONCE(*ptep); 169 pr_cont(", pte=%016llx", pte_val(pte)); 170 pte_unmap(ptep); 171 } while(0); 172 173 pr_cont("\n"); 174 } 175 176 /* 177 * This function sets the access flags (dirty, accessed), as well as write 178 * permission, and only to a more permissive setting. 179 * 180 * It needs to cope with hardware update of the accessed/dirty state by other 181 * agents in the system and can safely skip the __sync_icache_dcache() call as, 182 * like set_pte_at(), the PTE is never changed from no-exec to exec here. 183 * 184 * Returns whether or not the PTE actually changed. 185 */ 186 int ptep_set_access_flags(struct vm_area_struct *vma, 187 unsigned long address, pte_t *ptep, 188 pte_t entry, int dirty) 189 { 190 pteval_t old_pteval, pteval; 191 pte_t pte = READ_ONCE(*ptep); 192 193 if (pte_same(pte, entry)) 194 return 0; 195 196 /* only preserve the access flags and write permission */ 197 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY; 198 199 /* 200 * Setting the flags must be done atomically to avoid racing with the 201 * hardware update of the access/dirty state. The PTE_RDONLY bit must 202 * be set to the most permissive (lowest value) of *ptep and entry 203 * (calculated as: a & b == ~(~a | ~b)). 204 */ 205 pte_val(entry) ^= PTE_RDONLY; 206 pteval = pte_val(pte); 207 do { 208 old_pteval = pteval; 209 pteval ^= PTE_RDONLY; 210 pteval |= pte_val(entry); 211 pteval ^= PTE_RDONLY; 212 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval); 213 } while (pteval != old_pteval); 214 215 flush_tlb_fix_spurious_fault(vma, address); 216 return 1; 217 } 218 219 static bool is_el1_instruction_abort(unsigned int esr) 220 { 221 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR; 222 } 223 224 static inline bool is_el1_permission_fault(unsigned long addr, unsigned int esr, 225 struct pt_regs *regs) 226 { 227 unsigned int ec = ESR_ELx_EC(esr); 228 unsigned int fsc_type = esr & ESR_ELx_FSC_TYPE; 229 230 if (ec != ESR_ELx_EC_DABT_CUR && ec != ESR_ELx_EC_IABT_CUR) 231 return false; 232 233 if (fsc_type == ESR_ELx_FSC_PERM) 234 return true; 235 236 if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan()) 237 return fsc_type == ESR_ELx_FSC_FAULT && 238 (regs->pstate & PSR_PAN_BIT); 239 240 return false; 241 } 242 243 static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr, 244 unsigned int esr, 245 struct pt_regs *regs) 246 { 247 unsigned long flags; 248 u64 par, dfsc; 249 250 if (ESR_ELx_EC(esr) != ESR_ELx_EC_DABT_CUR || 251 (esr & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT) 252 return false; 253 254 local_irq_save(flags); 255 asm volatile("at s1e1r, %0" :: "r" (addr)); 256 isb(); 257 par = read_sysreg(par_el1); 258 local_irq_restore(flags); 259 260 /* 261 * If we now have a valid translation, treat the translation fault as 262 * spurious. 263 */ 264 if (!(par & SYS_PAR_EL1_F)) 265 return true; 266 267 /* 268 * If we got a different type of fault from the AT instruction, 269 * treat the translation fault as spurious. 270 */ 271 dfsc = FIELD_GET(SYS_PAR_EL1_FST, par); 272 return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT; 273 } 274 275 static void die_kernel_fault(const char *msg, unsigned long addr, 276 unsigned int esr, struct pt_regs *regs) 277 { 278 bust_spinlocks(1); 279 280 pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg, 281 addr); 282 283 mem_abort_decode(esr); 284 285 show_pte(addr); 286 die("Oops", regs, esr); 287 bust_spinlocks(0); 288 do_exit(SIGKILL); 289 } 290 291 static void __do_kernel_fault(unsigned long addr, unsigned int esr, 292 struct pt_regs *regs) 293 { 294 const char *msg; 295 296 /* 297 * Are we prepared to handle this kernel fault? 298 * We are almost certainly not prepared to handle instruction faults. 299 */ 300 if (!is_el1_instruction_abort(esr) && fixup_exception(regs)) 301 return; 302 303 if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs), 304 "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr)) 305 return; 306 307 if (is_el1_permission_fault(addr, esr, regs)) { 308 if (esr & ESR_ELx_WNR) 309 msg = "write to read-only memory"; 310 else if (is_el1_instruction_abort(esr)) 311 msg = "execute from non-executable memory"; 312 else 313 msg = "read from unreadable memory"; 314 } else if (addr < PAGE_SIZE) { 315 msg = "NULL pointer dereference"; 316 } else { 317 msg = "paging request"; 318 } 319 320 die_kernel_fault(msg, addr, esr, regs); 321 } 322 323 static void set_thread_esr(unsigned long address, unsigned int esr) 324 { 325 current->thread.fault_address = address; 326 327 /* 328 * If the faulting address is in the kernel, we must sanitize the ESR. 329 * From userspace's point of view, kernel-only mappings don't exist 330 * at all, so we report them as level 0 translation faults. 331 * (This is not quite the way that "no mapping there at all" behaves: 332 * an alignment fault not caused by the memory type would take 333 * precedence over translation fault for a real access to empty 334 * space. Unfortunately we can't easily distinguish "alignment fault 335 * not caused by memory type" from "alignment fault caused by memory 336 * type", so we ignore this wrinkle and just return the translation 337 * fault.) 338 */ 339 if (!is_ttbr0_addr(current->thread.fault_address)) { 340 switch (ESR_ELx_EC(esr)) { 341 case ESR_ELx_EC_DABT_LOW: 342 /* 343 * These bits provide only information about the 344 * faulting instruction, which userspace knows already. 345 * We explicitly clear bits which are architecturally 346 * RES0 in case they are given meanings in future. 347 * We always report the ESR as if the fault was taken 348 * to EL1 and so ISV and the bits in ISS[23:14] are 349 * clear. (In fact it always will be a fault to EL1.) 350 */ 351 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL | 352 ESR_ELx_CM | ESR_ELx_WNR; 353 esr |= ESR_ELx_FSC_FAULT; 354 break; 355 case ESR_ELx_EC_IABT_LOW: 356 /* 357 * Claim a level 0 translation fault. 358 * All other bits are architecturally RES0 for faults 359 * reported with that DFSC value, so we clear them. 360 */ 361 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL; 362 esr |= ESR_ELx_FSC_FAULT; 363 break; 364 default: 365 /* 366 * This should never happen (entry.S only brings us 367 * into this code for insn and data aborts from a lower 368 * exception level). Fail safe by not providing an ESR 369 * context record at all. 370 */ 371 WARN(1, "ESR 0x%x is not DABT or IABT from EL0\n", esr); 372 esr = 0; 373 break; 374 } 375 } 376 377 current->thread.fault_code = esr; 378 } 379 380 static void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *regs) 381 { 382 /* 383 * If we are in kernel mode at this point, we have no context to 384 * handle this fault with. 385 */ 386 if (user_mode(regs)) { 387 const struct fault_info *inf = esr_to_fault_info(esr); 388 389 set_thread_esr(addr, esr); 390 arm64_force_sig_fault(inf->sig, inf->code, (void __user *)addr, 391 inf->name); 392 } else { 393 __do_kernel_fault(addr, esr, regs); 394 } 395 } 396 397 #define VM_FAULT_BADMAP 0x010000 398 #define VM_FAULT_BADACCESS 0x020000 399 400 static vm_fault_t __do_page_fault(struct mm_struct *mm, unsigned long addr, 401 unsigned int mm_flags, unsigned long vm_flags) 402 { 403 struct vm_area_struct *vma = find_vma(mm, addr); 404 405 if (unlikely(!vma)) 406 return VM_FAULT_BADMAP; 407 408 /* 409 * Ok, we have a good vm_area for this memory access, so we can handle 410 * it. 411 */ 412 if (unlikely(vma->vm_start > addr)) { 413 if (!(vma->vm_flags & VM_GROWSDOWN)) 414 return VM_FAULT_BADMAP; 415 if (expand_stack(vma, addr)) 416 return VM_FAULT_BADMAP; 417 } 418 419 /* 420 * Check that the permissions on the VMA allow for the fault which 421 * occurred. 422 */ 423 if (!(vma->vm_flags & vm_flags)) 424 return VM_FAULT_BADACCESS; 425 return handle_mm_fault(vma, addr & PAGE_MASK, mm_flags); 426 } 427 428 static bool is_el0_instruction_abort(unsigned int esr) 429 { 430 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW; 431 } 432 433 /* 434 * Note: not valid for EL1 DC IVAC, but we never use that such that it 435 * should fault. EL0 cannot issue DC IVAC (undef). 436 */ 437 static bool is_write_abort(unsigned int esr) 438 { 439 return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM); 440 } 441 442 static int __kprobes do_page_fault(unsigned long addr, unsigned int esr, 443 struct pt_regs *regs) 444 { 445 const struct fault_info *inf; 446 struct mm_struct *mm = current->mm; 447 vm_fault_t fault, major = 0; 448 unsigned long vm_flags = VM_READ | VM_WRITE | VM_EXEC; 449 unsigned int mm_flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE; 450 451 if (kprobe_page_fault(regs, esr)) 452 return 0; 453 454 /* 455 * If we're in an interrupt or have no user context, we must not take 456 * the fault. 457 */ 458 if (faulthandler_disabled() || !mm) 459 goto no_context; 460 461 if (user_mode(regs)) 462 mm_flags |= FAULT_FLAG_USER; 463 464 if (is_el0_instruction_abort(esr)) { 465 vm_flags = VM_EXEC; 466 mm_flags |= FAULT_FLAG_INSTRUCTION; 467 } else if (is_write_abort(esr)) { 468 vm_flags = VM_WRITE; 469 mm_flags |= FAULT_FLAG_WRITE; 470 } 471 472 if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) { 473 /* regs->orig_addr_limit may be 0 if we entered from EL0 */ 474 if (regs->orig_addr_limit == KERNEL_DS) 475 die_kernel_fault("access to user memory with fs=KERNEL_DS", 476 addr, esr, regs); 477 478 if (is_el1_instruction_abort(esr)) 479 die_kernel_fault("execution of user memory", 480 addr, esr, regs); 481 482 if (!search_exception_tables(regs->pc)) 483 die_kernel_fault("access to user memory outside uaccess routines", 484 addr, esr, regs); 485 } 486 487 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); 488 489 /* 490 * As per x86, we may deadlock here. However, since the kernel only 491 * validly references user space from well defined areas of the code, 492 * we can bug out early if this is from code which shouldn't. 493 */ 494 if (!down_read_trylock(&mm->mmap_sem)) { 495 if (!user_mode(regs) && !search_exception_tables(regs->pc)) 496 goto no_context; 497 retry: 498 down_read(&mm->mmap_sem); 499 } else { 500 /* 501 * The above down_read_trylock() might have succeeded in which 502 * case, we'll have missed the might_sleep() from down_read(). 503 */ 504 might_sleep(); 505 #ifdef CONFIG_DEBUG_VM 506 if (!user_mode(regs) && !search_exception_tables(regs->pc)) { 507 up_read(&mm->mmap_sem); 508 goto no_context; 509 } 510 #endif 511 } 512 513 fault = __do_page_fault(mm, addr, mm_flags, vm_flags); 514 major |= fault & VM_FAULT_MAJOR; 515 516 if (fault & VM_FAULT_RETRY) { 517 /* 518 * If we need to retry but a fatal signal is pending, 519 * handle the signal first. We do not need to release 520 * the mmap_sem because it would already be released 521 * in __lock_page_or_retry in mm/filemap.c. 522 */ 523 if (fatal_signal_pending(current)) { 524 if (!user_mode(regs)) 525 goto no_context; 526 return 0; 527 } 528 529 /* 530 * Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk of 531 * starvation. 532 */ 533 if (mm_flags & FAULT_FLAG_ALLOW_RETRY) { 534 mm_flags &= ~FAULT_FLAG_ALLOW_RETRY; 535 mm_flags |= FAULT_FLAG_TRIED; 536 goto retry; 537 } 538 } 539 up_read(&mm->mmap_sem); 540 541 /* 542 * Handle the "normal" (no error) case first. 543 */ 544 if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP | 545 VM_FAULT_BADACCESS)))) { 546 /* 547 * Major/minor page fault accounting is only done 548 * once. If we go through a retry, it is extremely 549 * likely that the page will be found in page cache at 550 * that point. 551 */ 552 if (major) { 553 current->maj_flt++; 554 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, 555 addr); 556 } else { 557 current->min_flt++; 558 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, 559 addr); 560 } 561 562 return 0; 563 } 564 565 /* 566 * If we are in kernel mode at this point, we have no context to 567 * handle this fault with. 568 */ 569 if (!user_mode(regs)) 570 goto no_context; 571 572 if (fault & VM_FAULT_OOM) { 573 /* 574 * We ran out of memory, call the OOM killer, and return to 575 * userspace (which will retry the fault, or kill us if we got 576 * oom-killed). 577 */ 578 pagefault_out_of_memory(); 579 return 0; 580 } 581 582 inf = esr_to_fault_info(esr); 583 set_thread_esr(addr, esr); 584 if (fault & VM_FAULT_SIGBUS) { 585 /* 586 * We had some memory, but were unable to successfully fix up 587 * this page fault. 588 */ 589 arm64_force_sig_fault(SIGBUS, BUS_ADRERR, (void __user *)addr, 590 inf->name); 591 } else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) { 592 unsigned int lsb; 593 594 lsb = PAGE_SHIFT; 595 if (fault & VM_FAULT_HWPOISON_LARGE) 596 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault)); 597 598 arm64_force_sig_mceerr(BUS_MCEERR_AR, (void __user *)addr, lsb, 599 inf->name); 600 } else { 601 /* 602 * Something tried to access memory that isn't in our memory 603 * map. 604 */ 605 arm64_force_sig_fault(SIGSEGV, 606 fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR, 607 (void __user *)addr, 608 inf->name); 609 } 610 611 return 0; 612 613 no_context: 614 __do_kernel_fault(addr, esr, regs); 615 return 0; 616 } 617 618 static int __kprobes do_translation_fault(unsigned long addr, 619 unsigned int esr, 620 struct pt_regs *regs) 621 { 622 if (is_ttbr0_addr(addr)) 623 return do_page_fault(addr, esr, regs); 624 625 do_bad_area(addr, esr, regs); 626 return 0; 627 } 628 629 static int do_alignment_fault(unsigned long addr, unsigned int esr, 630 struct pt_regs *regs) 631 { 632 do_bad_area(addr, esr, regs); 633 return 0; 634 } 635 636 static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs) 637 { 638 return 1; /* "fault" */ 639 } 640 641 static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs) 642 { 643 const struct fault_info *inf; 644 void __user *siaddr; 645 646 inf = esr_to_fault_info(esr); 647 648 /* 649 * Return value ignored as we rely on signal merging. 650 * Future patches will make this more robust. 651 */ 652 apei_claim_sea(regs); 653 654 if (esr & ESR_ELx_FnV) 655 siaddr = NULL; 656 else 657 siaddr = (void __user *)addr; 658 arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr); 659 660 return 0; 661 } 662 663 static const struct fault_info fault_info[] = { 664 { do_bad, SIGKILL, SI_KERNEL, "ttbr address size fault" }, 665 { do_bad, SIGKILL, SI_KERNEL, "level 1 address size fault" }, 666 { do_bad, SIGKILL, SI_KERNEL, "level 2 address size fault" }, 667 { do_bad, SIGKILL, SI_KERNEL, "level 3 address size fault" }, 668 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" }, 669 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" }, 670 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" }, 671 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" }, 672 { do_bad, SIGKILL, SI_KERNEL, "unknown 8" }, 673 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" }, 674 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" }, 675 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" }, 676 { do_bad, SIGKILL, SI_KERNEL, "unknown 12" }, 677 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" }, 678 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" }, 679 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" }, 680 { do_sea, SIGBUS, BUS_OBJERR, "synchronous external abort" }, 681 { do_bad, SIGKILL, SI_KERNEL, "unknown 17" }, 682 { do_bad, SIGKILL, SI_KERNEL, "unknown 18" }, 683 { do_bad, SIGKILL, SI_KERNEL, "unknown 19" }, 684 { do_sea, SIGKILL, SI_KERNEL, "level 0 (translation table walk)" }, 685 { do_sea, SIGKILL, SI_KERNEL, "level 1 (translation table walk)" }, 686 { do_sea, SIGKILL, SI_KERNEL, "level 2 (translation table walk)" }, 687 { do_sea, SIGKILL, SI_KERNEL, "level 3 (translation table walk)" }, 688 { do_sea, SIGBUS, BUS_OBJERR, "synchronous parity or ECC error" }, // Reserved when RAS is implemented 689 { do_bad, SIGKILL, SI_KERNEL, "unknown 25" }, 690 { do_bad, SIGKILL, SI_KERNEL, "unknown 26" }, 691 { do_bad, SIGKILL, SI_KERNEL, "unknown 27" }, 692 { do_sea, SIGKILL, SI_KERNEL, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 693 { do_sea, SIGKILL, SI_KERNEL, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 694 { do_sea, SIGKILL, SI_KERNEL, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 695 { do_sea, SIGKILL, SI_KERNEL, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 696 { do_bad, SIGKILL, SI_KERNEL, "unknown 32" }, 697 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" }, 698 { do_bad, SIGKILL, SI_KERNEL, "unknown 34" }, 699 { do_bad, SIGKILL, SI_KERNEL, "unknown 35" }, 700 { do_bad, SIGKILL, SI_KERNEL, "unknown 36" }, 701 { do_bad, SIGKILL, SI_KERNEL, "unknown 37" }, 702 { do_bad, SIGKILL, SI_KERNEL, "unknown 38" }, 703 { do_bad, SIGKILL, SI_KERNEL, "unknown 39" }, 704 { do_bad, SIGKILL, SI_KERNEL, "unknown 40" }, 705 { do_bad, SIGKILL, SI_KERNEL, "unknown 41" }, 706 { do_bad, SIGKILL, SI_KERNEL, "unknown 42" }, 707 { do_bad, SIGKILL, SI_KERNEL, "unknown 43" }, 708 { do_bad, SIGKILL, SI_KERNEL, "unknown 44" }, 709 { do_bad, SIGKILL, SI_KERNEL, "unknown 45" }, 710 { do_bad, SIGKILL, SI_KERNEL, "unknown 46" }, 711 { do_bad, SIGKILL, SI_KERNEL, "unknown 47" }, 712 { do_bad, SIGKILL, SI_KERNEL, "TLB conflict abort" }, 713 { do_bad, SIGKILL, SI_KERNEL, "Unsupported atomic hardware update fault" }, 714 { do_bad, SIGKILL, SI_KERNEL, "unknown 50" }, 715 { do_bad, SIGKILL, SI_KERNEL, "unknown 51" }, 716 { do_bad, SIGKILL, SI_KERNEL, "implementation fault (lockdown abort)" }, 717 { do_bad, SIGBUS, BUS_OBJERR, "implementation fault (unsupported exclusive)" }, 718 { do_bad, SIGKILL, SI_KERNEL, "unknown 54" }, 719 { do_bad, SIGKILL, SI_KERNEL, "unknown 55" }, 720 { do_bad, SIGKILL, SI_KERNEL, "unknown 56" }, 721 { do_bad, SIGKILL, SI_KERNEL, "unknown 57" }, 722 { do_bad, SIGKILL, SI_KERNEL, "unknown 58" }, 723 { do_bad, SIGKILL, SI_KERNEL, "unknown 59" }, 724 { do_bad, SIGKILL, SI_KERNEL, "unknown 60" }, 725 { do_bad, SIGKILL, SI_KERNEL, "section domain fault" }, 726 { do_bad, SIGKILL, SI_KERNEL, "page domain fault" }, 727 { do_bad, SIGKILL, SI_KERNEL, "unknown 63" }, 728 }; 729 730 void do_mem_abort(unsigned long addr, unsigned int esr, struct pt_regs *regs) 731 { 732 const struct fault_info *inf = esr_to_fault_info(esr); 733 734 if (!inf->fn(addr, esr, regs)) 735 return; 736 737 if (!user_mode(regs)) { 738 pr_alert("Unhandled fault at 0x%016lx\n", addr); 739 mem_abort_decode(esr); 740 show_pte(addr); 741 } 742 743 arm64_notify_die(inf->name, regs, 744 inf->sig, inf->code, (void __user *)addr, esr); 745 } 746 NOKPROBE_SYMBOL(do_mem_abort); 747 748 void do_el0_irq_bp_hardening(void) 749 { 750 /* PC has already been checked in entry.S */ 751 arm64_apply_bp_hardening(); 752 } 753 NOKPROBE_SYMBOL(do_el0_irq_bp_hardening); 754 755 void do_sp_pc_abort(unsigned long addr, unsigned int esr, struct pt_regs *regs) 756 { 757 arm64_notify_die("SP/PC alignment exception", regs, 758 SIGBUS, BUS_ADRALN, (void __user *)addr, esr); 759 } 760 NOKPROBE_SYMBOL(do_sp_pc_abort); 761 762 int __init early_brk64(unsigned long addr, unsigned int esr, 763 struct pt_regs *regs); 764 765 /* 766 * __refdata because early_brk64 is __init, but the reference to it is 767 * clobbered at arch_initcall time. 768 * See traps.c and debug-monitors.c:debug_traps_init(). 769 */ 770 static struct fault_info __refdata debug_fault_info[] = { 771 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" }, 772 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" }, 773 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" }, 774 { do_bad, SIGKILL, SI_KERNEL, "unknown 3" }, 775 { do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" }, 776 { do_bad, SIGKILL, SI_KERNEL, "aarch32 vector catch" }, 777 { early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" }, 778 { do_bad, SIGKILL, SI_KERNEL, "unknown 7" }, 779 }; 780 781 void __init hook_debug_fault_code(int nr, 782 int (*fn)(unsigned long, unsigned int, struct pt_regs *), 783 int sig, int code, const char *name) 784 { 785 BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info)); 786 787 debug_fault_info[nr].fn = fn; 788 debug_fault_info[nr].sig = sig; 789 debug_fault_info[nr].code = code; 790 debug_fault_info[nr].name = name; 791 } 792 793 /* 794 * In debug exception context, we explicitly disable preemption despite 795 * having interrupts disabled. 796 * This serves two purposes: it makes it much less likely that we would 797 * accidentally schedule in exception context and it will force a warning 798 * if we somehow manage to schedule by accident. 799 */ 800 static void debug_exception_enter(struct pt_regs *regs) 801 { 802 /* 803 * Tell lockdep we disabled irqs in entry.S. Do nothing if they were 804 * already disabled to preserve the last enabled/disabled addresses. 805 */ 806 if (interrupts_enabled(regs)) 807 trace_hardirqs_off(); 808 809 if (user_mode(regs)) { 810 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 811 } else { 812 /* 813 * We might have interrupted pretty much anything. In 814 * fact, if we're a debug exception, we can even interrupt 815 * NMI processing. We don't want this code makes in_nmi() 816 * to return true, but we need to notify RCU. 817 */ 818 rcu_nmi_enter(); 819 } 820 821 preempt_disable(); 822 823 /* This code is a bit fragile. Test it. */ 824 RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work"); 825 } 826 NOKPROBE_SYMBOL(debug_exception_enter); 827 828 static void debug_exception_exit(struct pt_regs *regs) 829 { 830 preempt_enable_no_resched(); 831 832 if (!user_mode(regs)) 833 rcu_nmi_exit(); 834 835 if (interrupts_enabled(regs)) 836 trace_hardirqs_on(); 837 } 838 NOKPROBE_SYMBOL(debug_exception_exit); 839 840 #ifdef CONFIG_ARM64_ERRATUM_1463225 841 DECLARE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa); 842 843 static int cortex_a76_erratum_1463225_debug_handler(struct pt_regs *regs) 844 { 845 if (user_mode(regs)) 846 return 0; 847 848 if (!__this_cpu_read(__in_cortex_a76_erratum_1463225_wa)) 849 return 0; 850 851 /* 852 * We've taken a dummy step exception from the kernel to ensure 853 * that interrupts are re-enabled on the syscall path. Return back 854 * to cortex_a76_erratum_1463225_svc_handler() with debug exceptions 855 * masked so that we can safely restore the mdscr and get on with 856 * handling the syscall. 857 */ 858 regs->pstate |= PSR_D_BIT; 859 return 1; 860 } 861 #else 862 static int cortex_a76_erratum_1463225_debug_handler(struct pt_regs *regs) 863 { 864 return 0; 865 } 866 #endif /* CONFIG_ARM64_ERRATUM_1463225 */ 867 NOKPROBE_SYMBOL(cortex_a76_erratum_1463225_debug_handler); 868 869 void do_debug_exception(unsigned long addr_if_watchpoint, unsigned int esr, 870 struct pt_regs *regs) 871 { 872 const struct fault_info *inf = esr_to_debug_fault_info(esr); 873 unsigned long pc = instruction_pointer(regs); 874 875 if (cortex_a76_erratum_1463225_debug_handler(regs)) 876 return; 877 878 debug_exception_enter(regs); 879 880 if (user_mode(regs) && !is_ttbr0_addr(pc)) 881 arm64_apply_bp_hardening(); 882 883 if (inf->fn(addr_if_watchpoint, esr, regs)) { 884 arm64_notify_die(inf->name, regs, 885 inf->sig, inf->code, (void __user *)pc, esr); 886 } 887 888 debug_exception_exit(regs); 889 } 890 NOKPROBE_SYMBOL(do_debug_exception); 891