1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Based on arch/arm/mm/fault.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright (C) 1995-2004 Russell King 7 * Copyright (C) 2012 ARM Ltd. 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/bitfield.h> 12 #include <linux/extable.h> 13 #include <linux/kfence.h> 14 #include <linux/signal.h> 15 #include <linux/mm.h> 16 #include <linux/hardirq.h> 17 #include <linux/init.h> 18 #include <linux/kasan.h> 19 #include <linux/kprobes.h> 20 #include <linux/uaccess.h> 21 #include <linux/page-flags.h> 22 #include <linux/sched/signal.h> 23 #include <linux/sched/debug.h> 24 #include <linux/highmem.h> 25 #include <linux/perf_event.h> 26 #include <linux/preempt.h> 27 #include <linux/hugetlb.h> 28 29 #include <asm/acpi.h> 30 #include <asm/bug.h> 31 #include <asm/cmpxchg.h> 32 #include <asm/cpufeature.h> 33 #include <asm/efi.h> 34 #include <asm/exception.h> 35 #include <asm/daifflags.h> 36 #include <asm/debug-monitors.h> 37 #include <asm/esr.h> 38 #include <asm/kprobes.h> 39 #include <asm/mte.h> 40 #include <asm/processor.h> 41 #include <asm/sysreg.h> 42 #include <asm/system_misc.h> 43 #include <asm/tlbflush.h> 44 #include <asm/traps.h> 45 46 struct fault_info { 47 int (*fn)(unsigned long far, unsigned long esr, 48 struct pt_regs *regs); 49 int sig; 50 int code; 51 const char *name; 52 }; 53 54 static const struct fault_info fault_info[]; 55 static struct fault_info debug_fault_info[]; 56 57 static inline const struct fault_info *esr_to_fault_info(unsigned long esr) 58 { 59 return fault_info + (esr & ESR_ELx_FSC); 60 } 61 62 static inline const struct fault_info *esr_to_debug_fault_info(unsigned long esr) 63 { 64 return debug_fault_info + DBG_ESR_EVT(esr); 65 } 66 67 static void data_abort_decode(unsigned long esr) 68 { 69 pr_alert("Data abort info:\n"); 70 71 if (esr & ESR_ELx_ISV) { 72 pr_alert(" Access size = %u byte(s)\n", 73 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT)); 74 pr_alert(" SSE = %lu, SRT = %lu\n", 75 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT, 76 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT); 77 pr_alert(" SF = %lu, AR = %lu\n", 78 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT, 79 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT); 80 } else { 81 pr_alert(" ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK); 82 } 83 84 pr_alert(" CM = %lu, WnR = %lu\n", 85 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT, 86 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT); 87 } 88 89 static void mem_abort_decode(unsigned long esr) 90 { 91 pr_alert("Mem abort info:\n"); 92 93 pr_alert(" ESR = 0x%016lx\n", esr); 94 pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n", 95 ESR_ELx_EC(esr), esr_get_class_string(esr), 96 (esr & ESR_ELx_IL) ? 32 : 16); 97 pr_alert(" SET = %lu, FnV = %lu\n", 98 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT, 99 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT); 100 pr_alert(" EA = %lu, S1PTW = %lu\n", 101 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT, 102 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT); 103 pr_alert(" FSC = 0x%02lx: %s\n", (esr & ESR_ELx_FSC), 104 esr_to_fault_info(esr)->name); 105 106 if (esr_is_data_abort(esr)) 107 data_abort_decode(esr); 108 } 109 110 static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm) 111 { 112 /* Either init_pg_dir or swapper_pg_dir */ 113 if (mm == &init_mm) 114 return __pa_symbol(mm->pgd); 115 116 return (unsigned long)virt_to_phys(mm->pgd); 117 } 118 119 /* 120 * Dump out the page tables associated with 'addr' in the currently active mm. 121 */ 122 static void show_pte(unsigned long addr) 123 { 124 struct mm_struct *mm; 125 pgd_t *pgdp; 126 pgd_t pgd; 127 128 if (is_ttbr0_addr(addr)) { 129 /* TTBR0 */ 130 mm = current->active_mm; 131 if (mm == &init_mm) { 132 pr_alert("[%016lx] user address but active_mm is swapper\n", 133 addr); 134 return; 135 } 136 } else if (is_ttbr1_addr(addr)) { 137 /* TTBR1 */ 138 mm = &init_mm; 139 } else { 140 pr_alert("[%016lx] address between user and kernel address ranges\n", 141 addr); 142 return; 143 } 144 145 pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n", 146 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K, 147 vabits_actual, mm_to_pgd_phys(mm)); 148 pgdp = pgd_offset(mm, addr); 149 pgd = READ_ONCE(*pgdp); 150 pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd)); 151 152 do { 153 p4d_t *p4dp, p4d; 154 pud_t *pudp, pud; 155 pmd_t *pmdp, pmd; 156 pte_t *ptep, pte; 157 158 if (pgd_none(pgd) || pgd_bad(pgd)) 159 break; 160 161 p4dp = p4d_offset(pgdp, addr); 162 p4d = READ_ONCE(*p4dp); 163 pr_cont(", p4d=%016llx", p4d_val(p4d)); 164 if (p4d_none(p4d) || p4d_bad(p4d)) 165 break; 166 167 pudp = pud_offset(p4dp, addr); 168 pud = READ_ONCE(*pudp); 169 pr_cont(", pud=%016llx", pud_val(pud)); 170 if (pud_none(pud) || pud_bad(pud)) 171 break; 172 173 pmdp = pmd_offset(pudp, addr); 174 pmd = READ_ONCE(*pmdp); 175 pr_cont(", pmd=%016llx", pmd_val(pmd)); 176 if (pmd_none(pmd) || pmd_bad(pmd)) 177 break; 178 179 ptep = pte_offset_map(pmdp, addr); 180 if (!ptep) 181 break; 182 183 pte = READ_ONCE(*ptep); 184 pr_cont(", pte=%016llx", pte_val(pte)); 185 pte_unmap(ptep); 186 } while(0); 187 188 pr_cont("\n"); 189 } 190 191 /* 192 * This function sets the access flags (dirty, accessed), as well as write 193 * permission, and only to a more permissive setting. 194 * 195 * It needs to cope with hardware update of the accessed/dirty state by other 196 * agents in the system and can safely skip the __sync_icache_dcache() call as, 197 * like set_pte_at(), the PTE is never changed from no-exec to exec here. 198 * 199 * Returns whether or not the PTE actually changed. 200 */ 201 int ptep_set_access_flags(struct vm_area_struct *vma, 202 unsigned long address, pte_t *ptep, 203 pte_t entry, int dirty) 204 { 205 pteval_t old_pteval, pteval; 206 pte_t pte = READ_ONCE(*ptep); 207 208 if (pte_same(pte, entry)) 209 return 0; 210 211 /* only preserve the access flags and write permission */ 212 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY; 213 214 /* 215 * Setting the flags must be done atomically to avoid racing with the 216 * hardware update of the access/dirty state. The PTE_RDONLY bit must 217 * be set to the most permissive (lowest value) of *ptep and entry 218 * (calculated as: a & b == ~(~a | ~b)). 219 */ 220 pte_val(entry) ^= PTE_RDONLY; 221 pteval = pte_val(pte); 222 do { 223 old_pteval = pteval; 224 pteval ^= PTE_RDONLY; 225 pteval |= pte_val(entry); 226 pteval ^= PTE_RDONLY; 227 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval); 228 } while (pteval != old_pteval); 229 230 /* Invalidate a stale read-only entry */ 231 if (dirty) 232 flush_tlb_page(vma, address); 233 return 1; 234 } 235 236 static bool is_el1_instruction_abort(unsigned long esr) 237 { 238 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR; 239 } 240 241 static bool is_el1_data_abort(unsigned long esr) 242 { 243 return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_CUR; 244 } 245 246 static inline bool is_el1_permission_fault(unsigned long addr, unsigned long esr, 247 struct pt_regs *regs) 248 { 249 unsigned long fsc_type = esr & ESR_ELx_FSC_TYPE; 250 251 if (!is_el1_data_abort(esr) && !is_el1_instruction_abort(esr)) 252 return false; 253 254 if (fsc_type == ESR_ELx_FSC_PERM) 255 return true; 256 257 if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan()) 258 return fsc_type == ESR_ELx_FSC_FAULT && 259 (regs->pstate & PSR_PAN_BIT); 260 261 return false; 262 } 263 264 static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr, 265 unsigned long esr, 266 struct pt_regs *regs) 267 { 268 unsigned long flags; 269 u64 par, dfsc; 270 271 if (!is_el1_data_abort(esr) || 272 (esr & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT) 273 return false; 274 275 local_irq_save(flags); 276 asm volatile("at s1e1r, %0" :: "r" (addr)); 277 isb(); 278 par = read_sysreg_par(); 279 local_irq_restore(flags); 280 281 /* 282 * If we now have a valid translation, treat the translation fault as 283 * spurious. 284 */ 285 if (!(par & SYS_PAR_EL1_F)) 286 return true; 287 288 /* 289 * If we got a different type of fault from the AT instruction, 290 * treat the translation fault as spurious. 291 */ 292 dfsc = FIELD_GET(SYS_PAR_EL1_FST, par); 293 return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT; 294 } 295 296 static void die_kernel_fault(const char *msg, unsigned long addr, 297 unsigned long esr, struct pt_regs *regs) 298 { 299 bust_spinlocks(1); 300 301 pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg, 302 addr); 303 304 kasan_non_canonical_hook(addr); 305 306 mem_abort_decode(esr); 307 308 show_pte(addr); 309 die("Oops", regs, esr); 310 bust_spinlocks(0); 311 make_task_dead(SIGKILL); 312 } 313 314 #ifdef CONFIG_KASAN_HW_TAGS 315 static void report_tag_fault(unsigned long addr, unsigned long esr, 316 struct pt_regs *regs) 317 { 318 /* 319 * SAS bits aren't set for all faults reported in EL1, so we can't 320 * find out access size. 321 */ 322 bool is_write = !!(esr & ESR_ELx_WNR); 323 kasan_report((void *)addr, 0, is_write, regs->pc); 324 } 325 #else 326 /* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */ 327 static inline void report_tag_fault(unsigned long addr, unsigned long esr, 328 struct pt_regs *regs) { } 329 #endif 330 331 static void do_tag_recovery(unsigned long addr, unsigned long esr, 332 struct pt_regs *regs) 333 { 334 335 report_tag_fault(addr, esr, regs); 336 337 /* 338 * Disable MTE Tag Checking on the local CPU for the current EL. 339 * It will be done lazily on the other CPUs when they will hit a 340 * tag fault. 341 */ 342 sysreg_clear_set(sctlr_el1, SCTLR_EL1_TCF_MASK, 343 SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF, NONE)); 344 isb(); 345 } 346 347 static bool is_el1_mte_sync_tag_check_fault(unsigned long esr) 348 { 349 unsigned long fsc = esr & ESR_ELx_FSC; 350 351 if (!is_el1_data_abort(esr)) 352 return false; 353 354 if (fsc == ESR_ELx_FSC_MTE) 355 return true; 356 357 return false; 358 } 359 360 static bool is_translation_fault(unsigned long esr) 361 { 362 return (esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_FAULT; 363 } 364 365 static void __do_kernel_fault(unsigned long addr, unsigned long esr, 366 struct pt_regs *regs) 367 { 368 const char *msg; 369 370 /* 371 * Are we prepared to handle this kernel fault? 372 * We are almost certainly not prepared to handle instruction faults. 373 */ 374 if (!is_el1_instruction_abort(esr) && fixup_exception(regs)) 375 return; 376 377 if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs), 378 "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr)) 379 return; 380 381 if (is_el1_mte_sync_tag_check_fault(esr)) { 382 do_tag_recovery(addr, esr, regs); 383 384 return; 385 } 386 387 if (is_el1_permission_fault(addr, esr, regs)) { 388 if (esr & ESR_ELx_WNR) 389 msg = "write to read-only memory"; 390 else if (is_el1_instruction_abort(esr)) 391 msg = "execute from non-executable memory"; 392 else 393 msg = "read from unreadable memory"; 394 } else if (addr < PAGE_SIZE) { 395 msg = "NULL pointer dereference"; 396 } else { 397 if (is_translation_fault(esr) && 398 kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs)) 399 return; 400 401 msg = "paging request"; 402 } 403 404 if (efi_runtime_fixup_exception(regs, msg)) 405 return; 406 407 die_kernel_fault(msg, addr, esr, regs); 408 } 409 410 static void set_thread_esr(unsigned long address, unsigned long esr) 411 { 412 current->thread.fault_address = address; 413 414 /* 415 * If the faulting address is in the kernel, we must sanitize the ESR. 416 * From userspace's point of view, kernel-only mappings don't exist 417 * at all, so we report them as level 0 translation faults. 418 * (This is not quite the way that "no mapping there at all" behaves: 419 * an alignment fault not caused by the memory type would take 420 * precedence over translation fault for a real access to empty 421 * space. Unfortunately we can't easily distinguish "alignment fault 422 * not caused by memory type" from "alignment fault caused by memory 423 * type", so we ignore this wrinkle and just return the translation 424 * fault.) 425 */ 426 if (!is_ttbr0_addr(current->thread.fault_address)) { 427 switch (ESR_ELx_EC(esr)) { 428 case ESR_ELx_EC_DABT_LOW: 429 /* 430 * These bits provide only information about the 431 * faulting instruction, which userspace knows already. 432 * We explicitly clear bits which are architecturally 433 * RES0 in case they are given meanings in future. 434 * We always report the ESR as if the fault was taken 435 * to EL1 and so ISV and the bits in ISS[23:14] are 436 * clear. (In fact it always will be a fault to EL1.) 437 */ 438 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL | 439 ESR_ELx_CM | ESR_ELx_WNR; 440 esr |= ESR_ELx_FSC_FAULT; 441 break; 442 case ESR_ELx_EC_IABT_LOW: 443 /* 444 * Claim a level 0 translation fault. 445 * All other bits are architecturally RES0 for faults 446 * reported with that DFSC value, so we clear them. 447 */ 448 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL; 449 esr |= ESR_ELx_FSC_FAULT; 450 break; 451 default: 452 /* 453 * This should never happen (entry.S only brings us 454 * into this code for insn and data aborts from a lower 455 * exception level). Fail safe by not providing an ESR 456 * context record at all. 457 */ 458 WARN(1, "ESR 0x%lx is not DABT or IABT from EL0\n", esr); 459 esr = 0; 460 break; 461 } 462 } 463 464 current->thread.fault_code = esr; 465 } 466 467 static void do_bad_area(unsigned long far, unsigned long esr, 468 struct pt_regs *regs) 469 { 470 unsigned long addr = untagged_addr(far); 471 472 /* 473 * If we are in kernel mode at this point, we have no context to 474 * handle this fault with. 475 */ 476 if (user_mode(regs)) { 477 const struct fault_info *inf = esr_to_fault_info(esr); 478 479 set_thread_esr(addr, esr); 480 arm64_force_sig_fault(inf->sig, inf->code, far, inf->name); 481 } else { 482 __do_kernel_fault(addr, esr, regs); 483 } 484 } 485 486 #define VM_FAULT_BADMAP ((__force vm_fault_t)0x010000) 487 #define VM_FAULT_BADACCESS ((__force vm_fault_t)0x020000) 488 489 static vm_fault_t __do_page_fault(struct mm_struct *mm, unsigned long addr, 490 unsigned int mm_flags, unsigned long vm_flags, 491 struct pt_regs *regs) 492 { 493 struct vm_area_struct *vma = find_vma(mm, addr); 494 495 if (unlikely(!vma)) 496 return VM_FAULT_BADMAP; 497 498 /* 499 * Ok, we have a good vm_area for this memory access, so we can handle 500 * it. 501 */ 502 if (unlikely(vma->vm_start > addr)) { 503 if (!(vma->vm_flags & VM_GROWSDOWN)) 504 return VM_FAULT_BADMAP; 505 if (expand_stack(vma, addr)) 506 return VM_FAULT_BADMAP; 507 } 508 509 /* 510 * Check that the permissions on the VMA allow for the fault which 511 * occurred. 512 */ 513 if (!(vma->vm_flags & vm_flags)) 514 return VM_FAULT_BADACCESS; 515 return handle_mm_fault(vma, addr, mm_flags, regs); 516 } 517 518 static bool is_el0_instruction_abort(unsigned long esr) 519 { 520 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW; 521 } 522 523 /* 524 * Note: not valid for EL1 DC IVAC, but we never use that such that it 525 * should fault. EL0 cannot issue DC IVAC (undef). 526 */ 527 static bool is_write_abort(unsigned long esr) 528 { 529 return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM); 530 } 531 532 static int __kprobes do_page_fault(unsigned long far, unsigned long esr, 533 struct pt_regs *regs) 534 { 535 const struct fault_info *inf; 536 struct mm_struct *mm = current->mm; 537 vm_fault_t fault; 538 unsigned long vm_flags; 539 unsigned int mm_flags = FAULT_FLAG_DEFAULT; 540 unsigned long addr = untagged_addr(far); 541 #ifdef CONFIG_PER_VMA_LOCK 542 struct vm_area_struct *vma; 543 #endif 544 545 if (kprobe_page_fault(regs, esr)) 546 return 0; 547 548 /* 549 * If we're in an interrupt or have no user context, we must not take 550 * the fault. 551 */ 552 if (faulthandler_disabled() || !mm) 553 goto no_context; 554 555 if (user_mode(regs)) 556 mm_flags |= FAULT_FLAG_USER; 557 558 /* 559 * vm_flags tells us what bits we must have in vma->vm_flags 560 * for the fault to be benign, __do_page_fault() would check 561 * vma->vm_flags & vm_flags and returns an error if the 562 * intersection is empty 563 */ 564 if (is_el0_instruction_abort(esr)) { 565 /* It was exec fault */ 566 vm_flags = VM_EXEC; 567 mm_flags |= FAULT_FLAG_INSTRUCTION; 568 } else if (is_write_abort(esr)) { 569 /* It was write fault */ 570 vm_flags = VM_WRITE; 571 mm_flags |= FAULT_FLAG_WRITE; 572 } else { 573 /* It was read fault */ 574 vm_flags = VM_READ; 575 /* Write implies read */ 576 vm_flags |= VM_WRITE; 577 /* If EPAN is absent then exec implies read */ 578 if (!cpus_have_const_cap(ARM64_HAS_EPAN)) 579 vm_flags |= VM_EXEC; 580 } 581 582 if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) { 583 if (is_el1_instruction_abort(esr)) 584 die_kernel_fault("execution of user memory", 585 addr, esr, regs); 586 587 if (!search_exception_tables(regs->pc)) 588 die_kernel_fault("access to user memory outside uaccess routines", 589 addr, esr, regs); 590 } 591 592 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); 593 594 #ifdef CONFIG_PER_VMA_LOCK 595 if (!(mm_flags & FAULT_FLAG_USER)) 596 goto lock_mmap; 597 598 vma = lock_vma_under_rcu(mm, addr); 599 if (!vma) 600 goto lock_mmap; 601 602 if (!(vma->vm_flags & vm_flags)) { 603 vma_end_read(vma); 604 goto lock_mmap; 605 } 606 fault = handle_mm_fault(vma, addr & PAGE_MASK, 607 mm_flags | FAULT_FLAG_VMA_LOCK, regs); 608 vma_end_read(vma); 609 610 if (!(fault & VM_FAULT_RETRY)) { 611 count_vm_vma_lock_event(VMA_LOCK_SUCCESS); 612 goto done; 613 } 614 count_vm_vma_lock_event(VMA_LOCK_RETRY); 615 616 /* Quick path to respond to signals */ 617 if (fault_signal_pending(fault, regs)) { 618 if (!user_mode(regs)) 619 goto no_context; 620 return 0; 621 } 622 lock_mmap: 623 #endif /* CONFIG_PER_VMA_LOCK */ 624 /* 625 * As per x86, we may deadlock here. However, since the kernel only 626 * validly references user space from well defined areas of the code, 627 * we can bug out early if this is from code which shouldn't. 628 */ 629 if (!mmap_read_trylock(mm)) { 630 if (!user_mode(regs) && !search_exception_tables(regs->pc)) 631 goto no_context; 632 retry: 633 mmap_read_lock(mm); 634 } else { 635 /* 636 * The above mmap_read_trylock() might have succeeded in which 637 * case, we'll have missed the might_sleep() from down_read(). 638 */ 639 might_sleep(); 640 #ifdef CONFIG_DEBUG_VM 641 if (!user_mode(regs) && !search_exception_tables(regs->pc)) { 642 mmap_read_unlock(mm); 643 goto no_context; 644 } 645 #endif 646 } 647 648 fault = __do_page_fault(mm, addr, mm_flags, vm_flags, regs); 649 650 /* Quick path to respond to signals */ 651 if (fault_signal_pending(fault, regs)) { 652 if (!user_mode(regs)) 653 goto no_context; 654 return 0; 655 } 656 657 /* The fault is fully completed (including releasing mmap lock) */ 658 if (fault & VM_FAULT_COMPLETED) 659 return 0; 660 661 if (fault & VM_FAULT_RETRY) { 662 mm_flags |= FAULT_FLAG_TRIED; 663 goto retry; 664 } 665 mmap_read_unlock(mm); 666 667 #ifdef CONFIG_PER_VMA_LOCK 668 done: 669 #endif 670 /* 671 * Handle the "normal" (no error) case first. 672 */ 673 if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP | 674 VM_FAULT_BADACCESS)))) 675 return 0; 676 677 /* 678 * If we are in kernel mode at this point, we have no context to 679 * handle this fault with. 680 */ 681 if (!user_mode(regs)) 682 goto no_context; 683 684 if (fault & VM_FAULT_OOM) { 685 /* 686 * We ran out of memory, call the OOM killer, and return to 687 * userspace (which will retry the fault, or kill us if we got 688 * oom-killed). 689 */ 690 pagefault_out_of_memory(); 691 return 0; 692 } 693 694 inf = esr_to_fault_info(esr); 695 set_thread_esr(addr, esr); 696 if (fault & VM_FAULT_SIGBUS) { 697 /* 698 * We had some memory, but were unable to successfully fix up 699 * this page fault. 700 */ 701 arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name); 702 } else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) { 703 unsigned int lsb; 704 705 lsb = PAGE_SHIFT; 706 if (fault & VM_FAULT_HWPOISON_LARGE) 707 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault)); 708 709 arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name); 710 } else { 711 /* 712 * Something tried to access memory that isn't in our memory 713 * map. 714 */ 715 arm64_force_sig_fault(SIGSEGV, 716 fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR, 717 far, inf->name); 718 } 719 720 return 0; 721 722 no_context: 723 __do_kernel_fault(addr, esr, regs); 724 return 0; 725 } 726 727 static int __kprobes do_translation_fault(unsigned long far, 728 unsigned long esr, 729 struct pt_regs *regs) 730 { 731 unsigned long addr = untagged_addr(far); 732 733 if (is_ttbr0_addr(addr)) 734 return do_page_fault(far, esr, regs); 735 736 do_bad_area(far, esr, regs); 737 return 0; 738 } 739 740 static int do_alignment_fault(unsigned long far, unsigned long esr, 741 struct pt_regs *regs) 742 { 743 if (IS_ENABLED(CONFIG_COMPAT_ALIGNMENT_FIXUPS) && 744 compat_user_mode(regs)) 745 return do_compat_alignment_fixup(far, regs); 746 do_bad_area(far, esr, regs); 747 return 0; 748 } 749 750 static int do_bad(unsigned long far, unsigned long esr, struct pt_regs *regs) 751 { 752 return 1; /* "fault" */ 753 } 754 755 static int do_sea(unsigned long far, unsigned long esr, struct pt_regs *regs) 756 { 757 const struct fault_info *inf; 758 unsigned long siaddr; 759 760 inf = esr_to_fault_info(esr); 761 762 if (user_mode(regs) && apei_claim_sea(regs) == 0) { 763 /* 764 * APEI claimed this as a firmware-first notification. 765 * Some processing deferred to task_work before ret_to_user(). 766 */ 767 return 0; 768 } 769 770 if (esr & ESR_ELx_FnV) { 771 siaddr = 0; 772 } else { 773 /* 774 * The architecture specifies that the tag bits of FAR_EL1 are 775 * UNKNOWN for synchronous external aborts. Mask them out now 776 * so that userspace doesn't see them. 777 */ 778 siaddr = untagged_addr(far); 779 } 780 arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr); 781 782 return 0; 783 } 784 785 static int do_tag_check_fault(unsigned long far, unsigned long esr, 786 struct pt_regs *regs) 787 { 788 /* 789 * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN 790 * for tag check faults. Set them to corresponding bits in the untagged 791 * address. 792 */ 793 far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK); 794 do_bad_area(far, esr, regs); 795 return 0; 796 } 797 798 static const struct fault_info fault_info[] = { 799 { do_bad, SIGKILL, SI_KERNEL, "ttbr address size fault" }, 800 { do_bad, SIGKILL, SI_KERNEL, "level 1 address size fault" }, 801 { do_bad, SIGKILL, SI_KERNEL, "level 2 address size fault" }, 802 { do_bad, SIGKILL, SI_KERNEL, "level 3 address size fault" }, 803 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" }, 804 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" }, 805 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" }, 806 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" }, 807 { do_bad, SIGKILL, SI_KERNEL, "unknown 8" }, 808 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" }, 809 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" }, 810 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" }, 811 { do_bad, SIGKILL, SI_KERNEL, "unknown 12" }, 812 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" }, 813 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" }, 814 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" }, 815 { do_sea, SIGBUS, BUS_OBJERR, "synchronous external abort" }, 816 { do_tag_check_fault, SIGSEGV, SEGV_MTESERR, "synchronous tag check fault" }, 817 { do_bad, SIGKILL, SI_KERNEL, "unknown 18" }, 818 { do_bad, SIGKILL, SI_KERNEL, "unknown 19" }, 819 { do_sea, SIGKILL, SI_KERNEL, "level 0 (translation table walk)" }, 820 { do_sea, SIGKILL, SI_KERNEL, "level 1 (translation table walk)" }, 821 { do_sea, SIGKILL, SI_KERNEL, "level 2 (translation table walk)" }, 822 { do_sea, SIGKILL, SI_KERNEL, "level 3 (translation table walk)" }, 823 { do_sea, SIGBUS, BUS_OBJERR, "synchronous parity or ECC error" }, // Reserved when RAS is implemented 824 { do_bad, SIGKILL, SI_KERNEL, "unknown 25" }, 825 { do_bad, SIGKILL, SI_KERNEL, "unknown 26" }, 826 { do_bad, SIGKILL, SI_KERNEL, "unknown 27" }, 827 { do_sea, SIGKILL, SI_KERNEL, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 828 { do_sea, SIGKILL, SI_KERNEL, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 829 { do_sea, SIGKILL, SI_KERNEL, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 830 { do_sea, SIGKILL, SI_KERNEL, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 831 { do_bad, SIGKILL, SI_KERNEL, "unknown 32" }, 832 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" }, 833 { do_bad, SIGKILL, SI_KERNEL, "unknown 34" }, 834 { do_bad, SIGKILL, SI_KERNEL, "unknown 35" }, 835 { do_bad, SIGKILL, SI_KERNEL, "unknown 36" }, 836 { do_bad, SIGKILL, SI_KERNEL, "unknown 37" }, 837 { do_bad, SIGKILL, SI_KERNEL, "unknown 38" }, 838 { do_bad, SIGKILL, SI_KERNEL, "unknown 39" }, 839 { do_bad, SIGKILL, SI_KERNEL, "unknown 40" }, 840 { do_bad, SIGKILL, SI_KERNEL, "unknown 41" }, 841 { do_bad, SIGKILL, SI_KERNEL, "unknown 42" }, 842 { do_bad, SIGKILL, SI_KERNEL, "unknown 43" }, 843 { do_bad, SIGKILL, SI_KERNEL, "unknown 44" }, 844 { do_bad, SIGKILL, SI_KERNEL, "unknown 45" }, 845 { do_bad, SIGKILL, SI_KERNEL, "unknown 46" }, 846 { do_bad, SIGKILL, SI_KERNEL, "unknown 47" }, 847 { do_bad, SIGKILL, SI_KERNEL, "TLB conflict abort" }, 848 { do_bad, SIGKILL, SI_KERNEL, "Unsupported atomic hardware update fault" }, 849 { do_bad, SIGKILL, SI_KERNEL, "unknown 50" }, 850 { do_bad, SIGKILL, SI_KERNEL, "unknown 51" }, 851 { do_bad, SIGKILL, SI_KERNEL, "implementation fault (lockdown abort)" }, 852 { do_bad, SIGBUS, BUS_OBJERR, "implementation fault (unsupported exclusive)" }, 853 { do_bad, SIGKILL, SI_KERNEL, "unknown 54" }, 854 { do_bad, SIGKILL, SI_KERNEL, "unknown 55" }, 855 { do_bad, SIGKILL, SI_KERNEL, "unknown 56" }, 856 { do_bad, SIGKILL, SI_KERNEL, "unknown 57" }, 857 { do_bad, SIGKILL, SI_KERNEL, "unknown 58" }, 858 { do_bad, SIGKILL, SI_KERNEL, "unknown 59" }, 859 { do_bad, SIGKILL, SI_KERNEL, "unknown 60" }, 860 { do_bad, SIGKILL, SI_KERNEL, "section domain fault" }, 861 { do_bad, SIGKILL, SI_KERNEL, "page domain fault" }, 862 { do_bad, SIGKILL, SI_KERNEL, "unknown 63" }, 863 }; 864 865 void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs) 866 { 867 const struct fault_info *inf = esr_to_fault_info(esr); 868 unsigned long addr = untagged_addr(far); 869 870 if (!inf->fn(far, esr, regs)) 871 return; 872 873 if (!user_mode(regs)) 874 die_kernel_fault(inf->name, addr, esr, regs); 875 876 /* 877 * At this point we have an unrecognized fault type whose tag bits may 878 * have been defined as UNKNOWN. Therefore we only expose the untagged 879 * address to the signal handler. 880 */ 881 arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr); 882 } 883 NOKPROBE_SYMBOL(do_mem_abort); 884 885 void do_sp_pc_abort(unsigned long addr, unsigned long esr, struct pt_regs *regs) 886 { 887 arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN, 888 addr, esr); 889 } 890 NOKPROBE_SYMBOL(do_sp_pc_abort); 891 892 int __init early_brk64(unsigned long addr, unsigned long esr, 893 struct pt_regs *regs); 894 895 /* 896 * __refdata because early_brk64 is __init, but the reference to it is 897 * clobbered at arch_initcall time. 898 * See traps.c and debug-monitors.c:debug_traps_init(). 899 */ 900 static struct fault_info __refdata debug_fault_info[] = { 901 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" }, 902 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" }, 903 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" }, 904 { do_bad, SIGKILL, SI_KERNEL, "unknown 3" }, 905 { do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" }, 906 { do_bad, SIGKILL, SI_KERNEL, "aarch32 vector catch" }, 907 { early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" }, 908 { do_bad, SIGKILL, SI_KERNEL, "unknown 7" }, 909 }; 910 911 void __init hook_debug_fault_code(int nr, 912 int (*fn)(unsigned long, unsigned long, struct pt_regs *), 913 int sig, int code, const char *name) 914 { 915 BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info)); 916 917 debug_fault_info[nr].fn = fn; 918 debug_fault_info[nr].sig = sig; 919 debug_fault_info[nr].code = code; 920 debug_fault_info[nr].name = name; 921 } 922 923 /* 924 * In debug exception context, we explicitly disable preemption despite 925 * having interrupts disabled. 926 * This serves two purposes: it makes it much less likely that we would 927 * accidentally schedule in exception context and it will force a warning 928 * if we somehow manage to schedule by accident. 929 */ 930 static void debug_exception_enter(struct pt_regs *regs) 931 { 932 preempt_disable(); 933 934 /* This code is a bit fragile. Test it. */ 935 RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work"); 936 } 937 NOKPROBE_SYMBOL(debug_exception_enter); 938 939 static void debug_exception_exit(struct pt_regs *regs) 940 { 941 preempt_enable_no_resched(); 942 } 943 NOKPROBE_SYMBOL(debug_exception_exit); 944 945 void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr, 946 struct pt_regs *regs) 947 { 948 const struct fault_info *inf = esr_to_debug_fault_info(esr); 949 unsigned long pc = instruction_pointer(regs); 950 951 debug_exception_enter(regs); 952 953 if (user_mode(regs) && !is_ttbr0_addr(pc)) 954 arm64_apply_bp_hardening(); 955 956 if (inf->fn(addr_if_watchpoint, esr, regs)) { 957 arm64_notify_die(inf->name, regs, inf->sig, inf->code, pc, esr); 958 } 959 960 debug_exception_exit(regs); 961 } 962 NOKPROBE_SYMBOL(do_debug_exception); 963 964 /* 965 * Used during anonymous page fault handling. 966 */ 967 struct folio *vma_alloc_zeroed_movable_folio(struct vm_area_struct *vma, 968 unsigned long vaddr) 969 { 970 gfp_t flags = GFP_HIGHUSER_MOVABLE | __GFP_ZERO; 971 972 /* 973 * If the page is mapped with PROT_MTE, initialise the tags at the 974 * point of allocation and page zeroing as this is usually faster than 975 * separate DC ZVA and STGM. 976 */ 977 if (vma->vm_flags & VM_MTE) 978 flags |= __GFP_ZEROTAGS; 979 980 return vma_alloc_folio(flags, 0, vma, vaddr, false); 981 } 982 983 void tag_clear_highpage(struct page *page) 984 { 985 /* Newly allocated page, shouldn't have been tagged yet */ 986 WARN_ON_ONCE(!try_page_mte_tagging(page)); 987 mte_zero_clear_page_tags(page_address(page)); 988 set_page_mte_tagged(page); 989 } 990