1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Based on arch/arm/mm/fault.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright (C) 1995-2004 Russell King 7 * Copyright (C) 2012 ARM Ltd. 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/bitfield.h> 12 #include <linux/extable.h> 13 #include <linux/kfence.h> 14 #include <linux/signal.h> 15 #include <linux/mm.h> 16 #include <linux/hardirq.h> 17 #include <linux/init.h> 18 #include <linux/kasan.h> 19 #include <linux/kprobes.h> 20 #include <linux/uaccess.h> 21 #include <linux/page-flags.h> 22 #include <linux/sched/signal.h> 23 #include <linux/sched/debug.h> 24 #include <linux/highmem.h> 25 #include <linux/perf_event.h> 26 #include <linux/preempt.h> 27 #include <linux/hugetlb.h> 28 29 #include <asm/acpi.h> 30 #include <asm/bug.h> 31 #include <asm/cmpxchg.h> 32 #include <asm/cpufeature.h> 33 #include <asm/exception.h> 34 #include <asm/daifflags.h> 35 #include <asm/debug-monitors.h> 36 #include <asm/esr.h> 37 #include <asm/kprobes.h> 38 #include <asm/mte.h> 39 #include <asm/processor.h> 40 #include <asm/sysreg.h> 41 #include <asm/system_misc.h> 42 #include <asm/tlbflush.h> 43 #include <asm/traps.h> 44 45 struct fault_info { 46 int (*fn)(unsigned long far, unsigned int esr, 47 struct pt_regs *regs); 48 int sig; 49 int code; 50 const char *name; 51 }; 52 53 static const struct fault_info fault_info[]; 54 static struct fault_info debug_fault_info[]; 55 56 static inline const struct fault_info *esr_to_fault_info(unsigned int esr) 57 { 58 return fault_info + (esr & ESR_ELx_FSC); 59 } 60 61 static inline const struct fault_info *esr_to_debug_fault_info(unsigned int esr) 62 { 63 return debug_fault_info + DBG_ESR_EVT(esr); 64 } 65 66 static void data_abort_decode(unsigned int esr) 67 { 68 pr_alert("Data abort info:\n"); 69 70 if (esr & ESR_ELx_ISV) { 71 pr_alert(" Access size = %u byte(s)\n", 72 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT)); 73 pr_alert(" SSE = %lu, SRT = %lu\n", 74 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT, 75 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT); 76 pr_alert(" SF = %lu, AR = %lu\n", 77 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT, 78 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT); 79 } else { 80 pr_alert(" ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK); 81 } 82 83 pr_alert(" CM = %lu, WnR = %lu\n", 84 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT, 85 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT); 86 } 87 88 static void mem_abort_decode(unsigned int esr) 89 { 90 pr_alert("Mem abort info:\n"); 91 92 pr_alert(" ESR = 0x%08x\n", esr); 93 pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n", 94 ESR_ELx_EC(esr), esr_get_class_string(esr), 95 (esr & ESR_ELx_IL) ? 32 : 16); 96 pr_alert(" SET = %lu, FnV = %lu\n", 97 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT, 98 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT); 99 pr_alert(" EA = %lu, S1PTW = %lu\n", 100 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT, 101 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT); 102 pr_alert(" FSC = 0x%02x: %s\n", (esr & ESR_ELx_FSC), 103 esr_to_fault_info(esr)->name); 104 105 if (esr_is_data_abort(esr)) 106 data_abort_decode(esr); 107 } 108 109 static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm) 110 { 111 /* Either init_pg_dir or swapper_pg_dir */ 112 if (mm == &init_mm) 113 return __pa_symbol(mm->pgd); 114 115 return (unsigned long)virt_to_phys(mm->pgd); 116 } 117 118 /* 119 * Dump out the page tables associated with 'addr' in the currently active mm. 120 */ 121 static void show_pte(unsigned long addr) 122 { 123 struct mm_struct *mm; 124 pgd_t *pgdp; 125 pgd_t pgd; 126 127 if (is_ttbr0_addr(addr)) { 128 /* TTBR0 */ 129 mm = current->active_mm; 130 if (mm == &init_mm) { 131 pr_alert("[%016lx] user address but active_mm is swapper\n", 132 addr); 133 return; 134 } 135 } else if (is_ttbr1_addr(addr)) { 136 /* TTBR1 */ 137 mm = &init_mm; 138 } else { 139 pr_alert("[%016lx] address between user and kernel address ranges\n", 140 addr); 141 return; 142 } 143 144 pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n", 145 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K, 146 vabits_actual, mm_to_pgd_phys(mm)); 147 pgdp = pgd_offset(mm, addr); 148 pgd = READ_ONCE(*pgdp); 149 pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd)); 150 151 do { 152 p4d_t *p4dp, p4d; 153 pud_t *pudp, pud; 154 pmd_t *pmdp, pmd; 155 pte_t *ptep, pte; 156 157 if (pgd_none(pgd) || pgd_bad(pgd)) 158 break; 159 160 p4dp = p4d_offset(pgdp, addr); 161 p4d = READ_ONCE(*p4dp); 162 pr_cont(", p4d=%016llx", p4d_val(p4d)); 163 if (p4d_none(p4d) || p4d_bad(p4d)) 164 break; 165 166 pudp = pud_offset(p4dp, addr); 167 pud = READ_ONCE(*pudp); 168 pr_cont(", pud=%016llx", pud_val(pud)); 169 if (pud_none(pud) || pud_bad(pud)) 170 break; 171 172 pmdp = pmd_offset(pudp, addr); 173 pmd = READ_ONCE(*pmdp); 174 pr_cont(", pmd=%016llx", pmd_val(pmd)); 175 if (pmd_none(pmd) || pmd_bad(pmd)) 176 break; 177 178 ptep = pte_offset_map(pmdp, addr); 179 pte = READ_ONCE(*ptep); 180 pr_cont(", pte=%016llx", pte_val(pte)); 181 pte_unmap(ptep); 182 } while(0); 183 184 pr_cont("\n"); 185 } 186 187 /* 188 * This function sets the access flags (dirty, accessed), as well as write 189 * permission, and only to a more permissive setting. 190 * 191 * It needs to cope with hardware update of the accessed/dirty state by other 192 * agents in the system and can safely skip the __sync_icache_dcache() call as, 193 * like set_pte_at(), the PTE is never changed from no-exec to exec here. 194 * 195 * Returns whether or not the PTE actually changed. 196 */ 197 int ptep_set_access_flags(struct vm_area_struct *vma, 198 unsigned long address, pte_t *ptep, 199 pte_t entry, int dirty) 200 { 201 pteval_t old_pteval, pteval; 202 pte_t pte = READ_ONCE(*ptep); 203 204 if (pte_same(pte, entry)) 205 return 0; 206 207 /* only preserve the access flags and write permission */ 208 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY; 209 210 /* 211 * Setting the flags must be done atomically to avoid racing with the 212 * hardware update of the access/dirty state. The PTE_RDONLY bit must 213 * be set to the most permissive (lowest value) of *ptep and entry 214 * (calculated as: a & b == ~(~a | ~b)). 215 */ 216 pte_val(entry) ^= PTE_RDONLY; 217 pteval = pte_val(pte); 218 do { 219 old_pteval = pteval; 220 pteval ^= PTE_RDONLY; 221 pteval |= pte_val(entry); 222 pteval ^= PTE_RDONLY; 223 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval); 224 } while (pteval != old_pteval); 225 226 /* Invalidate a stale read-only entry */ 227 if (dirty) 228 flush_tlb_page(vma, address); 229 return 1; 230 } 231 232 static bool is_el1_instruction_abort(unsigned int esr) 233 { 234 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR; 235 } 236 237 static bool is_el1_data_abort(unsigned int esr) 238 { 239 return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_CUR; 240 } 241 242 static inline bool is_el1_permission_fault(unsigned long addr, unsigned int esr, 243 struct pt_regs *regs) 244 { 245 unsigned int fsc_type = esr & ESR_ELx_FSC_TYPE; 246 247 if (!is_el1_data_abort(esr) && !is_el1_instruction_abort(esr)) 248 return false; 249 250 if (fsc_type == ESR_ELx_FSC_PERM) 251 return true; 252 253 if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan()) 254 return fsc_type == ESR_ELx_FSC_FAULT && 255 (regs->pstate & PSR_PAN_BIT); 256 257 return false; 258 } 259 260 static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr, 261 unsigned int esr, 262 struct pt_regs *regs) 263 { 264 unsigned long flags; 265 u64 par, dfsc; 266 267 if (!is_el1_data_abort(esr) || 268 (esr & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT) 269 return false; 270 271 local_irq_save(flags); 272 asm volatile("at s1e1r, %0" :: "r" (addr)); 273 isb(); 274 par = read_sysreg_par(); 275 local_irq_restore(flags); 276 277 /* 278 * If we now have a valid translation, treat the translation fault as 279 * spurious. 280 */ 281 if (!(par & SYS_PAR_EL1_F)) 282 return true; 283 284 /* 285 * If we got a different type of fault from the AT instruction, 286 * treat the translation fault as spurious. 287 */ 288 dfsc = FIELD_GET(SYS_PAR_EL1_FST, par); 289 return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT; 290 } 291 292 static void die_kernel_fault(const char *msg, unsigned long addr, 293 unsigned int esr, struct pt_regs *regs) 294 { 295 bust_spinlocks(1); 296 297 pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg, 298 addr); 299 300 mem_abort_decode(esr); 301 302 show_pte(addr); 303 die("Oops", regs, esr); 304 bust_spinlocks(0); 305 do_exit(SIGKILL); 306 } 307 308 #ifdef CONFIG_KASAN_HW_TAGS 309 static void report_tag_fault(unsigned long addr, unsigned int esr, 310 struct pt_regs *regs) 311 { 312 static bool reported; 313 bool is_write; 314 315 if (READ_ONCE(reported)) 316 return; 317 318 /* 319 * This is used for KASAN tests and assumes that no MTE faults 320 * happened before running the tests. 321 */ 322 if (mte_report_once()) 323 WRITE_ONCE(reported, true); 324 325 /* 326 * SAS bits aren't set for all faults reported in EL1, so we can't 327 * find out access size. 328 */ 329 is_write = !!(esr & ESR_ELx_WNR); 330 kasan_report(addr, 0, is_write, regs->pc); 331 } 332 #else 333 /* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */ 334 static inline void report_tag_fault(unsigned long addr, unsigned int esr, 335 struct pt_regs *regs) { } 336 #endif 337 338 static void do_tag_recovery(unsigned long addr, unsigned int esr, 339 struct pt_regs *regs) 340 { 341 342 report_tag_fault(addr, esr, regs); 343 344 /* 345 * Disable MTE Tag Checking on the local CPU for the current EL. 346 * It will be done lazily on the other CPUs when they will hit a 347 * tag fault. 348 */ 349 sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_NONE); 350 isb(); 351 } 352 353 static bool is_el1_mte_sync_tag_check_fault(unsigned int esr) 354 { 355 unsigned int fsc = esr & ESR_ELx_FSC; 356 357 if (!is_el1_data_abort(esr)) 358 return false; 359 360 if (fsc == ESR_ELx_FSC_MTE) 361 return true; 362 363 return false; 364 } 365 366 static void __do_kernel_fault(unsigned long addr, unsigned int esr, 367 struct pt_regs *regs) 368 { 369 const char *msg; 370 371 /* 372 * Are we prepared to handle this kernel fault? 373 * We are almost certainly not prepared to handle instruction faults. 374 */ 375 if (!is_el1_instruction_abort(esr) && fixup_exception(regs)) 376 return; 377 378 if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs), 379 "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr)) 380 return; 381 382 if (is_el1_mte_sync_tag_check_fault(esr)) { 383 do_tag_recovery(addr, esr, regs); 384 385 return; 386 } 387 388 if (is_el1_permission_fault(addr, esr, regs)) { 389 if (esr & ESR_ELx_WNR) 390 msg = "write to read-only memory"; 391 else if (is_el1_instruction_abort(esr)) 392 msg = "execute from non-executable memory"; 393 else 394 msg = "read from unreadable memory"; 395 } else if (addr < PAGE_SIZE) { 396 msg = "NULL pointer dereference"; 397 } else { 398 if (kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs)) 399 return; 400 401 msg = "paging request"; 402 } 403 404 die_kernel_fault(msg, addr, esr, regs); 405 } 406 407 static void set_thread_esr(unsigned long address, unsigned int esr) 408 { 409 current->thread.fault_address = address; 410 411 /* 412 * If the faulting address is in the kernel, we must sanitize the ESR. 413 * From userspace's point of view, kernel-only mappings don't exist 414 * at all, so we report them as level 0 translation faults. 415 * (This is not quite the way that "no mapping there at all" behaves: 416 * an alignment fault not caused by the memory type would take 417 * precedence over translation fault for a real access to empty 418 * space. Unfortunately we can't easily distinguish "alignment fault 419 * not caused by memory type" from "alignment fault caused by memory 420 * type", so we ignore this wrinkle and just return the translation 421 * fault.) 422 */ 423 if (!is_ttbr0_addr(current->thread.fault_address)) { 424 switch (ESR_ELx_EC(esr)) { 425 case ESR_ELx_EC_DABT_LOW: 426 /* 427 * These bits provide only information about the 428 * faulting instruction, which userspace knows already. 429 * We explicitly clear bits which are architecturally 430 * RES0 in case they are given meanings in future. 431 * We always report the ESR as if the fault was taken 432 * to EL1 and so ISV and the bits in ISS[23:14] are 433 * clear. (In fact it always will be a fault to EL1.) 434 */ 435 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL | 436 ESR_ELx_CM | ESR_ELx_WNR; 437 esr |= ESR_ELx_FSC_FAULT; 438 break; 439 case ESR_ELx_EC_IABT_LOW: 440 /* 441 * Claim a level 0 translation fault. 442 * All other bits are architecturally RES0 for faults 443 * reported with that DFSC value, so we clear them. 444 */ 445 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL; 446 esr |= ESR_ELx_FSC_FAULT; 447 break; 448 default: 449 /* 450 * This should never happen (entry.S only brings us 451 * into this code for insn and data aborts from a lower 452 * exception level). Fail safe by not providing an ESR 453 * context record at all. 454 */ 455 WARN(1, "ESR 0x%x is not DABT or IABT from EL0\n", esr); 456 esr = 0; 457 break; 458 } 459 } 460 461 current->thread.fault_code = esr; 462 } 463 464 static void do_bad_area(unsigned long far, unsigned int esr, 465 struct pt_regs *regs) 466 { 467 unsigned long addr = untagged_addr(far); 468 469 /* 470 * If we are in kernel mode at this point, we have no context to 471 * handle this fault with. 472 */ 473 if (user_mode(regs)) { 474 const struct fault_info *inf = esr_to_fault_info(esr); 475 476 set_thread_esr(addr, esr); 477 arm64_force_sig_fault(inf->sig, inf->code, far, inf->name); 478 } else { 479 __do_kernel_fault(addr, esr, regs); 480 } 481 } 482 483 #define VM_FAULT_BADMAP 0x010000 484 #define VM_FAULT_BADACCESS 0x020000 485 486 static vm_fault_t __do_page_fault(struct mm_struct *mm, unsigned long addr, 487 unsigned int mm_flags, unsigned long vm_flags, 488 struct pt_regs *regs) 489 { 490 struct vm_area_struct *vma = find_vma(mm, addr); 491 492 if (unlikely(!vma)) 493 return VM_FAULT_BADMAP; 494 495 /* 496 * Ok, we have a good vm_area for this memory access, so we can handle 497 * it. 498 */ 499 if (unlikely(vma->vm_start > addr)) { 500 if (!(vma->vm_flags & VM_GROWSDOWN)) 501 return VM_FAULT_BADMAP; 502 if (expand_stack(vma, addr)) 503 return VM_FAULT_BADMAP; 504 } 505 506 /* 507 * Check that the permissions on the VMA allow for the fault which 508 * occurred. 509 */ 510 if (!(vma->vm_flags & vm_flags)) 511 return VM_FAULT_BADACCESS; 512 return handle_mm_fault(vma, addr, mm_flags, regs); 513 } 514 515 static bool is_el0_instruction_abort(unsigned int esr) 516 { 517 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW; 518 } 519 520 /* 521 * Note: not valid for EL1 DC IVAC, but we never use that such that it 522 * should fault. EL0 cannot issue DC IVAC (undef). 523 */ 524 static bool is_write_abort(unsigned int esr) 525 { 526 return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM); 527 } 528 529 static int __kprobes do_page_fault(unsigned long far, unsigned int esr, 530 struct pt_regs *regs) 531 { 532 const struct fault_info *inf; 533 struct mm_struct *mm = current->mm; 534 vm_fault_t fault; 535 unsigned long vm_flags; 536 unsigned int mm_flags = FAULT_FLAG_DEFAULT; 537 unsigned long addr = untagged_addr(far); 538 539 if (kprobe_page_fault(regs, esr)) 540 return 0; 541 542 /* 543 * If we're in an interrupt or have no user context, we must not take 544 * the fault. 545 */ 546 if (faulthandler_disabled() || !mm) 547 goto no_context; 548 549 if (user_mode(regs)) 550 mm_flags |= FAULT_FLAG_USER; 551 552 /* 553 * vm_flags tells us what bits we must have in vma->vm_flags 554 * for the fault to be benign, __do_page_fault() would check 555 * vma->vm_flags & vm_flags and returns an error if the 556 * intersection is empty 557 */ 558 if (is_el0_instruction_abort(esr)) { 559 /* It was exec fault */ 560 vm_flags = VM_EXEC; 561 mm_flags |= FAULT_FLAG_INSTRUCTION; 562 } else if (is_write_abort(esr)) { 563 /* It was write fault */ 564 vm_flags = VM_WRITE; 565 mm_flags |= FAULT_FLAG_WRITE; 566 } else { 567 /* It was read fault */ 568 vm_flags = VM_READ; 569 /* Write implies read */ 570 vm_flags |= VM_WRITE; 571 /* If EPAN is absent then exec implies read */ 572 if (!cpus_have_const_cap(ARM64_HAS_EPAN)) 573 vm_flags |= VM_EXEC; 574 } 575 576 if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) { 577 if (is_el1_instruction_abort(esr)) 578 die_kernel_fault("execution of user memory", 579 addr, esr, regs); 580 581 if (!search_exception_tables(regs->pc)) 582 die_kernel_fault("access to user memory outside uaccess routines", 583 addr, esr, regs); 584 } 585 586 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); 587 588 /* 589 * As per x86, we may deadlock here. However, since the kernel only 590 * validly references user space from well defined areas of the code, 591 * we can bug out early if this is from code which shouldn't. 592 */ 593 if (!mmap_read_trylock(mm)) { 594 if (!user_mode(regs) && !search_exception_tables(regs->pc)) 595 goto no_context; 596 retry: 597 mmap_read_lock(mm); 598 } else { 599 /* 600 * The above mmap_read_trylock() might have succeeded in which 601 * case, we'll have missed the might_sleep() from down_read(). 602 */ 603 might_sleep(); 604 #ifdef CONFIG_DEBUG_VM 605 if (!user_mode(regs) && !search_exception_tables(regs->pc)) { 606 mmap_read_unlock(mm); 607 goto no_context; 608 } 609 #endif 610 } 611 612 fault = __do_page_fault(mm, addr, mm_flags, vm_flags, regs); 613 614 /* Quick path to respond to signals */ 615 if (fault_signal_pending(fault, regs)) { 616 if (!user_mode(regs)) 617 goto no_context; 618 return 0; 619 } 620 621 if (fault & VM_FAULT_RETRY) { 622 if (mm_flags & FAULT_FLAG_ALLOW_RETRY) { 623 mm_flags |= FAULT_FLAG_TRIED; 624 goto retry; 625 } 626 } 627 mmap_read_unlock(mm); 628 629 /* 630 * Handle the "normal" (no error) case first. 631 */ 632 if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP | 633 VM_FAULT_BADACCESS)))) 634 return 0; 635 636 /* 637 * If we are in kernel mode at this point, we have no context to 638 * handle this fault with. 639 */ 640 if (!user_mode(regs)) 641 goto no_context; 642 643 if (fault & VM_FAULT_OOM) { 644 /* 645 * We ran out of memory, call the OOM killer, and return to 646 * userspace (which will retry the fault, or kill us if we got 647 * oom-killed). 648 */ 649 pagefault_out_of_memory(); 650 return 0; 651 } 652 653 inf = esr_to_fault_info(esr); 654 set_thread_esr(addr, esr); 655 if (fault & VM_FAULT_SIGBUS) { 656 /* 657 * We had some memory, but were unable to successfully fix up 658 * this page fault. 659 */ 660 arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name); 661 } else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) { 662 unsigned int lsb; 663 664 lsb = PAGE_SHIFT; 665 if (fault & VM_FAULT_HWPOISON_LARGE) 666 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault)); 667 668 arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name); 669 } else { 670 /* 671 * Something tried to access memory that isn't in our memory 672 * map. 673 */ 674 arm64_force_sig_fault(SIGSEGV, 675 fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR, 676 far, inf->name); 677 } 678 679 return 0; 680 681 no_context: 682 __do_kernel_fault(addr, esr, regs); 683 return 0; 684 } 685 686 static int __kprobes do_translation_fault(unsigned long far, 687 unsigned int esr, 688 struct pt_regs *regs) 689 { 690 unsigned long addr = untagged_addr(far); 691 692 if (is_ttbr0_addr(addr)) 693 return do_page_fault(far, esr, regs); 694 695 do_bad_area(far, esr, regs); 696 return 0; 697 } 698 699 static int do_alignment_fault(unsigned long far, unsigned int esr, 700 struct pt_regs *regs) 701 { 702 do_bad_area(far, esr, regs); 703 return 0; 704 } 705 706 static int do_bad(unsigned long far, unsigned int esr, struct pt_regs *regs) 707 { 708 return 1; /* "fault" */ 709 } 710 711 static int do_sea(unsigned long far, unsigned int esr, struct pt_regs *regs) 712 { 713 const struct fault_info *inf; 714 unsigned long siaddr; 715 716 inf = esr_to_fault_info(esr); 717 718 if (user_mode(regs) && apei_claim_sea(regs) == 0) { 719 /* 720 * APEI claimed this as a firmware-first notification. 721 * Some processing deferred to task_work before ret_to_user(). 722 */ 723 return 0; 724 } 725 726 if (esr & ESR_ELx_FnV) { 727 siaddr = 0; 728 } else { 729 /* 730 * The architecture specifies that the tag bits of FAR_EL1 are 731 * UNKNOWN for synchronous external aborts. Mask them out now 732 * so that userspace doesn't see them. 733 */ 734 siaddr = untagged_addr(far); 735 } 736 arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr); 737 738 return 0; 739 } 740 741 static int do_tag_check_fault(unsigned long far, unsigned int esr, 742 struct pt_regs *regs) 743 { 744 /* 745 * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN 746 * for tag check faults. Set them to corresponding bits in the untagged 747 * address. 748 */ 749 far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK); 750 do_bad_area(far, esr, regs); 751 return 0; 752 } 753 754 static const struct fault_info fault_info[] = { 755 { do_bad, SIGKILL, SI_KERNEL, "ttbr address size fault" }, 756 { do_bad, SIGKILL, SI_KERNEL, "level 1 address size fault" }, 757 { do_bad, SIGKILL, SI_KERNEL, "level 2 address size fault" }, 758 { do_bad, SIGKILL, SI_KERNEL, "level 3 address size fault" }, 759 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" }, 760 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" }, 761 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" }, 762 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" }, 763 { do_bad, SIGKILL, SI_KERNEL, "unknown 8" }, 764 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" }, 765 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" }, 766 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" }, 767 { do_bad, SIGKILL, SI_KERNEL, "unknown 12" }, 768 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" }, 769 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" }, 770 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" }, 771 { do_sea, SIGBUS, BUS_OBJERR, "synchronous external abort" }, 772 { do_tag_check_fault, SIGSEGV, SEGV_MTESERR, "synchronous tag check fault" }, 773 { do_bad, SIGKILL, SI_KERNEL, "unknown 18" }, 774 { do_bad, SIGKILL, SI_KERNEL, "unknown 19" }, 775 { do_sea, SIGKILL, SI_KERNEL, "level 0 (translation table walk)" }, 776 { do_sea, SIGKILL, SI_KERNEL, "level 1 (translation table walk)" }, 777 { do_sea, SIGKILL, SI_KERNEL, "level 2 (translation table walk)" }, 778 { do_sea, SIGKILL, SI_KERNEL, "level 3 (translation table walk)" }, 779 { do_sea, SIGBUS, BUS_OBJERR, "synchronous parity or ECC error" }, // Reserved when RAS is implemented 780 { do_bad, SIGKILL, SI_KERNEL, "unknown 25" }, 781 { do_bad, SIGKILL, SI_KERNEL, "unknown 26" }, 782 { do_bad, SIGKILL, SI_KERNEL, "unknown 27" }, 783 { do_sea, SIGKILL, SI_KERNEL, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 784 { do_sea, SIGKILL, SI_KERNEL, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 785 { do_sea, SIGKILL, SI_KERNEL, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 786 { do_sea, SIGKILL, SI_KERNEL, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 787 { do_bad, SIGKILL, SI_KERNEL, "unknown 32" }, 788 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" }, 789 { do_bad, SIGKILL, SI_KERNEL, "unknown 34" }, 790 { do_bad, SIGKILL, SI_KERNEL, "unknown 35" }, 791 { do_bad, SIGKILL, SI_KERNEL, "unknown 36" }, 792 { do_bad, SIGKILL, SI_KERNEL, "unknown 37" }, 793 { do_bad, SIGKILL, SI_KERNEL, "unknown 38" }, 794 { do_bad, SIGKILL, SI_KERNEL, "unknown 39" }, 795 { do_bad, SIGKILL, SI_KERNEL, "unknown 40" }, 796 { do_bad, SIGKILL, SI_KERNEL, "unknown 41" }, 797 { do_bad, SIGKILL, SI_KERNEL, "unknown 42" }, 798 { do_bad, SIGKILL, SI_KERNEL, "unknown 43" }, 799 { do_bad, SIGKILL, SI_KERNEL, "unknown 44" }, 800 { do_bad, SIGKILL, SI_KERNEL, "unknown 45" }, 801 { do_bad, SIGKILL, SI_KERNEL, "unknown 46" }, 802 { do_bad, SIGKILL, SI_KERNEL, "unknown 47" }, 803 { do_bad, SIGKILL, SI_KERNEL, "TLB conflict abort" }, 804 { do_bad, SIGKILL, SI_KERNEL, "Unsupported atomic hardware update fault" }, 805 { do_bad, SIGKILL, SI_KERNEL, "unknown 50" }, 806 { do_bad, SIGKILL, SI_KERNEL, "unknown 51" }, 807 { do_bad, SIGKILL, SI_KERNEL, "implementation fault (lockdown abort)" }, 808 { do_bad, SIGBUS, BUS_OBJERR, "implementation fault (unsupported exclusive)" }, 809 { do_bad, SIGKILL, SI_KERNEL, "unknown 54" }, 810 { do_bad, SIGKILL, SI_KERNEL, "unknown 55" }, 811 { do_bad, SIGKILL, SI_KERNEL, "unknown 56" }, 812 { do_bad, SIGKILL, SI_KERNEL, "unknown 57" }, 813 { do_bad, SIGKILL, SI_KERNEL, "unknown 58" }, 814 { do_bad, SIGKILL, SI_KERNEL, "unknown 59" }, 815 { do_bad, SIGKILL, SI_KERNEL, "unknown 60" }, 816 { do_bad, SIGKILL, SI_KERNEL, "section domain fault" }, 817 { do_bad, SIGKILL, SI_KERNEL, "page domain fault" }, 818 { do_bad, SIGKILL, SI_KERNEL, "unknown 63" }, 819 }; 820 821 void do_mem_abort(unsigned long far, unsigned int esr, struct pt_regs *regs) 822 { 823 const struct fault_info *inf = esr_to_fault_info(esr); 824 unsigned long addr = untagged_addr(far); 825 826 if (!inf->fn(far, esr, regs)) 827 return; 828 829 if (!user_mode(regs)) { 830 pr_alert("Unhandled fault at 0x%016lx\n", addr); 831 mem_abort_decode(esr); 832 show_pte(addr); 833 } 834 835 /* 836 * At this point we have an unrecognized fault type whose tag bits may 837 * have been defined as UNKNOWN. Therefore we only expose the untagged 838 * address to the signal handler. 839 */ 840 arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr); 841 } 842 NOKPROBE_SYMBOL(do_mem_abort); 843 844 void do_sp_pc_abort(unsigned long addr, unsigned int esr, struct pt_regs *regs) 845 { 846 arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN, 847 addr, esr); 848 } 849 NOKPROBE_SYMBOL(do_sp_pc_abort); 850 851 int __init early_brk64(unsigned long addr, unsigned int esr, 852 struct pt_regs *regs); 853 854 /* 855 * __refdata because early_brk64 is __init, but the reference to it is 856 * clobbered at arch_initcall time. 857 * See traps.c and debug-monitors.c:debug_traps_init(). 858 */ 859 static struct fault_info __refdata debug_fault_info[] = { 860 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" }, 861 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" }, 862 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" }, 863 { do_bad, SIGKILL, SI_KERNEL, "unknown 3" }, 864 { do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" }, 865 { do_bad, SIGKILL, SI_KERNEL, "aarch32 vector catch" }, 866 { early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" }, 867 { do_bad, SIGKILL, SI_KERNEL, "unknown 7" }, 868 }; 869 870 void __init hook_debug_fault_code(int nr, 871 int (*fn)(unsigned long, unsigned int, struct pt_regs *), 872 int sig, int code, const char *name) 873 { 874 BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info)); 875 876 debug_fault_info[nr].fn = fn; 877 debug_fault_info[nr].sig = sig; 878 debug_fault_info[nr].code = code; 879 debug_fault_info[nr].name = name; 880 } 881 882 /* 883 * In debug exception context, we explicitly disable preemption despite 884 * having interrupts disabled. 885 * This serves two purposes: it makes it much less likely that we would 886 * accidentally schedule in exception context and it will force a warning 887 * if we somehow manage to schedule by accident. 888 */ 889 static void debug_exception_enter(struct pt_regs *regs) 890 { 891 preempt_disable(); 892 893 /* This code is a bit fragile. Test it. */ 894 RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work"); 895 } 896 NOKPROBE_SYMBOL(debug_exception_enter); 897 898 static void debug_exception_exit(struct pt_regs *regs) 899 { 900 preempt_enable_no_resched(); 901 } 902 NOKPROBE_SYMBOL(debug_exception_exit); 903 904 void do_debug_exception(unsigned long addr_if_watchpoint, unsigned int esr, 905 struct pt_regs *regs) 906 { 907 const struct fault_info *inf = esr_to_debug_fault_info(esr); 908 unsigned long pc = instruction_pointer(regs); 909 910 debug_exception_enter(regs); 911 912 if (user_mode(regs) && !is_ttbr0_addr(pc)) 913 arm64_apply_bp_hardening(); 914 915 if (inf->fn(addr_if_watchpoint, esr, regs)) { 916 arm64_notify_die(inf->name, regs, inf->sig, inf->code, pc, esr); 917 } 918 919 debug_exception_exit(regs); 920 } 921 NOKPROBE_SYMBOL(do_debug_exception); 922 923 /* 924 * Used during anonymous page fault handling. 925 */ 926 struct page *alloc_zeroed_user_highpage_movable(struct vm_area_struct *vma, 927 unsigned long vaddr) 928 { 929 gfp_t flags = GFP_HIGHUSER_MOVABLE | __GFP_ZERO; 930 931 /* 932 * If the page is mapped with PROT_MTE, initialise the tags at the 933 * point of allocation and page zeroing as this is usually faster than 934 * separate DC ZVA and STGM. 935 */ 936 if (vma->vm_flags & VM_MTE) 937 flags |= __GFP_ZEROTAGS; 938 939 return alloc_page_vma(flags, vma, vaddr); 940 } 941 942 void tag_clear_highpage(struct page *page) 943 { 944 mte_zero_clear_page_tags(page_address(page)); 945 page_kasan_tag_reset(page); 946 set_bit(PG_mte_tagged, &page->flags); 947 } 948