1 /* 2 * Based on arch/arm/mm/fault.c 3 * 4 * Copyright (C) 1995 Linus Torvalds 5 * Copyright (C) 1995-2004 Russell King 6 * Copyright (C) 2012 ARM Ltd. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program. If not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include <linux/extable.h> 22 #include <linux/signal.h> 23 #include <linux/mm.h> 24 #include <linux/hardirq.h> 25 #include <linux/init.h> 26 #include <linux/kprobes.h> 27 #include <linux/uaccess.h> 28 #include <linux/page-flags.h> 29 #include <linux/sched/signal.h> 30 #include <linux/sched/debug.h> 31 #include <linux/highmem.h> 32 #include <linux/perf_event.h> 33 #include <linux/preempt.h> 34 #include <linux/hugetlb.h> 35 36 #include <asm/bug.h> 37 #include <asm/cmpxchg.h> 38 #include <asm/cpufeature.h> 39 #include <asm/exception.h> 40 #include <asm/debug-monitors.h> 41 #include <asm/esr.h> 42 #include <asm/sysreg.h> 43 #include <asm/system_misc.h> 44 #include <asm/pgtable.h> 45 #include <asm/tlbflush.h> 46 #include <asm/traps.h> 47 48 #include <acpi/ghes.h> 49 50 struct fault_info { 51 int (*fn)(unsigned long addr, unsigned int esr, 52 struct pt_regs *regs); 53 int sig; 54 int code; 55 const char *name; 56 }; 57 58 static const struct fault_info fault_info[]; 59 60 static inline const struct fault_info *esr_to_fault_info(unsigned int esr) 61 { 62 return fault_info + (esr & 63); 63 } 64 65 #ifdef CONFIG_KPROBES 66 static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr) 67 { 68 int ret = 0; 69 70 /* kprobe_running() needs smp_processor_id() */ 71 if (!user_mode(regs)) { 72 preempt_disable(); 73 if (kprobe_running() && kprobe_fault_handler(regs, esr)) 74 ret = 1; 75 preempt_enable(); 76 } 77 78 return ret; 79 } 80 #else 81 static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr) 82 { 83 return 0; 84 } 85 #endif 86 87 static void data_abort_decode(unsigned int esr) 88 { 89 pr_alert("Data abort info:\n"); 90 91 if (esr & ESR_ELx_ISV) { 92 pr_alert(" Access size = %u byte(s)\n", 93 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT)); 94 pr_alert(" SSE = %lu, SRT = %lu\n", 95 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT, 96 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT); 97 pr_alert(" SF = %lu, AR = %lu\n", 98 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT, 99 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT); 100 } else { 101 pr_alert(" ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK); 102 } 103 104 pr_alert(" CM = %lu, WnR = %lu\n", 105 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT, 106 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT); 107 } 108 109 static void mem_abort_decode(unsigned int esr) 110 { 111 pr_alert("Mem abort info:\n"); 112 113 pr_alert(" ESR = 0x%08x\n", esr); 114 pr_alert(" Exception class = %s, IL = %u bits\n", 115 esr_get_class_string(esr), 116 (esr & ESR_ELx_IL) ? 32 : 16); 117 pr_alert(" SET = %lu, FnV = %lu\n", 118 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT, 119 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT); 120 pr_alert(" EA = %lu, S1PTW = %lu\n", 121 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT, 122 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT); 123 124 if (esr_is_data_abort(esr)) 125 data_abort_decode(esr); 126 } 127 128 /* 129 * Dump out the page tables associated with 'addr' in the currently active mm. 130 */ 131 void show_pte(unsigned long addr) 132 { 133 struct mm_struct *mm; 134 pgd_t *pgdp; 135 pgd_t pgd; 136 137 if (addr < TASK_SIZE) { 138 /* TTBR0 */ 139 mm = current->active_mm; 140 if (mm == &init_mm) { 141 pr_alert("[%016lx] user address but active_mm is swapper\n", 142 addr); 143 return; 144 } 145 } else if (addr >= VA_START) { 146 /* TTBR1 */ 147 mm = &init_mm; 148 } else { 149 pr_alert("[%016lx] address between user and kernel address ranges\n", 150 addr); 151 return; 152 } 153 154 pr_alert("%s pgtable: %luk pages, %u-bit VAs, pgdp = %p\n", 155 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K, 156 VA_BITS, mm->pgd); 157 pgdp = pgd_offset(mm, addr); 158 pgd = READ_ONCE(*pgdp); 159 pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd)); 160 161 do { 162 pud_t *pudp, pud; 163 pmd_t *pmdp, pmd; 164 pte_t *ptep, pte; 165 166 if (pgd_none(pgd) || pgd_bad(pgd)) 167 break; 168 169 pudp = pud_offset(pgdp, addr); 170 pud = READ_ONCE(*pudp); 171 pr_cont(", pud=%016llx", pud_val(pud)); 172 if (pud_none(pud) || pud_bad(pud)) 173 break; 174 175 pmdp = pmd_offset(pudp, addr); 176 pmd = READ_ONCE(*pmdp); 177 pr_cont(", pmd=%016llx", pmd_val(pmd)); 178 if (pmd_none(pmd) || pmd_bad(pmd)) 179 break; 180 181 ptep = pte_offset_map(pmdp, addr); 182 pte = READ_ONCE(*ptep); 183 pr_cont(", pte=%016llx", pte_val(pte)); 184 pte_unmap(ptep); 185 } while(0); 186 187 pr_cont("\n"); 188 } 189 190 /* 191 * This function sets the access flags (dirty, accessed), as well as write 192 * permission, and only to a more permissive setting. 193 * 194 * It needs to cope with hardware update of the accessed/dirty state by other 195 * agents in the system and can safely skip the __sync_icache_dcache() call as, 196 * like set_pte_at(), the PTE is never changed from no-exec to exec here. 197 * 198 * Returns whether or not the PTE actually changed. 199 */ 200 int ptep_set_access_flags(struct vm_area_struct *vma, 201 unsigned long address, pte_t *ptep, 202 pte_t entry, int dirty) 203 { 204 pteval_t old_pteval, pteval; 205 pte_t pte = READ_ONCE(*ptep); 206 207 if (pte_same(pte, entry)) 208 return 0; 209 210 /* only preserve the access flags and write permission */ 211 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY; 212 213 /* 214 * Setting the flags must be done atomically to avoid racing with the 215 * hardware update of the access/dirty state. The PTE_RDONLY bit must 216 * be set to the most permissive (lowest value) of *ptep and entry 217 * (calculated as: a & b == ~(~a | ~b)). 218 */ 219 pte_val(entry) ^= PTE_RDONLY; 220 pteval = pte_val(pte); 221 do { 222 old_pteval = pteval; 223 pteval ^= PTE_RDONLY; 224 pteval |= pte_val(entry); 225 pteval ^= PTE_RDONLY; 226 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval); 227 } while (pteval != old_pteval); 228 229 flush_tlb_fix_spurious_fault(vma, address); 230 return 1; 231 } 232 233 static bool is_el1_instruction_abort(unsigned int esr) 234 { 235 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR; 236 } 237 238 static inline bool is_permission_fault(unsigned int esr, struct pt_regs *regs, 239 unsigned long addr) 240 { 241 unsigned int ec = ESR_ELx_EC(esr); 242 unsigned int fsc_type = esr & ESR_ELx_FSC_TYPE; 243 244 if (ec != ESR_ELx_EC_DABT_CUR && ec != ESR_ELx_EC_IABT_CUR) 245 return false; 246 247 if (fsc_type == ESR_ELx_FSC_PERM) 248 return true; 249 250 if (addr < TASK_SIZE && system_uses_ttbr0_pan()) 251 return fsc_type == ESR_ELx_FSC_FAULT && 252 (regs->pstate & PSR_PAN_BIT); 253 254 return false; 255 } 256 257 static void __do_kernel_fault(unsigned long addr, unsigned int esr, 258 struct pt_regs *regs) 259 { 260 const char *msg; 261 262 /* 263 * Are we prepared to handle this kernel fault? 264 * We are almost certainly not prepared to handle instruction faults. 265 */ 266 if (!is_el1_instruction_abort(esr) && fixup_exception(regs)) 267 return; 268 269 bust_spinlocks(1); 270 271 if (is_permission_fault(esr, regs, addr)) { 272 if (esr & ESR_ELx_WNR) 273 msg = "write to read-only memory"; 274 else 275 msg = "read from unreadable memory"; 276 } else if (addr < PAGE_SIZE) { 277 msg = "NULL pointer dereference"; 278 } else { 279 msg = "paging request"; 280 } 281 282 pr_alert("Unable to handle kernel %s at virtual address %08lx\n", msg, 283 addr); 284 285 mem_abort_decode(esr); 286 287 show_pte(addr); 288 die("Oops", regs, esr); 289 bust_spinlocks(0); 290 do_exit(SIGKILL); 291 } 292 293 static void __do_user_fault(struct siginfo *info, unsigned int esr) 294 { 295 current->thread.fault_address = (unsigned long)info->si_addr; 296 297 /* 298 * If the faulting address is in the kernel, we must sanitize the ESR. 299 * From userspace's point of view, kernel-only mappings don't exist 300 * at all, so we report them as level 0 translation faults. 301 * (This is not quite the way that "no mapping there at all" behaves: 302 * an alignment fault not caused by the memory type would take 303 * precedence over translation fault for a real access to empty 304 * space. Unfortunately we can't easily distinguish "alignment fault 305 * not caused by memory type" from "alignment fault caused by memory 306 * type", so we ignore this wrinkle and just return the translation 307 * fault.) 308 */ 309 if (current->thread.fault_address >= TASK_SIZE) { 310 switch (ESR_ELx_EC(esr)) { 311 case ESR_ELx_EC_DABT_LOW: 312 /* 313 * These bits provide only information about the 314 * faulting instruction, which userspace knows already. 315 * We explicitly clear bits which are architecturally 316 * RES0 in case they are given meanings in future. 317 * We always report the ESR as if the fault was taken 318 * to EL1 and so ISV and the bits in ISS[23:14] are 319 * clear. (In fact it always will be a fault to EL1.) 320 */ 321 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL | 322 ESR_ELx_CM | ESR_ELx_WNR; 323 esr |= ESR_ELx_FSC_FAULT; 324 break; 325 case ESR_ELx_EC_IABT_LOW: 326 /* 327 * Claim a level 0 translation fault. 328 * All other bits are architecturally RES0 for faults 329 * reported with that DFSC value, so we clear them. 330 */ 331 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL; 332 esr |= ESR_ELx_FSC_FAULT; 333 break; 334 default: 335 /* 336 * This should never happen (entry.S only brings us 337 * into this code for insn and data aborts from a lower 338 * exception level). Fail safe by not providing an ESR 339 * context record at all. 340 */ 341 WARN(1, "ESR 0x%x is not DABT or IABT from EL0\n", esr); 342 esr = 0; 343 break; 344 } 345 } 346 347 current->thread.fault_code = esr; 348 arm64_force_sig_info(info, esr_to_fault_info(esr)->name, current); 349 } 350 351 static void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *regs) 352 { 353 /* 354 * If we are in kernel mode at this point, we have no context to 355 * handle this fault with. 356 */ 357 if (user_mode(regs)) { 358 const struct fault_info *inf = esr_to_fault_info(esr); 359 struct siginfo si = { 360 .si_signo = inf->sig, 361 .si_code = inf->code, 362 .si_addr = (void __user *)addr, 363 }; 364 365 __do_user_fault(&si, esr); 366 } else { 367 __do_kernel_fault(addr, esr, regs); 368 } 369 } 370 371 #define VM_FAULT_BADMAP 0x010000 372 #define VM_FAULT_BADACCESS 0x020000 373 374 static int __do_page_fault(struct mm_struct *mm, unsigned long addr, 375 unsigned int mm_flags, unsigned long vm_flags, 376 struct task_struct *tsk) 377 { 378 struct vm_area_struct *vma; 379 int fault; 380 381 vma = find_vma(mm, addr); 382 fault = VM_FAULT_BADMAP; 383 if (unlikely(!vma)) 384 goto out; 385 if (unlikely(vma->vm_start > addr)) 386 goto check_stack; 387 388 /* 389 * Ok, we have a good vm_area for this memory access, so we can handle 390 * it. 391 */ 392 good_area: 393 /* 394 * Check that the permissions on the VMA allow for the fault which 395 * occurred. 396 */ 397 if (!(vma->vm_flags & vm_flags)) { 398 fault = VM_FAULT_BADACCESS; 399 goto out; 400 } 401 402 return handle_mm_fault(vma, addr & PAGE_MASK, mm_flags); 403 404 check_stack: 405 if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr)) 406 goto good_area; 407 out: 408 return fault; 409 } 410 411 static bool is_el0_instruction_abort(unsigned int esr) 412 { 413 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW; 414 } 415 416 static int __kprobes do_page_fault(unsigned long addr, unsigned int esr, 417 struct pt_regs *regs) 418 { 419 struct task_struct *tsk; 420 struct mm_struct *mm; 421 struct siginfo si; 422 int fault, major = 0; 423 unsigned long vm_flags = VM_READ | VM_WRITE; 424 unsigned int mm_flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE; 425 426 if (notify_page_fault(regs, esr)) 427 return 0; 428 429 tsk = current; 430 mm = tsk->mm; 431 432 /* 433 * If we're in an interrupt or have no user context, we must not take 434 * the fault. 435 */ 436 if (faulthandler_disabled() || !mm) 437 goto no_context; 438 439 if (user_mode(regs)) 440 mm_flags |= FAULT_FLAG_USER; 441 442 if (is_el0_instruction_abort(esr)) { 443 vm_flags = VM_EXEC; 444 } else if ((esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM)) { 445 vm_flags = VM_WRITE; 446 mm_flags |= FAULT_FLAG_WRITE; 447 } 448 449 if (addr < TASK_SIZE && is_permission_fault(esr, regs, addr)) { 450 /* regs->orig_addr_limit may be 0 if we entered from EL0 */ 451 if (regs->orig_addr_limit == KERNEL_DS) 452 die("Accessing user space memory with fs=KERNEL_DS", regs, esr); 453 454 if (is_el1_instruction_abort(esr)) 455 die("Attempting to execute userspace memory", regs, esr); 456 457 if (!search_exception_tables(regs->pc)) 458 die("Accessing user space memory outside uaccess.h routines", regs, esr); 459 } 460 461 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); 462 463 /* 464 * As per x86, we may deadlock here. However, since the kernel only 465 * validly references user space from well defined areas of the code, 466 * we can bug out early if this is from code which shouldn't. 467 */ 468 if (!down_read_trylock(&mm->mmap_sem)) { 469 if (!user_mode(regs) && !search_exception_tables(regs->pc)) 470 goto no_context; 471 retry: 472 down_read(&mm->mmap_sem); 473 } else { 474 /* 475 * The above down_read_trylock() might have succeeded in which 476 * case, we'll have missed the might_sleep() from down_read(). 477 */ 478 might_sleep(); 479 #ifdef CONFIG_DEBUG_VM 480 if (!user_mode(regs) && !search_exception_tables(regs->pc)) 481 goto no_context; 482 #endif 483 } 484 485 fault = __do_page_fault(mm, addr, mm_flags, vm_flags, tsk); 486 major |= fault & VM_FAULT_MAJOR; 487 488 if (fault & VM_FAULT_RETRY) { 489 /* 490 * If we need to retry but a fatal signal is pending, 491 * handle the signal first. We do not need to release 492 * the mmap_sem because it would already be released 493 * in __lock_page_or_retry in mm/filemap.c. 494 */ 495 if (fatal_signal_pending(current)) { 496 if (!user_mode(regs)) 497 goto no_context; 498 return 0; 499 } 500 501 /* 502 * Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk of 503 * starvation. 504 */ 505 if (mm_flags & FAULT_FLAG_ALLOW_RETRY) { 506 mm_flags &= ~FAULT_FLAG_ALLOW_RETRY; 507 mm_flags |= FAULT_FLAG_TRIED; 508 goto retry; 509 } 510 } 511 up_read(&mm->mmap_sem); 512 513 /* 514 * Handle the "normal" (no error) case first. 515 */ 516 if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP | 517 VM_FAULT_BADACCESS)))) { 518 /* 519 * Major/minor page fault accounting is only done 520 * once. If we go through a retry, it is extremely 521 * likely that the page will be found in page cache at 522 * that point. 523 */ 524 if (major) { 525 tsk->maj_flt++; 526 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, 527 addr); 528 } else { 529 tsk->min_flt++; 530 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, 531 addr); 532 } 533 534 return 0; 535 } 536 537 /* 538 * If we are in kernel mode at this point, we have no context to 539 * handle this fault with. 540 */ 541 if (!user_mode(regs)) 542 goto no_context; 543 544 if (fault & VM_FAULT_OOM) { 545 /* 546 * We ran out of memory, call the OOM killer, and return to 547 * userspace (which will retry the fault, or kill us if we got 548 * oom-killed). 549 */ 550 pagefault_out_of_memory(); 551 return 0; 552 } 553 554 clear_siginfo(&si); 555 si.si_addr = (void __user *)addr; 556 557 if (fault & VM_FAULT_SIGBUS) { 558 /* 559 * We had some memory, but were unable to successfully fix up 560 * this page fault. 561 */ 562 si.si_signo = SIGBUS; 563 si.si_code = BUS_ADRERR; 564 } else if (fault & VM_FAULT_HWPOISON_LARGE) { 565 unsigned int hindex = VM_FAULT_GET_HINDEX(fault); 566 567 si.si_signo = SIGBUS; 568 si.si_code = BUS_MCEERR_AR; 569 si.si_addr_lsb = hstate_index_to_shift(hindex); 570 } else if (fault & VM_FAULT_HWPOISON) { 571 si.si_signo = SIGBUS; 572 si.si_code = BUS_MCEERR_AR; 573 si.si_addr_lsb = PAGE_SHIFT; 574 } else { 575 /* 576 * Something tried to access memory that isn't in our memory 577 * map. 578 */ 579 si.si_signo = SIGSEGV; 580 si.si_code = fault == VM_FAULT_BADACCESS ? 581 SEGV_ACCERR : SEGV_MAPERR; 582 } 583 584 __do_user_fault(&si, esr); 585 return 0; 586 587 no_context: 588 __do_kernel_fault(addr, esr, regs); 589 return 0; 590 } 591 592 static int __kprobes do_translation_fault(unsigned long addr, 593 unsigned int esr, 594 struct pt_regs *regs) 595 { 596 if (addr < TASK_SIZE) 597 return do_page_fault(addr, esr, regs); 598 599 do_bad_area(addr, esr, regs); 600 return 0; 601 } 602 603 static int do_alignment_fault(unsigned long addr, unsigned int esr, 604 struct pt_regs *regs) 605 { 606 do_bad_area(addr, esr, regs); 607 return 0; 608 } 609 610 static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs) 611 { 612 return 1; /* "fault" */ 613 } 614 615 static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs) 616 { 617 struct siginfo info; 618 const struct fault_info *inf; 619 620 inf = esr_to_fault_info(esr); 621 622 /* 623 * Synchronous aborts may interrupt code which had interrupts masked. 624 * Before calling out into the wider kernel tell the interested 625 * subsystems. 626 */ 627 if (IS_ENABLED(CONFIG_ACPI_APEI_SEA)) { 628 if (interrupts_enabled(regs)) 629 nmi_enter(); 630 631 ghes_notify_sea(); 632 633 if (interrupts_enabled(regs)) 634 nmi_exit(); 635 } 636 637 info.si_signo = inf->sig; 638 info.si_errno = 0; 639 info.si_code = inf->code; 640 if (esr & ESR_ELx_FnV) 641 info.si_addr = NULL; 642 else 643 info.si_addr = (void __user *)addr; 644 arm64_notify_die(inf->name, regs, &info, esr); 645 646 return 0; 647 } 648 649 static const struct fault_info fault_info[] = { 650 { do_bad, SIGKILL, SI_KERNEL, "ttbr address size fault" }, 651 { do_bad, SIGKILL, SI_KERNEL, "level 1 address size fault" }, 652 { do_bad, SIGKILL, SI_KERNEL, "level 2 address size fault" }, 653 { do_bad, SIGKILL, SI_KERNEL, "level 3 address size fault" }, 654 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" }, 655 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" }, 656 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" }, 657 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" }, 658 { do_bad, SIGKILL, SI_KERNEL, "unknown 8" }, 659 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" }, 660 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" }, 661 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" }, 662 { do_bad, SIGKILL, SI_KERNEL, "unknown 12" }, 663 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" }, 664 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" }, 665 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" }, 666 { do_sea, SIGBUS, BUS_OBJERR, "synchronous external abort" }, 667 { do_bad, SIGKILL, SI_KERNEL, "unknown 17" }, 668 { do_bad, SIGKILL, SI_KERNEL, "unknown 18" }, 669 { do_bad, SIGKILL, SI_KERNEL, "unknown 19" }, 670 { do_sea, SIGKILL, SI_KERNEL, "level 0 (translation table walk)" }, 671 { do_sea, SIGKILL, SI_KERNEL, "level 1 (translation table walk)" }, 672 { do_sea, SIGKILL, SI_KERNEL, "level 2 (translation table walk)" }, 673 { do_sea, SIGKILL, SI_KERNEL, "level 3 (translation table walk)" }, 674 { do_sea, SIGBUS, BUS_OBJERR, "synchronous parity or ECC error" }, // Reserved when RAS is implemented 675 { do_bad, SIGKILL, SI_KERNEL, "unknown 25" }, 676 { do_bad, SIGKILL, SI_KERNEL, "unknown 26" }, 677 { do_bad, SIGKILL, SI_KERNEL, "unknown 27" }, 678 { do_sea, SIGKILL, SI_KERNEL, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 679 { do_sea, SIGKILL, SI_KERNEL, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 680 { do_sea, SIGKILL, SI_KERNEL, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 681 { do_sea, SIGKILL, SI_KERNEL, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 682 { do_bad, SIGKILL, SI_KERNEL, "unknown 32" }, 683 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" }, 684 { do_bad, SIGKILL, SI_KERNEL, "unknown 34" }, 685 { do_bad, SIGKILL, SI_KERNEL, "unknown 35" }, 686 { do_bad, SIGKILL, SI_KERNEL, "unknown 36" }, 687 { do_bad, SIGKILL, SI_KERNEL, "unknown 37" }, 688 { do_bad, SIGKILL, SI_KERNEL, "unknown 38" }, 689 { do_bad, SIGKILL, SI_KERNEL, "unknown 39" }, 690 { do_bad, SIGKILL, SI_KERNEL, "unknown 40" }, 691 { do_bad, SIGKILL, SI_KERNEL, "unknown 41" }, 692 { do_bad, SIGKILL, SI_KERNEL, "unknown 42" }, 693 { do_bad, SIGKILL, SI_KERNEL, "unknown 43" }, 694 { do_bad, SIGKILL, SI_KERNEL, "unknown 44" }, 695 { do_bad, SIGKILL, SI_KERNEL, "unknown 45" }, 696 { do_bad, SIGKILL, SI_KERNEL, "unknown 46" }, 697 { do_bad, SIGKILL, SI_KERNEL, "unknown 47" }, 698 { do_bad, SIGKILL, SI_KERNEL, "TLB conflict abort" }, 699 { do_bad, SIGKILL, SI_KERNEL, "Unsupported atomic hardware update fault" }, 700 { do_bad, SIGKILL, SI_KERNEL, "unknown 50" }, 701 { do_bad, SIGKILL, SI_KERNEL, "unknown 51" }, 702 { do_bad, SIGKILL, SI_KERNEL, "implementation fault (lockdown abort)" }, 703 { do_bad, SIGBUS, BUS_OBJERR, "implementation fault (unsupported exclusive)" }, 704 { do_bad, SIGKILL, SI_KERNEL, "unknown 54" }, 705 { do_bad, SIGKILL, SI_KERNEL, "unknown 55" }, 706 { do_bad, SIGKILL, SI_KERNEL, "unknown 56" }, 707 { do_bad, SIGKILL, SI_KERNEL, "unknown 57" }, 708 { do_bad, SIGKILL, SI_KERNEL, "unknown 58" }, 709 { do_bad, SIGKILL, SI_KERNEL, "unknown 59" }, 710 { do_bad, SIGKILL, SI_KERNEL, "unknown 60" }, 711 { do_bad, SIGKILL, SI_KERNEL, "section domain fault" }, 712 { do_bad, SIGKILL, SI_KERNEL, "page domain fault" }, 713 { do_bad, SIGKILL, SI_KERNEL, "unknown 63" }, 714 }; 715 716 int handle_guest_sea(phys_addr_t addr, unsigned int esr) 717 { 718 int ret = -ENOENT; 719 720 if (IS_ENABLED(CONFIG_ACPI_APEI_SEA)) 721 ret = ghes_notify_sea(); 722 723 return ret; 724 } 725 726 asmlinkage void __exception do_mem_abort(unsigned long addr, unsigned int esr, 727 struct pt_regs *regs) 728 { 729 const struct fault_info *inf = esr_to_fault_info(esr); 730 struct siginfo info; 731 732 if (!inf->fn(addr, esr, regs)) 733 return; 734 735 if (!user_mode(regs)) { 736 pr_alert("Unhandled fault at 0x%016lx\n", addr); 737 mem_abort_decode(esr); 738 show_pte(addr); 739 } 740 741 info.si_signo = inf->sig; 742 info.si_errno = 0; 743 info.si_code = inf->code; 744 info.si_addr = (void __user *)addr; 745 arm64_notify_die(inf->name, regs, &info, esr); 746 } 747 748 asmlinkage void __exception do_el0_irq_bp_hardening(void) 749 { 750 /* PC has already been checked in entry.S */ 751 arm64_apply_bp_hardening(); 752 } 753 754 asmlinkage void __exception do_el0_ia_bp_hardening(unsigned long addr, 755 unsigned int esr, 756 struct pt_regs *regs) 757 { 758 /* 759 * We've taken an instruction abort from userspace and not yet 760 * re-enabled IRQs. If the address is a kernel address, apply 761 * BP hardening prior to enabling IRQs and pre-emption. 762 */ 763 if (addr > TASK_SIZE) 764 arm64_apply_bp_hardening(); 765 766 local_irq_enable(); 767 do_mem_abort(addr, esr, regs); 768 } 769 770 771 asmlinkage void __exception do_sp_pc_abort(unsigned long addr, 772 unsigned int esr, 773 struct pt_regs *regs) 774 { 775 struct siginfo info; 776 777 if (user_mode(regs)) { 778 if (instruction_pointer(regs) > TASK_SIZE) 779 arm64_apply_bp_hardening(); 780 local_irq_enable(); 781 } 782 783 info.si_signo = SIGBUS; 784 info.si_errno = 0; 785 info.si_code = BUS_ADRALN; 786 info.si_addr = (void __user *)addr; 787 arm64_notify_die("SP/PC alignment exception", regs, &info, esr); 788 } 789 790 int __init early_brk64(unsigned long addr, unsigned int esr, 791 struct pt_regs *regs); 792 793 /* 794 * __refdata because early_brk64 is __init, but the reference to it is 795 * clobbered at arch_initcall time. 796 * See traps.c and debug-monitors.c:debug_traps_init(). 797 */ 798 static struct fault_info __refdata debug_fault_info[] = { 799 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" }, 800 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" }, 801 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" }, 802 { do_bad, SIGKILL, SI_KERNEL, "unknown 3" }, 803 { do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" }, 804 { do_bad, SIGKILL, SI_KERNEL, "aarch32 vector catch" }, 805 { early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" }, 806 { do_bad, SIGKILL, SI_KERNEL, "unknown 7" }, 807 }; 808 809 void __init hook_debug_fault_code(int nr, 810 int (*fn)(unsigned long, unsigned int, struct pt_regs *), 811 int sig, int code, const char *name) 812 { 813 BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info)); 814 815 debug_fault_info[nr].fn = fn; 816 debug_fault_info[nr].sig = sig; 817 debug_fault_info[nr].code = code; 818 debug_fault_info[nr].name = name; 819 } 820 821 asmlinkage int __exception do_debug_exception(unsigned long addr, 822 unsigned int esr, 823 struct pt_regs *regs) 824 { 825 const struct fault_info *inf = debug_fault_info + DBG_ESR_EVT(esr); 826 struct siginfo info; 827 int rv; 828 829 /* 830 * Tell lockdep we disabled irqs in entry.S. Do nothing if they were 831 * already disabled to preserve the last enabled/disabled addresses. 832 */ 833 if (interrupts_enabled(regs)) 834 trace_hardirqs_off(); 835 836 if (user_mode(regs) && instruction_pointer(regs) > TASK_SIZE) 837 arm64_apply_bp_hardening(); 838 839 if (!inf->fn(addr, esr, regs)) { 840 rv = 1; 841 } else { 842 info.si_signo = inf->sig; 843 info.si_errno = 0; 844 info.si_code = inf->code; 845 info.si_addr = (void __user *)addr; 846 arm64_notify_die(inf->name, regs, &info, esr); 847 rv = 0; 848 } 849 850 if (interrupts_enabled(regs)) 851 trace_hardirqs_on(); 852 853 return rv; 854 } 855 NOKPROBE_SYMBOL(do_debug_exception); 856 857 #ifdef CONFIG_ARM64_PAN 858 void cpu_enable_pan(const struct arm64_cpu_capabilities *__unused) 859 { 860 /* 861 * We modify PSTATE. This won't work from irq context as the PSTATE 862 * is discarded once we return from the exception. 863 */ 864 WARN_ON_ONCE(in_interrupt()); 865 866 config_sctlr_el1(SCTLR_EL1_SPAN, 0); 867 asm(SET_PSTATE_PAN(1)); 868 } 869 #endif /* CONFIG_ARM64_PAN */ 870