xref: /openbmc/linux/arch/arm64/mm/fault.c (revision 6aeadf78)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Based on arch/arm/mm/fault.c
4  *
5  * Copyright (C) 1995  Linus Torvalds
6  * Copyright (C) 1995-2004 Russell King
7  * Copyright (C) 2012 ARM Ltd.
8  */
9 
10 #include <linux/acpi.h>
11 #include <linux/bitfield.h>
12 #include <linux/extable.h>
13 #include <linux/kfence.h>
14 #include <linux/signal.h>
15 #include <linux/mm.h>
16 #include <linux/hardirq.h>
17 #include <linux/init.h>
18 #include <linux/kasan.h>
19 #include <linux/kprobes.h>
20 #include <linux/uaccess.h>
21 #include <linux/page-flags.h>
22 #include <linux/sched/signal.h>
23 #include <linux/sched/debug.h>
24 #include <linux/highmem.h>
25 #include <linux/perf_event.h>
26 #include <linux/preempt.h>
27 #include <linux/hugetlb.h>
28 
29 #include <asm/acpi.h>
30 #include <asm/bug.h>
31 #include <asm/cmpxchg.h>
32 #include <asm/cpufeature.h>
33 #include <asm/efi.h>
34 #include <asm/exception.h>
35 #include <asm/daifflags.h>
36 #include <asm/debug-monitors.h>
37 #include <asm/esr.h>
38 #include <asm/kprobes.h>
39 #include <asm/mte.h>
40 #include <asm/processor.h>
41 #include <asm/sysreg.h>
42 #include <asm/system_misc.h>
43 #include <asm/tlbflush.h>
44 #include <asm/traps.h>
45 
46 struct fault_info {
47 	int	(*fn)(unsigned long far, unsigned long esr,
48 		      struct pt_regs *regs);
49 	int	sig;
50 	int	code;
51 	const char *name;
52 };
53 
54 static const struct fault_info fault_info[];
55 static struct fault_info debug_fault_info[];
56 
57 static inline const struct fault_info *esr_to_fault_info(unsigned long esr)
58 {
59 	return fault_info + (esr & ESR_ELx_FSC);
60 }
61 
62 static inline const struct fault_info *esr_to_debug_fault_info(unsigned long esr)
63 {
64 	return debug_fault_info + DBG_ESR_EVT(esr);
65 }
66 
67 static void data_abort_decode(unsigned long esr)
68 {
69 	unsigned long iss2 = ESR_ELx_ISS2(esr);
70 
71 	pr_alert("Data abort info:\n");
72 
73 	if (esr & ESR_ELx_ISV) {
74 		pr_alert("  Access size = %u byte(s)\n",
75 			 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT));
76 		pr_alert("  SSE = %lu, SRT = %lu\n",
77 			 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT,
78 			 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT);
79 		pr_alert("  SF = %lu, AR = %lu\n",
80 			 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT,
81 			 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT);
82 	} else {
83 		pr_alert("  ISV = 0, ISS = 0x%08lx, ISS2 = 0x%08lx\n",
84 			 esr & ESR_ELx_ISS_MASK, iss2);
85 	}
86 
87 	pr_alert("  CM = %lu, WnR = %lu, TnD = %lu, TagAccess = %lu\n",
88 		 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT,
89 		 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT,
90 		 (iss2 & ESR_ELx_TnD) >> ESR_ELx_TnD_SHIFT,
91 		 (iss2 & ESR_ELx_TagAccess) >> ESR_ELx_TagAccess_SHIFT);
92 
93 	pr_alert("  GCS = %ld, Overlay = %lu, DirtyBit = %lu, Xs = %llu\n",
94 		 (iss2 & ESR_ELx_GCS) >> ESR_ELx_GCS_SHIFT,
95 		 (iss2 & ESR_ELx_Overlay) >> ESR_ELx_Overlay_SHIFT,
96 		 (iss2 & ESR_ELx_DirtyBit) >> ESR_ELx_DirtyBit_SHIFT,
97 		 (iss2 & ESR_ELx_Xs_MASK) >> ESR_ELx_Xs_SHIFT);
98 }
99 
100 static void mem_abort_decode(unsigned long esr)
101 {
102 	pr_alert("Mem abort info:\n");
103 
104 	pr_alert("  ESR = 0x%016lx\n", esr);
105 	pr_alert("  EC = 0x%02lx: %s, IL = %u bits\n",
106 		 ESR_ELx_EC(esr), esr_get_class_string(esr),
107 		 (esr & ESR_ELx_IL) ? 32 : 16);
108 	pr_alert("  SET = %lu, FnV = %lu\n",
109 		 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT,
110 		 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT);
111 	pr_alert("  EA = %lu, S1PTW = %lu\n",
112 		 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT,
113 		 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT);
114 	pr_alert("  FSC = 0x%02lx: %s\n", (esr & ESR_ELx_FSC),
115 		 esr_to_fault_info(esr)->name);
116 
117 	if (esr_is_data_abort(esr))
118 		data_abort_decode(esr);
119 }
120 
121 static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm)
122 {
123 	/* Either init_pg_dir or swapper_pg_dir */
124 	if (mm == &init_mm)
125 		return __pa_symbol(mm->pgd);
126 
127 	return (unsigned long)virt_to_phys(mm->pgd);
128 }
129 
130 /*
131  * Dump out the page tables associated with 'addr' in the currently active mm.
132  */
133 static void show_pte(unsigned long addr)
134 {
135 	struct mm_struct *mm;
136 	pgd_t *pgdp;
137 	pgd_t pgd;
138 
139 	if (is_ttbr0_addr(addr)) {
140 		/* TTBR0 */
141 		mm = current->active_mm;
142 		if (mm == &init_mm) {
143 			pr_alert("[%016lx] user address but active_mm is swapper\n",
144 				 addr);
145 			return;
146 		}
147 	} else if (is_ttbr1_addr(addr)) {
148 		/* TTBR1 */
149 		mm = &init_mm;
150 	} else {
151 		pr_alert("[%016lx] address between user and kernel address ranges\n",
152 			 addr);
153 		return;
154 	}
155 
156 	pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n",
157 		 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K,
158 		 vabits_actual, mm_to_pgd_phys(mm));
159 	pgdp = pgd_offset(mm, addr);
160 	pgd = READ_ONCE(*pgdp);
161 	pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd));
162 
163 	do {
164 		p4d_t *p4dp, p4d;
165 		pud_t *pudp, pud;
166 		pmd_t *pmdp, pmd;
167 		pte_t *ptep, pte;
168 
169 		if (pgd_none(pgd) || pgd_bad(pgd))
170 			break;
171 
172 		p4dp = p4d_offset(pgdp, addr);
173 		p4d = READ_ONCE(*p4dp);
174 		pr_cont(", p4d=%016llx", p4d_val(p4d));
175 		if (p4d_none(p4d) || p4d_bad(p4d))
176 			break;
177 
178 		pudp = pud_offset(p4dp, addr);
179 		pud = READ_ONCE(*pudp);
180 		pr_cont(", pud=%016llx", pud_val(pud));
181 		if (pud_none(pud) || pud_bad(pud))
182 			break;
183 
184 		pmdp = pmd_offset(pudp, addr);
185 		pmd = READ_ONCE(*pmdp);
186 		pr_cont(", pmd=%016llx", pmd_val(pmd));
187 		if (pmd_none(pmd) || pmd_bad(pmd))
188 			break;
189 
190 		ptep = pte_offset_map(pmdp, addr);
191 		pte = READ_ONCE(*ptep);
192 		pr_cont(", pte=%016llx", pte_val(pte));
193 		pte_unmap(ptep);
194 	} while(0);
195 
196 	pr_cont("\n");
197 }
198 
199 /*
200  * This function sets the access flags (dirty, accessed), as well as write
201  * permission, and only to a more permissive setting.
202  *
203  * It needs to cope with hardware update of the accessed/dirty state by other
204  * agents in the system and can safely skip the __sync_icache_dcache() call as,
205  * like set_pte_at(), the PTE is never changed from no-exec to exec here.
206  *
207  * Returns whether or not the PTE actually changed.
208  */
209 int ptep_set_access_flags(struct vm_area_struct *vma,
210 			  unsigned long address, pte_t *ptep,
211 			  pte_t entry, int dirty)
212 {
213 	pteval_t old_pteval, pteval;
214 	pte_t pte = READ_ONCE(*ptep);
215 
216 	if (pte_same(pte, entry))
217 		return 0;
218 
219 	/* only preserve the access flags and write permission */
220 	pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY;
221 
222 	/*
223 	 * Setting the flags must be done atomically to avoid racing with the
224 	 * hardware update of the access/dirty state. The PTE_RDONLY bit must
225 	 * be set to the most permissive (lowest value) of *ptep and entry
226 	 * (calculated as: a & b == ~(~a | ~b)).
227 	 */
228 	pte_val(entry) ^= PTE_RDONLY;
229 	pteval = pte_val(pte);
230 	do {
231 		old_pteval = pteval;
232 		pteval ^= PTE_RDONLY;
233 		pteval |= pte_val(entry);
234 		pteval ^= PTE_RDONLY;
235 		pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);
236 	} while (pteval != old_pteval);
237 
238 	/* Invalidate a stale read-only entry */
239 	if (dirty)
240 		flush_tlb_page(vma, address);
241 	return 1;
242 }
243 
244 static bool is_el1_instruction_abort(unsigned long esr)
245 {
246 	return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR;
247 }
248 
249 static bool is_el1_data_abort(unsigned long esr)
250 {
251 	return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_CUR;
252 }
253 
254 static inline bool is_el1_permission_fault(unsigned long addr, unsigned long esr,
255 					   struct pt_regs *regs)
256 {
257 	unsigned long fsc_type = esr & ESR_ELx_FSC_TYPE;
258 
259 	if (!is_el1_data_abort(esr) && !is_el1_instruction_abort(esr))
260 		return false;
261 
262 	if (fsc_type == ESR_ELx_FSC_PERM)
263 		return true;
264 
265 	if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan())
266 		return fsc_type == ESR_ELx_FSC_FAULT &&
267 			(regs->pstate & PSR_PAN_BIT);
268 
269 	return false;
270 }
271 
272 static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr,
273 							unsigned long esr,
274 							struct pt_regs *regs)
275 {
276 	unsigned long flags;
277 	u64 par, dfsc;
278 
279 	if (!is_el1_data_abort(esr) ||
280 	    (esr & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT)
281 		return false;
282 
283 	local_irq_save(flags);
284 	asm volatile("at s1e1r, %0" :: "r" (addr));
285 	isb();
286 	par = read_sysreg_par();
287 	local_irq_restore(flags);
288 
289 	/*
290 	 * If we now have a valid translation, treat the translation fault as
291 	 * spurious.
292 	 */
293 	if (!(par & SYS_PAR_EL1_F))
294 		return true;
295 
296 	/*
297 	 * If we got a different type of fault from the AT instruction,
298 	 * treat the translation fault as spurious.
299 	 */
300 	dfsc = FIELD_GET(SYS_PAR_EL1_FST, par);
301 	return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT;
302 }
303 
304 static void die_kernel_fault(const char *msg, unsigned long addr,
305 			     unsigned long esr, struct pt_regs *regs)
306 {
307 	bust_spinlocks(1);
308 
309 	pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg,
310 		 addr);
311 
312 	kasan_non_canonical_hook(addr);
313 
314 	mem_abort_decode(esr);
315 
316 	show_pte(addr);
317 	die("Oops", regs, esr);
318 	bust_spinlocks(0);
319 	make_task_dead(SIGKILL);
320 }
321 
322 #ifdef CONFIG_KASAN_HW_TAGS
323 static void report_tag_fault(unsigned long addr, unsigned long esr,
324 			     struct pt_regs *regs)
325 {
326 	/*
327 	 * SAS bits aren't set for all faults reported in EL1, so we can't
328 	 * find out access size.
329 	 */
330 	bool is_write = !!(esr & ESR_ELx_WNR);
331 	kasan_report(addr, 0, is_write, regs->pc);
332 }
333 #else
334 /* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */
335 static inline void report_tag_fault(unsigned long addr, unsigned long esr,
336 				    struct pt_regs *regs) { }
337 #endif
338 
339 static void do_tag_recovery(unsigned long addr, unsigned long esr,
340 			   struct pt_regs *regs)
341 {
342 
343 	report_tag_fault(addr, esr, regs);
344 
345 	/*
346 	 * Disable MTE Tag Checking on the local CPU for the current EL.
347 	 * It will be done lazily on the other CPUs when they will hit a
348 	 * tag fault.
349 	 */
350 	sysreg_clear_set(sctlr_el1, SCTLR_EL1_TCF_MASK,
351 			 SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF, NONE));
352 	isb();
353 }
354 
355 static bool is_el1_mte_sync_tag_check_fault(unsigned long esr)
356 {
357 	unsigned long fsc = esr & ESR_ELx_FSC;
358 
359 	if (!is_el1_data_abort(esr))
360 		return false;
361 
362 	if (fsc == ESR_ELx_FSC_MTE)
363 		return true;
364 
365 	return false;
366 }
367 
368 static bool is_translation_fault(unsigned long esr)
369 {
370 	return (esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_FAULT;
371 }
372 
373 static void __do_kernel_fault(unsigned long addr, unsigned long esr,
374 			      struct pt_regs *regs)
375 {
376 	const char *msg;
377 
378 	/*
379 	 * Are we prepared to handle this kernel fault?
380 	 * We are almost certainly not prepared to handle instruction faults.
381 	 */
382 	if (!is_el1_instruction_abort(esr) && fixup_exception(regs))
383 		return;
384 
385 	if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs),
386 	    "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr))
387 		return;
388 
389 	if (is_el1_mte_sync_tag_check_fault(esr)) {
390 		do_tag_recovery(addr, esr, regs);
391 
392 		return;
393 	}
394 
395 	if (is_el1_permission_fault(addr, esr, regs)) {
396 		if (esr & ESR_ELx_WNR)
397 			msg = "write to read-only memory";
398 		else if (is_el1_instruction_abort(esr))
399 			msg = "execute from non-executable memory";
400 		else
401 			msg = "read from unreadable memory";
402 	} else if (addr < PAGE_SIZE) {
403 		msg = "NULL pointer dereference";
404 	} else {
405 		if (is_translation_fault(esr) &&
406 		    kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs))
407 			return;
408 
409 		msg = "paging request";
410 	}
411 
412 	if (efi_runtime_fixup_exception(regs, msg))
413 		return;
414 
415 	die_kernel_fault(msg, addr, esr, regs);
416 }
417 
418 static void set_thread_esr(unsigned long address, unsigned long esr)
419 {
420 	current->thread.fault_address = address;
421 
422 	/*
423 	 * If the faulting address is in the kernel, we must sanitize the ESR.
424 	 * From userspace's point of view, kernel-only mappings don't exist
425 	 * at all, so we report them as level 0 translation faults.
426 	 * (This is not quite the way that "no mapping there at all" behaves:
427 	 * an alignment fault not caused by the memory type would take
428 	 * precedence over translation fault for a real access to empty
429 	 * space. Unfortunately we can't easily distinguish "alignment fault
430 	 * not caused by memory type" from "alignment fault caused by memory
431 	 * type", so we ignore this wrinkle and just return the translation
432 	 * fault.)
433 	 */
434 	if (!is_ttbr0_addr(current->thread.fault_address)) {
435 		switch (ESR_ELx_EC(esr)) {
436 		case ESR_ELx_EC_DABT_LOW:
437 			/*
438 			 * These bits provide only information about the
439 			 * faulting instruction, which userspace knows already.
440 			 * We explicitly clear bits which are architecturally
441 			 * RES0 in case they are given meanings in future.
442 			 * We always report the ESR as if the fault was taken
443 			 * to EL1 and so ISV and the bits in ISS[23:14] are
444 			 * clear. (In fact it always will be a fault to EL1.)
445 			 */
446 			esr &= ESR_ELx_EC_MASK | ESR_ELx_IL |
447 				ESR_ELx_CM | ESR_ELx_WNR;
448 			esr |= ESR_ELx_FSC_FAULT;
449 			break;
450 		case ESR_ELx_EC_IABT_LOW:
451 			/*
452 			 * Claim a level 0 translation fault.
453 			 * All other bits are architecturally RES0 for faults
454 			 * reported with that DFSC value, so we clear them.
455 			 */
456 			esr &= ESR_ELx_EC_MASK | ESR_ELx_IL;
457 			esr |= ESR_ELx_FSC_FAULT;
458 			break;
459 		default:
460 			/*
461 			 * This should never happen (entry.S only brings us
462 			 * into this code for insn and data aborts from a lower
463 			 * exception level). Fail safe by not providing an ESR
464 			 * context record at all.
465 			 */
466 			WARN(1, "ESR 0x%lx is not DABT or IABT from EL0\n", esr);
467 			esr = 0;
468 			break;
469 		}
470 	}
471 
472 	current->thread.fault_code = esr;
473 }
474 
475 static void do_bad_area(unsigned long far, unsigned long esr,
476 			struct pt_regs *regs)
477 {
478 	unsigned long addr = untagged_addr(far);
479 
480 	/*
481 	 * If we are in kernel mode at this point, we have no context to
482 	 * handle this fault with.
483 	 */
484 	if (user_mode(regs)) {
485 		const struct fault_info *inf = esr_to_fault_info(esr);
486 
487 		set_thread_esr(addr, esr);
488 		arm64_force_sig_fault(inf->sig, inf->code, far, inf->name);
489 	} else {
490 		__do_kernel_fault(addr, esr, regs);
491 	}
492 }
493 
494 #define VM_FAULT_BADMAP		((__force vm_fault_t)0x010000)
495 #define VM_FAULT_BADACCESS	((__force vm_fault_t)0x020000)
496 
497 static vm_fault_t __do_page_fault(struct mm_struct *mm, unsigned long addr,
498 				  unsigned int mm_flags, unsigned long vm_flags,
499 				  struct pt_regs *regs)
500 {
501 	struct vm_area_struct *vma = find_vma(mm, addr);
502 
503 	if (unlikely(!vma))
504 		return VM_FAULT_BADMAP;
505 
506 	/*
507 	 * Ok, we have a good vm_area for this memory access, so we can handle
508 	 * it.
509 	 */
510 	if (unlikely(vma->vm_start > addr)) {
511 		if (!(vma->vm_flags & VM_GROWSDOWN))
512 			return VM_FAULT_BADMAP;
513 		if (expand_stack(vma, addr))
514 			return VM_FAULT_BADMAP;
515 	}
516 
517 	/*
518 	 * Check that the permissions on the VMA allow for the fault which
519 	 * occurred.
520 	 */
521 	if (!(vma->vm_flags & vm_flags))
522 		return VM_FAULT_BADACCESS;
523 	return handle_mm_fault(vma, addr, mm_flags, regs);
524 }
525 
526 static bool is_el0_instruction_abort(unsigned long esr)
527 {
528 	return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
529 }
530 
531 /*
532  * Note: not valid for EL1 DC IVAC, but we never use that such that it
533  * should fault. EL0 cannot issue DC IVAC (undef).
534  */
535 static bool is_write_abort(unsigned long esr)
536 {
537 	return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM);
538 }
539 
540 static int __kprobes do_page_fault(unsigned long far, unsigned long esr,
541 				   struct pt_regs *regs)
542 {
543 	const struct fault_info *inf;
544 	struct mm_struct *mm = current->mm;
545 	vm_fault_t fault;
546 	unsigned long vm_flags;
547 	unsigned int mm_flags = FAULT_FLAG_DEFAULT;
548 	unsigned long addr = untagged_addr(far);
549 #ifdef CONFIG_PER_VMA_LOCK
550 	struct vm_area_struct *vma;
551 #endif
552 
553 	if (kprobe_page_fault(regs, esr))
554 		return 0;
555 
556 	/*
557 	 * If we're in an interrupt or have no user context, we must not take
558 	 * the fault.
559 	 */
560 	if (faulthandler_disabled() || !mm)
561 		goto no_context;
562 
563 	if (user_mode(regs))
564 		mm_flags |= FAULT_FLAG_USER;
565 
566 	/*
567 	 * vm_flags tells us what bits we must have in vma->vm_flags
568 	 * for the fault to be benign, __do_page_fault() would check
569 	 * vma->vm_flags & vm_flags and returns an error if the
570 	 * intersection is empty
571 	 */
572 	if (is_el0_instruction_abort(esr)) {
573 		/* It was exec fault */
574 		vm_flags = VM_EXEC;
575 		mm_flags |= FAULT_FLAG_INSTRUCTION;
576 	} else if (is_write_abort(esr)) {
577 		/* It was write fault */
578 		vm_flags = VM_WRITE;
579 		mm_flags |= FAULT_FLAG_WRITE;
580 	} else {
581 		/* It was read fault */
582 		vm_flags = VM_READ;
583 		/* Write implies read */
584 		vm_flags |= VM_WRITE;
585 		/* If EPAN is absent then exec implies read */
586 		if (!cpus_have_const_cap(ARM64_HAS_EPAN))
587 			vm_flags |= VM_EXEC;
588 	}
589 
590 	if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) {
591 		if (is_el1_instruction_abort(esr))
592 			die_kernel_fault("execution of user memory",
593 					 addr, esr, regs);
594 
595 		if (!search_exception_tables(regs->pc))
596 			die_kernel_fault("access to user memory outside uaccess routines",
597 					 addr, esr, regs);
598 	}
599 
600 	perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
601 
602 #ifdef CONFIG_PER_VMA_LOCK
603 	if (!(mm_flags & FAULT_FLAG_USER))
604 		goto lock_mmap;
605 
606 	vma = lock_vma_under_rcu(mm, addr);
607 	if (!vma)
608 		goto lock_mmap;
609 
610 	if (!(vma->vm_flags & vm_flags)) {
611 		vma_end_read(vma);
612 		goto lock_mmap;
613 	}
614 	fault = handle_mm_fault(vma, addr, mm_flags | FAULT_FLAG_VMA_LOCK, regs);
615 	vma_end_read(vma);
616 
617 	if (!(fault & VM_FAULT_RETRY)) {
618 		count_vm_vma_lock_event(VMA_LOCK_SUCCESS);
619 		goto done;
620 	}
621 	count_vm_vma_lock_event(VMA_LOCK_RETRY);
622 
623 	/* Quick path to respond to signals */
624 	if (fault_signal_pending(fault, regs)) {
625 		if (!user_mode(regs))
626 			goto no_context;
627 		return 0;
628 	}
629 lock_mmap:
630 #endif /* CONFIG_PER_VMA_LOCK */
631 	/*
632 	 * As per x86, we may deadlock here. However, since the kernel only
633 	 * validly references user space from well defined areas of the code,
634 	 * we can bug out early if this is from code which shouldn't.
635 	 */
636 	if (!mmap_read_trylock(mm)) {
637 		if (!user_mode(regs) && !search_exception_tables(regs->pc))
638 			goto no_context;
639 retry:
640 		mmap_read_lock(mm);
641 	} else {
642 		/*
643 		 * The above mmap_read_trylock() might have succeeded in which
644 		 * case, we'll have missed the might_sleep() from down_read().
645 		 */
646 		might_sleep();
647 #ifdef CONFIG_DEBUG_VM
648 		if (!user_mode(regs) && !search_exception_tables(regs->pc)) {
649 			mmap_read_unlock(mm);
650 			goto no_context;
651 		}
652 #endif
653 	}
654 
655 	fault = __do_page_fault(mm, addr, mm_flags, vm_flags, regs);
656 
657 	/* Quick path to respond to signals */
658 	if (fault_signal_pending(fault, regs)) {
659 		if (!user_mode(regs))
660 			goto no_context;
661 		return 0;
662 	}
663 
664 	/* The fault is fully completed (including releasing mmap lock) */
665 	if (fault & VM_FAULT_COMPLETED)
666 		return 0;
667 
668 	if (fault & VM_FAULT_RETRY) {
669 		mm_flags |= FAULT_FLAG_TRIED;
670 		goto retry;
671 	}
672 	mmap_read_unlock(mm);
673 
674 #ifdef CONFIG_PER_VMA_LOCK
675 done:
676 #endif
677 	/*
678 	 * Handle the "normal" (no error) case first.
679 	 */
680 	if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP |
681 			      VM_FAULT_BADACCESS))))
682 		return 0;
683 
684 	/*
685 	 * If we are in kernel mode at this point, we have no context to
686 	 * handle this fault with.
687 	 */
688 	if (!user_mode(regs))
689 		goto no_context;
690 
691 	if (fault & VM_FAULT_OOM) {
692 		/*
693 		 * We ran out of memory, call the OOM killer, and return to
694 		 * userspace (which will retry the fault, or kill us if we got
695 		 * oom-killed).
696 		 */
697 		pagefault_out_of_memory();
698 		return 0;
699 	}
700 
701 	inf = esr_to_fault_info(esr);
702 	set_thread_esr(addr, esr);
703 	if (fault & VM_FAULT_SIGBUS) {
704 		/*
705 		 * We had some memory, but were unable to successfully fix up
706 		 * this page fault.
707 		 */
708 		arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name);
709 	} else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) {
710 		unsigned int lsb;
711 
712 		lsb = PAGE_SHIFT;
713 		if (fault & VM_FAULT_HWPOISON_LARGE)
714 			lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
715 
716 		arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name);
717 	} else {
718 		/*
719 		 * Something tried to access memory that isn't in our memory
720 		 * map.
721 		 */
722 		arm64_force_sig_fault(SIGSEGV,
723 				      fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR,
724 				      far, inf->name);
725 	}
726 
727 	return 0;
728 
729 no_context:
730 	__do_kernel_fault(addr, esr, regs);
731 	return 0;
732 }
733 
734 static int __kprobes do_translation_fault(unsigned long far,
735 					  unsigned long esr,
736 					  struct pt_regs *regs)
737 {
738 	unsigned long addr = untagged_addr(far);
739 
740 	if (is_ttbr0_addr(addr))
741 		return do_page_fault(far, esr, regs);
742 
743 	do_bad_area(far, esr, regs);
744 	return 0;
745 }
746 
747 static int do_alignment_fault(unsigned long far, unsigned long esr,
748 			      struct pt_regs *regs)
749 {
750 	if (IS_ENABLED(CONFIG_COMPAT_ALIGNMENT_FIXUPS) &&
751 	    compat_user_mode(regs))
752 		return do_compat_alignment_fixup(far, regs);
753 	do_bad_area(far, esr, regs);
754 	return 0;
755 }
756 
757 static int do_bad(unsigned long far, unsigned long esr, struct pt_regs *regs)
758 {
759 	return 1; /* "fault" */
760 }
761 
762 static int do_sea(unsigned long far, unsigned long esr, struct pt_regs *regs)
763 {
764 	const struct fault_info *inf;
765 	unsigned long siaddr;
766 
767 	inf = esr_to_fault_info(esr);
768 
769 	if (user_mode(regs) && apei_claim_sea(regs) == 0) {
770 		/*
771 		 * APEI claimed this as a firmware-first notification.
772 		 * Some processing deferred to task_work before ret_to_user().
773 		 */
774 		return 0;
775 	}
776 
777 	if (esr & ESR_ELx_FnV) {
778 		siaddr = 0;
779 	} else {
780 		/*
781 		 * The architecture specifies that the tag bits of FAR_EL1 are
782 		 * UNKNOWN for synchronous external aborts. Mask them out now
783 		 * so that userspace doesn't see them.
784 		 */
785 		siaddr  = untagged_addr(far);
786 	}
787 	arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr);
788 
789 	return 0;
790 }
791 
792 static int do_tag_check_fault(unsigned long far, unsigned long esr,
793 			      struct pt_regs *regs)
794 {
795 	/*
796 	 * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN
797 	 * for tag check faults. Set them to corresponding bits in the untagged
798 	 * address.
799 	 */
800 	far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
801 	do_bad_area(far, esr, regs);
802 	return 0;
803 }
804 
805 static const struct fault_info fault_info[] = {
806 	{ do_bad,		SIGKILL, SI_KERNEL,	"ttbr address size fault"	},
807 	{ do_bad,		SIGKILL, SI_KERNEL,	"level 1 address size fault"	},
808 	{ do_bad,		SIGKILL, SI_KERNEL,	"level 2 address size fault"	},
809 	{ do_bad,		SIGKILL, SI_KERNEL,	"level 3 address size fault"	},
810 	{ do_translation_fault,	SIGSEGV, SEGV_MAPERR,	"level 0 translation fault"	},
811 	{ do_translation_fault,	SIGSEGV, SEGV_MAPERR,	"level 1 translation fault"	},
812 	{ do_translation_fault,	SIGSEGV, SEGV_MAPERR,	"level 2 translation fault"	},
813 	{ do_translation_fault,	SIGSEGV, SEGV_MAPERR,	"level 3 translation fault"	},
814 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 8"			},
815 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 1 access flag fault"	},
816 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 2 access flag fault"	},
817 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 3 access flag fault"	},
818 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 12"			},
819 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 1 permission fault"	},
820 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 2 permission fault"	},
821 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 3 permission fault"	},
822 	{ do_sea,		SIGBUS,  BUS_OBJERR,	"synchronous external abort"	},
823 	{ do_tag_check_fault,	SIGSEGV, SEGV_MTESERR,	"synchronous tag check fault"	},
824 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 18"			},
825 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 19"			},
826 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 0 (translation table walk)"	},
827 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 1 (translation table walk)"	},
828 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 2 (translation table walk)"	},
829 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 3 (translation table walk)"	},
830 	{ do_sea,		SIGBUS,  BUS_OBJERR,	"synchronous parity or ECC error" },	// Reserved when RAS is implemented
831 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 25"			},
832 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 26"			},
833 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 27"			},
834 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 0 synchronous parity error (translation table walk)"	},	// Reserved when RAS is implemented
835 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 1 synchronous parity error (translation table walk)"	},	// Reserved when RAS is implemented
836 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 2 synchronous parity error (translation table walk)"	},	// Reserved when RAS is implemented
837 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 3 synchronous parity error (translation table walk)"	},	// Reserved when RAS is implemented
838 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 32"			},
839 	{ do_alignment_fault,	SIGBUS,  BUS_ADRALN,	"alignment fault"		},
840 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 34"			},
841 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 35"			},
842 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 36"			},
843 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 37"			},
844 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 38"			},
845 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 39"			},
846 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 40"			},
847 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 41"			},
848 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 42"			},
849 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 43"			},
850 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 44"			},
851 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 45"			},
852 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 46"			},
853 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 47"			},
854 	{ do_bad,		SIGKILL, SI_KERNEL,	"TLB conflict abort"		},
855 	{ do_bad,		SIGKILL, SI_KERNEL,	"Unsupported atomic hardware update fault"	},
856 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 50"			},
857 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 51"			},
858 	{ do_bad,		SIGKILL, SI_KERNEL,	"implementation fault (lockdown abort)" },
859 	{ do_bad,		SIGBUS,  BUS_OBJERR,	"implementation fault (unsupported exclusive)" },
860 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 54"			},
861 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 55"			},
862 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 56"			},
863 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 57"			},
864 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 58" 			},
865 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 59"			},
866 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 60"			},
867 	{ do_bad,		SIGKILL, SI_KERNEL,	"section domain fault"		},
868 	{ do_bad,		SIGKILL, SI_KERNEL,	"page domain fault"		},
869 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 63"			},
870 };
871 
872 void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs)
873 {
874 	const struct fault_info *inf = esr_to_fault_info(esr);
875 	unsigned long addr = untagged_addr(far);
876 
877 	if (!inf->fn(far, esr, regs))
878 		return;
879 
880 	if (!user_mode(regs))
881 		die_kernel_fault(inf->name, addr, esr, regs);
882 
883 	/*
884 	 * At this point we have an unrecognized fault type whose tag bits may
885 	 * have been defined as UNKNOWN. Therefore we only expose the untagged
886 	 * address to the signal handler.
887 	 */
888 	arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr);
889 }
890 NOKPROBE_SYMBOL(do_mem_abort);
891 
892 void do_sp_pc_abort(unsigned long addr, unsigned long esr, struct pt_regs *regs)
893 {
894 	arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN,
895 			 addr, esr);
896 }
897 NOKPROBE_SYMBOL(do_sp_pc_abort);
898 
899 /*
900  * __refdata because early_brk64 is __init, but the reference to it is
901  * clobbered at arch_initcall time.
902  * See traps.c and debug-monitors.c:debug_traps_init().
903  */
904 static struct fault_info __refdata debug_fault_info[] = {
905 	{ do_bad,	SIGTRAP,	TRAP_HWBKPT,	"hardware breakpoint"	},
906 	{ do_bad,	SIGTRAP,	TRAP_HWBKPT,	"hardware single-step"	},
907 	{ do_bad,	SIGTRAP,	TRAP_HWBKPT,	"hardware watchpoint"	},
908 	{ do_bad,	SIGKILL,	SI_KERNEL,	"unknown 3"		},
909 	{ do_bad,	SIGTRAP,	TRAP_BRKPT,	"aarch32 BKPT"		},
910 	{ do_bad,	SIGKILL,	SI_KERNEL,	"aarch32 vector catch"	},
911 	{ early_brk64,	SIGTRAP,	TRAP_BRKPT,	"aarch64 BRK"		},
912 	{ do_bad,	SIGKILL,	SI_KERNEL,	"unknown 7"		},
913 };
914 
915 void __init hook_debug_fault_code(int nr,
916 				  int (*fn)(unsigned long, unsigned long, struct pt_regs *),
917 				  int sig, int code, const char *name)
918 {
919 	BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info));
920 
921 	debug_fault_info[nr].fn		= fn;
922 	debug_fault_info[nr].sig	= sig;
923 	debug_fault_info[nr].code	= code;
924 	debug_fault_info[nr].name	= name;
925 }
926 
927 /*
928  * In debug exception context, we explicitly disable preemption despite
929  * having interrupts disabled.
930  * This serves two purposes: it makes it much less likely that we would
931  * accidentally schedule in exception context and it will force a warning
932  * if we somehow manage to schedule by accident.
933  */
934 static void debug_exception_enter(struct pt_regs *regs)
935 {
936 	preempt_disable();
937 
938 	/* This code is a bit fragile.  Test it. */
939 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work");
940 }
941 NOKPROBE_SYMBOL(debug_exception_enter);
942 
943 static void debug_exception_exit(struct pt_regs *regs)
944 {
945 	preempt_enable_no_resched();
946 }
947 NOKPROBE_SYMBOL(debug_exception_exit);
948 
949 void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr,
950 			struct pt_regs *regs)
951 {
952 	const struct fault_info *inf = esr_to_debug_fault_info(esr);
953 	unsigned long pc = instruction_pointer(regs);
954 
955 	debug_exception_enter(regs);
956 
957 	if (user_mode(regs) && !is_ttbr0_addr(pc))
958 		arm64_apply_bp_hardening();
959 
960 	if (inf->fn(addr_if_watchpoint, esr, regs)) {
961 		arm64_notify_die(inf->name, regs, inf->sig, inf->code, pc, esr);
962 	}
963 
964 	debug_exception_exit(regs);
965 }
966 NOKPROBE_SYMBOL(do_debug_exception);
967 
968 /*
969  * Used during anonymous page fault handling.
970  */
971 struct folio *vma_alloc_zeroed_movable_folio(struct vm_area_struct *vma,
972 						unsigned long vaddr)
973 {
974 	gfp_t flags = GFP_HIGHUSER_MOVABLE | __GFP_ZERO;
975 
976 	/*
977 	 * If the page is mapped with PROT_MTE, initialise the tags at the
978 	 * point of allocation and page zeroing as this is usually faster than
979 	 * separate DC ZVA and STGM.
980 	 */
981 	if (vma->vm_flags & VM_MTE)
982 		flags |= __GFP_ZEROTAGS;
983 
984 	return vma_alloc_folio(flags, 0, vma, vaddr, false);
985 }
986 
987 void tag_clear_highpage(struct page *page)
988 {
989 	/* Newly allocated page, shouldn't have been tagged yet */
990 	WARN_ON_ONCE(!try_page_mte_tagging(page));
991 	mte_zero_clear_page_tags(page_address(page));
992 	set_page_mte_tagged(page);
993 }
994