xref: /openbmc/linux/arch/arm64/mm/fault.c (revision 6197e5b7)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Based on arch/arm/mm/fault.c
4  *
5  * Copyright (C) 1995  Linus Torvalds
6  * Copyright (C) 1995-2004 Russell King
7  * Copyright (C) 2012 ARM Ltd.
8  */
9 
10 #include <linux/acpi.h>
11 #include <linux/bitfield.h>
12 #include <linux/extable.h>
13 #include <linux/signal.h>
14 #include <linux/mm.h>
15 #include <linux/hardirq.h>
16 #include <linux/init.h>
17 #include <linux/kasan.h>
18 #include <linux/kprobes.h>
19 #include <linux/uaccess.h>
20 #include <linux/page-flags.h>
21 #include <linux/sched/signal.h>
22 #include <linux/sched/debug.h>
23 #include <linux/highmem.h>
24 #include <linux/perf_event.h>
25 #include <linux/preempt.h>
26 #include <linux/hugetlb.h>
27 
28 #include <asm/acpi.h>
29 #include <asm/bug.h>
30 #include <asm/cmpxchg.h>
31 #include <asm/cpufeature.h>
32 #include <asm/exception.h>
33 #include <asm/daifflags.h>
34 #include <asm/debug-monitors.h>
35 #include <asm/esr.h>
36 #include <asm/kprobes.h>
37 #include <asm/mte.h>
38 #include <asm/processor.h>
39 #include <asm/sysreg.h>
40 #include <asm/system_misc.h>
41 #include <asm/tlbflush.h>
42 #include <asm/traps.h>
43 
44 struct fault_info {
45 	int	(*fn)(unsigned long far, unsigned int esr,
46 		      struct pt_regs *regs);
47 	int	sig;
48 	int	code;
49 	const char *name;
50 };
51 
52 static const struct fault_info fault_info[];
53 static struct fault_info debug_fault_info[];
54 
55 static inline const struct fault_info *esr_to_fault_info(unsigned int esr)
56 {
57 	return fault_info + (esr & ESR_ELx_FSC);
58 }
59 
60 static inline const struct fault_info *esr_to_debug_fault_info(unsigned int esr)
61 {
62 	return debug_fault_info + DBG_ESR_EVT(esr);
63 }
64 
65 static void data_abort_decode(unsigned int esr)
66 {
67 	pr_alert("Data abort info:\n");
68 
69 	if (esr & ESR_ELx_ISV) {
70 		pr_alert("  Access size = %u byte(s)\n",
71 			 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT));
72 		pr_alert("  SSE = %lu, SRT = %lu\n",
73 			 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT,
74 			 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT);
75 		pr_alert("  SF = %lu, AR = %lu\n",
76 			 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT,
77 			 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT);
78 	} else {
79 		pr_alert("  ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK);
80 	}
81 
82 	pr_alert("  CM = %lu, WnR = %lu\n",
83 		 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT,
84 		 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT);
85 }
86 
87 static void mem_abort_decode(unsigned int esr)
88 {
89 	pr_alert("Mem abort info:\n");
90 
91 	pr_alert("  ESR = 0x%08x\n", esr);
92 	pr_alert("  EC = 0x%02lx: %s, IL = %u bits\n",
93 		 ESR_ELx_EC(esr), esr_get_class_string(esr),
94 		 (esr & ESR_ELx_IL) ? 32 : 16);
95 	pr_alert("  SET = %lu, FnV = %lu\n",
96 		 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT,
97 		 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT);
98 	pr_alert("  EA = %lu, S1PTW = %lu\n",
99 		 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT,
100 		 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT);
101 
102 	if (esr_is_data_abort(esr))
103 		data_abort_decode(esr);
104 }
105 
106 static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm)
107 {
108 	/* Either init_pg_dir or swapper_pg_dir */
109 	if (mm == &init_mm)
110 		return __pa_symbol(mm->pgd);
111 
112 	return (unsigned long)virt_to_phys(mm->pgd);
113 }
114 
115 /*
116  * Dump out the page tables associated with 'addr' in the currently active mm.
117  */
118 static void show_pte(unsigned long addr)
119 {
120 	struct mm_struct *mm;
121 	pgd_t *pgdp;
122 	pgd_t pgd;
123 
124 	if (is_ttbr0_addr(addr)) {
125 		/* TTBR0 */
126 		mm = current->active_mm;
127 		if (mm == &init_mm) {
128 			pr_alert("[%016lx] user address but active_mm is swapper\n",
129 				 addr);
130 			return;
131 		}
132 	} else if (is_ttbr1_addr(addr)) {
133 		/* TTBR1 */
134 		mm = &init_mm;
135 	} else {
136 		pr_alert("[%016lx] address between user and kernel address ranges\n",
137 			 addr);
138 		return;
139 	}
140 
141 	pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n",
142 		 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K,
143 		 vabits_actual, mm_to_pgd_phys(mm));
144 	pgdp = pgd_offset(mm, addr);
145 	pgd = READ_ONCE(*pgdp);
146 	pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd));
147 
148 	do {
149 		p4d_t *p4dp, p4d;
150 		pud_t *pudp, pud;
151 		pmd_t *pmdp, pmd;
152 		pte_t *ptep, pte;
153 
154 		if (pgd_none(pgd) || pgd_bad(pgd))
155 			break;
156 
157 		p4dp = p4d_offset(pgdp, addr);
158 		p4d = READ_ONCE(*p4dp);
159 		pr_cont(", p4d=%016llx", p4d_val(p4d));
160 		if (p4d_none(p4d) || p4d_bad(p4d))
161 			break;
162 
163 		pudp = pud_offset(p4dp, addr);
164 		pud = READ_ONCE(*pudp);
165 		pr_cont(", pud=%016llx", pud_val(pud));
166 		if (pud_none(pud) || pud_bad(pud))
167 			break;
168 
169 		pmdp = pmd_offset(pudp, addr);
170 		pmd = READ_ONCE(*pmdp);
171 		pr_cont(", pmd=%016llx", pmd_val(pmd));
172 		if (pmd_none(pmd) || pmd_bad(pmd))
173 			break;
174 
175 		ptep = pte_offset_map(pmdp, addr);
176 		pte = READ_ONCE(*ptep);
177 		pr_cont(", pte=%016llx", pte_val(pte));
178 		pte_unmap(ptep);
179 	} while(0);
180 
181 	pr_cont("\n");
182 }
183 
184 /*
185  * This function sets the access flags (dirty, accessed), as well as write
186  * permission, and only to a more permissive setting.
187  *
188  * It needs to cope with hardware update of the accessed/dirty state by other
189  * agents in the system and can safely skip the __sync_icache_dcache() call as,
190  * like set_pte_at(), the PTE is never changed from no-exec to exec here.
191  *
192  * Returns whether or not the PTE actually changed.
193  */
194 int ptep_set_access_flags(struct vm_area_struct *vma,
195 			  unsigned long address, pte_t *ptep,
196 			  pte_t entry, int dirty)
197 {
198 	pteval_t old_pteval, pteval;
199 	pte_t pte = READ_ONCE(*ptep);
200 
201 	if (pte_same(pte, entry))
202 		return 0;
203 
204 	/* only preserve the access flags and write permission */
205 	pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY;
206 
207 	/*
208 	 * Setting the flags must be done atomically to avoid racing with the
209 	 * hardware update of the access/dirty state. The PTE_RDONLY bit must
210 	 * be set to the most permissive (lowest value) of *ptep and entry
211 	 * (calculated as: a & b == ~(~a | ~b)).
212 	 */
213 	pte_val(entry) ^= PTE_RDONLY;
214 	pteval = pte_val(pte);
215 	do {
216 		old_pteval = pteval;
217 		pteval ^= PTE_RDONLY;
218 		pteval |= pte_val(entry);
219 		pteval ^= PTE_RDONLY;
220 		pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);
221 	} while (pteval != old_pteval);
222 
223 	/* Invalidate a stale read-only entry */
224 	if (dirty)
225 		flush_tlb_page(vma, address);
226 	return 1;
227 }
228 
229 static bool is_el1_instruction_abort(unsigned int esr)
230 {
231 	return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR;
232 }
233 
234 static inline bool is_el1_permission_fault(unsigned long addr, unsigned int esr,
235 					   struct pt_regs *regs)
236 {
237 	unsigned int ec       = ESR_ELx_EC(esr);
238 	unsigned int fsc_type = esr & ESR_ELx_FSC_TYPE;
239 
240 	if (ec != ESR_ELx_EC_DABT_CUR && ec != ESR_ELx_EC_IABT_CUR)
241 		return false;
242 
243 	if (fsc_type == ESR_ELx_FSC_PERM)
244 		return true;
245 
246 	if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan())
247 		return fsc_type == ESR_ELx_FSC_FAULT &&
248 			(regs->pstate & PSR_PAN_BIT);
249 
250 	return false;
251 }
252 
253 static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr,
254 							unsigned int esr,
255 							struct pt_regs *regs)
256 {
257 	unsigned long flags;
258 	u64 par, dfsc;
259 
260 	if (ESR_ELx_EC(esr) != ESR_ELx_EC_DABT_CUR ||
261 	    (esr & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT)
262 		return false;
263 
264 	local_irq_save(flags);
265 	asm volatile("at s1e1r, %0" :: "r" (addr));
266 	isb();
267 	par = read_sysreg_par();
268 	local_irq_restore(flags);
269 
270 	/*
271 	 * If we now have a valid translation, treat the translation fault as
272 	 * spurious.
273 	 */
274 	if (!(par & SYS_PAR_EL1_F))
275 		return true;
276 
277 	/*
278 	 * If we got a different type of fault from the AT instruction,
279 	 * treat the translation fault as spurious.
280 	 */
281 	dfsc = FIELD_GET(SYS_PAR_EL1_FST, par);
282 	return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT;
283 }
284 
285 static void die_kernel_fault(const char *msg, unsigned long addr,
286 			     unsigned int esr, struct pt_regs *regs)
287 {
288 	bust_spinlocks(1);
289 
290 	pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg,
291 		 addr);
292 
293 	mem_abort_decode(esr);
294 
295 	show_pte(addr);
296 	die("Oops", regs, esr);
297 	bust_spinlocks(0);
298 	do_exit(SIGKILL);
299 }
300 
301 #ifdef CONFIG_KASAN_HW_TAGS
302 static void report_tag_fault(unsigned long addr, unsigned int esr,
303 			     struct pt_regs *regs)
304 {
305 	bool is_write  = ((esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT) != 0;
306 
307 	/*
308 	 * SAS bits aren't set for all faults reported in EL1, so we can't
309 	 * find out access size.
310 	 */
311 	kasan_report(addr, 0, is_write, regs->pc);
312 }
313 #else
314 /* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */
315 static inline void report_tag_fault(unsigned long addr, unsigned int esr,
316 				    struct pt_regs *regs) { }
317 #endif
318 
319 static void do_tag_recovery(unsigned long addr, unsigned int esr,
320 			   struct pt_regs *regs)
321 {
322 	static bool reported;
323 
324 	if (!READ_ONCE(reported)) {
325 		report_tag_fault(addr, esr, regs);
326 		WRITE_ONCE(reported, true);
327 	}
328 
329 	/*
330 	 * Disable MTE Tag Checking on the local CPU for the current EL.
331 	 * It will be done lazily on the other CPUs when they will hit a
332 	 * tag fault.
333 	 */
334 	sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_NONE);
335 	isb();
336 }
337 
338 static bool is_el1_mte_sync_tag_check_fault(unsigned int esr)
339 {
340 	unsigned int ec = ESR_ELx_EC(esr);
341 	unsigned int fsc = esr & ESR_ELx_FSC;
342 
343 	if (ec != ESR_ELx_EC_DABT_CUR)
344 		return false;
345 
346 	if (fsc == ESR_ELx_FSC_MTE)
347 		return true;
348 
349 	return false;
350 }
351 
352 static void __do_kernel_fault(unsigned long addr, unsigned int esr,
353 			      struct pt_regs *regs)
354 {
355 	const char *msg;
356 
357 	/*
358 	 * Are we prepared to handle this kernel fault?
359 	 * We are almost certainly not prepared to handle instruction faults.
360 	 */
361 	if (!is_el1_instruction_abort(esr) && fixup_exception(regs))
362 		return;
363 
364 	if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs),
365 	    "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr))
366 		return;
367 
368 	if (is_el1_mte_sync_tag_check_fault(esr)) {
369 		do_tag_recovery(addr, esr, regs);
370 
371 		return;
372 	}
373 
374 	if (is_el1_permission_fault(addr, esr, regs)) {
375 		if (esr & ESR_ELx_WNR)
376 			msg = "write to read-only memory";
377 		else if (is_el1_instruction_abort(esr))
378 			msg = "execute from non-executable memory";
379 		else
380 			msg = "read from unreadable memory";
381 	} else if (addr < PAGE_SIZE) {
382 		msg = "NULL pointer dereference";
383 	} else {
384 		msg = "paging request";
385 	}
386 
387 	die_kernel_fault(msg, addr, esr, regs);
388 }
389 
390 static void set_thread_esr(unsigned long address, unsigned int esr)
391 {
392 	current->thread.fault_address = address;
393 
394 	/*
395 	 * If the faulting address is in the kernel, we must sanitize the ESR.
396 	 * From userspace's point of view, kernel-only mappings don't exist
397 	 * at all, so we report them as level 0 translation faults.
398 	 * (This is not quite the way that "no mapping there at all" behaves:
399 	 * an alignment fault not caused by the memory type would take
400 	 * precedence over translation fault for a real access to empty
401 	 * space. Unfortunately we can't easily distinguish "alignment fault
402 	 * not caused by memory type" from "alignment fault caused by memory
403 	 * type", so we ignore this wrinkle and just return the translation
404 	 * fault.)
405 	 */
406 	if (!is_ttbr0_addr(current->thread.fault_address)) {
407 		switch (ESR_ELx_EC(esr)) {
408 		case ESR_ELx_EC_DABT_LOW:
409 			/*
410 			 * These bits provide only information about the
411 			 * faulting instruction, which userspace knows already.
412 			 * We explicitly clear bits which are architecturally
413 			 * RES0 in case they are given meanings in future.
414 			 * We always report the ESR as if the fault was taken
415 			 * to EL1 and so ISV and the bits in ISS[23:14] are
416 			 * clear. (In fact it always will be a fault to EL1.)
417 			 */
418 			esr &= ESR_ELx_EC_MASK | ESR_ELx_IL |
419 				ESR_ELx_CM | ESR_ELx_WNR;
420 			esr |= ESR_ELx_FSC_FAULT;
421 			break;
422 		case ESR_ELx_EC_IABT_LOW:
423 			/*
424 			 * Claim a level 0 translation fault.
425 			 * All other bits are architecturally RES0 for faults
426 			 * reported with that DFSC value, so we clear them.
427 			 */
428 			esr &= ESR_ELx_EC_MASK | ESR_ELx_IL;
429 			esr |= ESR_ELx_FSC_FAULT;
430 			break;
431 		default:
432 			/*
433 			 * This should never happen (entry.S only brings us
434 			 * into this code for insn and data aborts from a lower
435 			 * exception level). Fail safe by not providing an ESR
436 			 * context record at all.
437 			 */
438 			WARN(1, "ESR 0x%x is not DABT or IABT from EL0\n", esr);
439 			esr = 0;
440 			break;
441 		}
442 	}
443 
444 	current->thread.fault_code = esr;
445 }
446 
447 static void do_bad_area(unsigned long far, unsigned int esr,
448 			struct pt_regs *regs)
449 {
450 	unsigned long addr = untagged_addr(far);
451 
452 	/*
453 	 * If we are in kernel mode at this point, we have no context to
454 	 * handle this fault with.
455 	 */
456 	if (user_mode(regs)) {
457 		const struct fault_info *inf = esr_to_fault_info(esr);
458 
459 		set_thread_esr(addr, esr);
460 		arm64_force_sig_fault(inf->sig, inf->code, far, inf->name);
461 	} else {
462 		__do_kernel_fault(addr, esr, regs);
463 	}
464 }
465 
466 #define VM_FAULT_BADMAP		0x010000
467 #define VM_FAULT_BADACCESS	0x020000
468 
469 static vm_fault_t __do_page_fault(struct mm_struct *mm, unsigned long addr,
470 				  unsigned int mm_flags, unsigned long vm_flags,
471 				  struct pt_regs *regs)
472 {
473 	struct vm_area_struct *vma = find_vma(mm, addr);
474 
475 	if (unlikely(!vma))
476 		return VM_FAULT_BADMAP;
477 
478 	/*
479 	 * Ok, we have a good vm_area for this memory access, so we can handle
480 	 * it.
481 	 */
482 	if (unlikely(vma->vm_start > addr)) {
483 		if (!(vma->vm_flags & VM_GROWSDOWN))
484 			return VM_FAULT_BADMAP;
485 		if (expand_stack(vma, addr))
486 			return VM_FAULT_BADMAP;
487 	}
488 
489 	/*
490 	 * Check that the permissions on the VMA allow for the fault which
491 	 * occurred.
492 	 */
493 	if (!(vma->vm_flags & vm_flags))
494 		return VM_FAULT_BADACCESS;
495 	return handle_mm_fault(vma, addr & PAGE_MASK, mm_flags, regs);
496 }
497 
498 static bool is_el0_instruction_abort(unsigned int esr)
499 {
500 	return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
501 }
502 
503 /*
504  * Note: not valid for EL1 DC IVAC, but we never use that such that it
505  * should fault. EL0 cannot issue DC IVAC (undef).
506  */
507 static bool is_write_abort(unsigned int esr)
508 {
509 	return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM);
510 }
511 
512 static int __kprobes do_page_fault(unsigned long far, unsigned int esr,
513 				   struct pt_regs *regs)
514 {
515 	const struct fault_info *inf;
516 	struct mm_struct *mm = current->mm;
517 	vm_fault_t fault;
518 	unsigned long vm_flags = VM_ACCESS_FLAGS;
519 	unsigned int mm_flags = FAULT_FLAG_DEFAULT;
520 	unsigned long addr = untagged_addr(far);
521 
522 	if (kprobe_page_fault(regs, esr))
523 		return 0;
524 
525 	/*
526 	 * If we're in an interrupt or have no user context, we must not take
527 	 * the fault.
528 	 */
529 	if (faulthandler_disabled() || !mm)
530 		goto no_context;
531 
532 	if (user_mode(regs))
533 		mm_flags |= FAULT_FLAG_USER;
534 
535 	if (is_el0_instruction_abort(esr)) {
536 		vm_flags = VM_EXEC;
537 		mm_flags |= FAULT_FLAG_INSTRUCTION;
538 	} else if (is_write_abort(esr)) {
539 		vm_flags = VM_WRITE;
540 		mm_flags |= FAULT_FLAG_WRITE;
541 	}
542 
543 	if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) {
544 		if (is_el1_instruction_abort(esr))
545 			die_kernel_fault("execution of user memory",
546 					 addr, esr, regs);
547 
548 		if (!search_exception_tables(regs->pc))
549 			die_kernel_fault("access to user memory outside uaccess routines",
550 					 addr, esr, regs);
551 	}
552 
553 	perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
554 
555 	/*
556 	 * As per x86, we may deadlock here. However, since the kernel only
557 	 * validly references user space from well defined areas of the code,
558 	 * we can bug out early if this is from code which shouldn't.
559 	 */
560 	if (!mmap_read_trylock(mm)) {
561 		if (!user_mode(regs) && !search_exception_tables(regs->pc))
562 			goto no_context;
563 retry:
564 		mmap_read_lock(mm);
565 	} else {
566 		/*
567 		 * The above down_read_trylock() might have succeeded in which
568 		 * case, we'll have missed the might_sleep() from down_read().
569 		 */
570 		might_sleep();
571 #ifdef CONFIG_DEBUG_VM
572 		if (!user_mode(regs) && !search_exception_tables(regs->pc)) {
573 			mmap_read_unlock(mm);
574 			goto no_context;
575 		}
576 #endif
577 	}
578 
579 	fault = __do_page_fault(mm, addr, mm_flags, vm_flags, regs);
580 
581 	/* Quick path to respond to signals */
582 	if (fault_signal_pending(fault, regs)) {
583 		if (!user_mode(regs))
584 			goto no_context;
585 		return 0;
586 	}
587 
588 	if (fault & VM_FAULT_RETRY) {
589 		if (mm_flags & FAULT_FLAG_ALLOW_RETRY) {
590 			mm_flags |= FAULT_FLAG_TRIED;
591 			goto retry;
592 		}
593 	}
594 	mmap_read_unlock(mm);
595 
596 	/*
597 	 * Handle the "normal" (no error) case first.
598 	 */
599 	if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP |
600 			      VM_FAULT_BADACCESS))))
601 		return 0;
602 
603 	/*
604 	 * If we are in kernel mode at this point, we have no context to
605 	 * handle this fault with.
606 	 */
607 	if (!user_mode(regs))
608 		goto no_context;
609 
610 	if (fault & VM_FAULT_OOM) {
611 		/*
612 		 * We ran out of memory, call the OOM killer, and return to
613 		 * userspace (which will retry the fault, or kill us if we got
614 		 * oom-killed).
615 		 */
616 		pagefault_out_of_memory();
617 		return 0;
618 	}
619 
620 	inf = esr_to_fault_info(esr);
621 	set_thread_esr(addr, esr);
622 	if (fault & VM_FAULT_SIGBUS) {
623 		/*
624 		 * We had some memory, but were unable to successfully fix up
625 		 * this page fault.
626 		 */
627 		arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name);
628 	} else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) {
629 		unsigned int lsb;
630 
631 		lsb = PAGE_SHIFT;
632 		if (fault & VM_FAULT_HWPOISON_LARGE)
633 			lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
634 
635 		arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name);
636 	} else {
637 		/*
638 		 * Something tried to access memory that isn't in our memory
639 		 * map.
640 		 */
641 		arm64_force_sig_fault(SIGSEGV,
642 				      fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR,
643 				      far, inf->name);
644 	}
645 
646 	return 0;
647 
648 no_context:
649 	__do_kernel_fault(addr, esr, regs);
650 	return 0;
651 }
652 
653 static int __kprobes do_translation_fault(unsigned long far,
654 					  unsigned int esr,
655 					  struct pt_regs *regs)
656 {
657 	unsigned long addr = untagged_addr(far);
658 
659 	if (is_ttbr0_addr(addr))
660 		return do_page_fault(far, esr, regs);
661 
662 	do_bad_area(far, esr, regs);
663 	return 0;
664 }
665 
666 static int do_alignment_fault(unsigned long far, unsigned int esr,
667 			      struct pt_regs *regs)
668 {
669 	do_bad_area(far, esr, regs);
670 	return 0;
671 }
672 
673 static int do_bad(unsigned long far, unsigned int esr, struct pt_regs *regs)
674 {
675 	return 1; /* "fault" */
676 }
677 
678 static int do_sea(unsigned long far, unsigned int esr, struct pt_regs *regs)
679 {
680 	const struct fault_info *inf;
681 	unsigned long siaddr;
682 
683 	inf = esr_to_fault_info(esr);
684 
685 	if (user_mode(regs) && apei_claim_sea(regs) == 0) {
686 		/*
687 		 * APEI claimed this as a firmware-first notification.
688 		 * Some processing deferred to task_work before ret_to_user().
689 		 */
690 		return 0;
691 	}
692 
693 	if (esr & ESR_ELx_FnV) {
694 		siaddr = 0;
695 	} else {
696 		/*
697 		 * The architecture specifies that the tag bits of FAR_EL1 are
698 		 * UNKNOWN for synchronous external aborts. Mask them out now
699 		 * so that userspace doesn't see them.
700 		 */
701 		siaddr  = untagged_addr(far);
702 	}
703 	arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr);
704 
705 	return 0;
706 }
707 
708 static int do_tag_check_fault(unsigned long far, unsigned int esr,
709 			      struct pt_regs *regs)
710 {
711 	/*
712 	 * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN
713 	 * for tag check faults. Set them to corresponding bits in the untagged
714 	 * address.
715 	 */
716 	far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
717 	do_bad_area(far, esr, regs);
718 	return 0;
719 }
720 
721 static const struct fault_info fault_info[] = {
722 	{ do_bad,		SIGKILL, SI_KERNEL,	"ttbr address size fault"	},
723 	{ do_bad,		SIGKILL, SI_KERNEL,	"level 1 address size fault"	},
724 	{ do_bad,		SIGKILL, SI_KERNEL,	"level 2 address size fault"	},
725 	{ do_bad,		SIGKILL, SI_KERNEL,	"level 3 address size fault"	},
726 	{ do_translation_fault,	SIGSEGV, SEGV_MAPERR,	"level 0 translation fault"	},
727 	{ do_translation_fault,	SIGSEGV, SEGV_MAPERR,	"level 1 translation fault"	},
728 	{ do_translation_fault,	SIGSEGV, SEGV_MAPERR,	"level 2 translation fault"	},
729 	{ do_translation_fault,	SIGSEGV, SEGV_MAPERR,	"level 3 translation fault"	},
730 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 8"			},
731 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 1 access flag fault"	},
732 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 2 access flag fault"	},
733 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 3 access flag fault"	},
734 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 12"			},
735 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 1 permission fault"	},
736 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 2 permission fault"	},
737 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 3 permission fault"	},
738 	{ do_sea,		SIGBUS,  BUS_OBJERR,	"synchronous external abort"	},
739 	{ do_tag_check_fault,	SIGSEGV, SEGV_MTESERR,	"synchronous tag check fault"	},
740 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 18"			},
741 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 19"			},
742 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 0 (translation table walk)"	},
743 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 1 (translation table walk)"	},
744 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 2 (translation table walk)"	},
745 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 3 (translation table walk)"	},
746 	{ do_sea,		SIGBUS,  BUS_OBJERR,	"synchronous parity or ECC error" },	// Reserved when RAS is implemented
747 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 25"			},
748 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 26"			},
749 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 27"			},
750 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 0 synchronous parity error (translation table walk)"	},	// Reserved when RAS is implemented
751 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 1 synchronous parity error (translation table walk)"	},	// Reserved when RAS is implemented
752 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 2 synchronous parity error (translation table walk)"	},	// Reserved when RAS is implemented
753 	{ do_sea,		SIGKILL, SI_KERNEL,	"level 3 synchronous parity error (translation table walk)"	},	// Reserved when RAS is implemented
754 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 32"			},
755 	{ do_alignment_fault,	SIGBUS,  BUS_ADRALN,	"alignment fault"		},
756 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 34"			},
757 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 35"			},
758 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 36"			},
759 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 37"			},
760 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 38"			},
761 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 39"			},
762 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 40"			},
763 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 41"			},
764 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 42"			},
765 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 43"			},
766 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 44"			},
767 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 45"			},
768 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 46"			},
769 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 47"			},
770 	{ do_bad,		SIGKILL, SI_KERNEL,	"TLB conflict abort"		},
771 	{ do_bad,		SIGKILL, SI_KERNEL,	"Unsupported atomic hardware update fault"	},
772 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 50"			},
773 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 51"			},
774 	{ do_bad,		SIGKILL, SI_KERNEL,	"implementation fault (lockdown abort)" },
775 	{ do_bad,		SIGBUS,  BUS_OBJERR,	"implementation fault (unsupported exclusive)" },
776 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 54"			},
777 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 55"			},
778 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 56"			},
779 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 57"			},
780 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 58" 			},
781 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 59"			},
782 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 60"			},
783 	{ do_bad,		SIGKILL, SI_KERNEL,	"section domain fault"		},
784 	{ do_bad,		SIGKILL, SI_KERNEL,	"page domain fault"		},
785 	{ do_bad,		SIGKILL, SI_KERNEL,	"unknown 63"			},
786 };
787 
788 void do_mem_abort(unsigned long far, unsigned int esr, struct pt_regs *regs)
789 {
790 	const struct fault_info *inf = esr_to_fault_info(esr);
791 	unsigned long addr = untagged_addr(far);
792 
793 	if (!inf->fn(far, esr, regs))
794 		return;
795 
796 	if (!user_mode(regs)) {
797 		pr_alert("Unhandled fault at 0x%016lx\n", addr);
798 		mem_abort_decode(esr);
799 		show_pte(addr);
800 	}
801 
802 	/*
803 	 * At this point we have an unrecognized fault type whose tag bits may
804 	 * have been defined as UNKNOWN. Therefore we only expose the untagged
805 	 * address to the signal handler.
806 	 */
807 	arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr);
808 }
809 NOKPROBE_SYMBOL(do_mem_abort);
810 
811 void do_el0_irq_bp_hardening(void)
812 {
813 	/* PC has already been checked in entry.S */
814 	arm64_apply_bp_hardening();
815 }
816 NOKPROBE_SYMBOL(do_el0_irq_bp_hardening);
817 
818 void do_sp_pc_abort(unsigned long addr, unsigned int esr, struct pt_regs *regs)
819 {
820 	arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN,
821 			 addr, esr);
822 }
823 NOKPROBE_SYMBOL(do_sp_pc_abort);
824 
825 int __init early_brk64(unsigned long addr, unsigned int esr,
826 		       struct pt_regs *regs);
827 
828 /*
829  * __refdata because early_brk64 is __init, but the reference to it is
830  * clobbered at arch_initcall time.
831  * See traps.c and debug-monitors.c:debug_traps_init().
832  */
833 static struct fault_info __refdata debug_fault_info[] = {
834 	{ do_bad,	SIGTRAP,	TRAP_HWBKPT,	"hardware breakpoint"	},
835 	{ do_bad,	SIGTRAP,	TRAP_HWBKPT,	"hardware single-step"	},
836 	{ do_bad,	SIGTRAP,	TRAP_HWBKPT,	"hardware watchpoint"	},
837 	{ do_bad,	SIGKILL,	SI_KERNEL,	"unknown 3"		},
838 	{ do_bad,	SIGTRAP,	TRAP_BRKPT,	"aarch32 BKPT"		},
839 	{ do_bad,	SIGKILL,	SI_KERNEL,	"aarch32 vector catch"	},
840 	{ early_brk64,	SIGTRAP,	TRAP_BRKPT,	"aarch64 BRK"		},
841 	{ do_bad,	SIGKILL,	SI_KERNEL,	"unknown 7"		},
842 };
843 
844 void __init hook_debug_fault_code(int nr,
845 				  int (*fn)(unsigned long, unsigned int, struct pt_regs *),
846 				  int sig, int code, const char *name)
847 {
848 	BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info));
849 
850 	debug_fault_info[nr].fn		= fn;
851 	debug_fault_info[nr].sig	= sig;
852 	debug_fault_info[nr].code	= code;
853 	debug_fault_info[nr].name	= name;
854 }
855 
856 /*
857  * In debug exception context, we explicitly disable preemption despite
858  * having interrupts disabled.
859  * This serves two purposes: it makes it much less likely that we would
860  * accidentally schedule in exception context and it will force a warning
861  * if we somehow manage to schedule by accident.
862  */
863 static void debug_exception_enter(struct pt_regs *regs)
864 {
865 	preempt_disable();
866 
867 	/* This code is a bit fragile.  Test it. */
868 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work");
869 }
870 NOKPROBE_SYMBOL(debug_exception_enter);
871 
872 static void debug_exception_exit(struct pt_regs *regs)
873 {
874 	preempt_enable_no_resched();
875 }
876 NOKPROBE_SYMBOL(debug_exception_exit);
877 
878 #ifdef CONFIG_ARM64_ERRATUM_1463225
879 DECLARE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa);
880 
881 static int cortex_a76_erratum_1463225_debug_handler(struct pt_regs *regs)
882 {
883 	if (user_mode(regs))
884 		return 0;
885 
886 	if (!__this_cpu_read(__in_cortex_a76_erratum_1463225_wa))
887 		return 0;
888 
889 	/*
890 	 * We've taken a dummy step exception from the kernel to ensure
891 	 * that interrupts are re-enabled on the syscall path. Return back
892 	 * to cortex_a76_erratum_1463225_svc_handler() with debug exceptions
893 	 * masked so that we can safely restore the mdscr and get on with
894 	 * handling the syscall.
895 	 */
896 	regs->pstate |= PSR_D_BIT;
897 	return 1;
898 }
899 #else
900 static int cortex_a76_erratum_1463225_debug_handler(struct pt_regs *regs)
901 {
902 	return 0;
903 }
904 #endif /* CONFIG_ARM64_ERRATUM_1463225 */
905 NOKPROBE_SYMBOL(cortex_a76_erratum_1463225_debug_handler);
906 
907 void do_debug_exception(unsigned long addr_if_watchpoint, unsigned int esr,
908 			struct pt_regs *regs)
909 {
910 	const struct fault_info *inf = esr_to_debug_fault_info(esr);
911 	unsigned long pc = instruction_pointer(regs);
912 
913 	if (cortex_a76_erratum_1463225_debug_handler(regs))
914 		return;
915 
916 	debug_exception_enter(regs);
917 
918 	if (user_mode(regs) && !is_ttbr0_addr(pc))
919 		arm64_apply_bp_hardening();
920 
921 	if (inf->fn(addr_if_watchpoint, esr, regs)) {
922 		arm64_notify_die(inf->name, regs, inf->sig, inf->code, pc, esr);
923 	}
924 
925 	debug_exception_exit(regs);
926 }
927 NOKPROBE_SYMBOL(do_debug_exception);
928