1# SPDX-License-Identifier: GPL-2.0 2lib-y := clear_user.o delay.o copy_from_user.o \ 3 copy_to_user.o copy_in_user.o copy_page.o \ 4 clear_page.o memchr.o memcpy.o memmove.o memset.o \ 5 memcmp.o strcmp.o strncmp.o strlen.o strnlen.o \ 6 strchr.o strrchr.o tishift.o 7 8ifeq ($(CONFIG_KERNEL_MODE_NEON), y) 9obj-$(CONFIG_XOR_BLOCKS) += xor-neon.o 10CFLAGS_REMOVE_xor-neon.o += -mgeneral-regs-only 11CFLAGS_xor-neon.o += -ffreestanding 12endif 13 14# Tell the compiler to treat all general purpose registers (with the 15# exception of the IP registers, which are already handled by the caller 16# in case of a PLT) as callee-saved, which allows for efficient runtime 17# patching of the bl instruction in the caller with an atomic instruction 18# when supported by the CPU. Result and argument registers are handled 19# correctly, based on the function prototype. 20lib-$(CONFIG_ARM64_LSE_ATOMICS) += atomic_ll_sc.o 21CFLAGS_atomic_ll_sc.o := -ffixed-x1 -ffixed-x2 \ 22 -ffixed-x3 -ffixed-x4 -ffixed-x5 -ffixed-x6 \ 23 -ffixed-x7 -fcall-saved-x8 -fcall-saved-x9 \ 24 -fcall-saved-x10 -fcall-saved-x11 -fcall-saved-x12 \ 25 -fcall-saved-x13 -fcall-saved-x14 -fcall-saved-x15 \ 26 -fcall-saved-x18 -fomit-frame-pointer 27CFLAGS_REMOVE_atomic_ll_sc.o := -pg 28GCOV_PROFILE_atomic_ll_sc.o := n 29KASAN_SANITIZE_atomic_ll_sc.o := n 30KCOV_INSTRUMENT_atomic_ll_sc.o := n 31UBSAN_SANITIZE_atomic_ll_sc.o := n 32 33lib-$(CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE) += uaccess_flushcache.o 34 35obj-$(CONFIG_CRC32) += crc32.o 36