xref: /openbmc/linux/arch/arm64/lib/Makefile (revision 2a6c7c36)
1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0
27c8fc35dSWill Deaconlib-y		:= clear_user.o delay.o copy_from_user.o		\
312a0ef7bSWill Deacon		   copy_to_user.o copy_in_user.o copy_page.o		\
412a0ef7bSWill Deacon		   clear_page.o memchr.o memcpy.o memmove.o memset.o	\
50a42cb0aSzhichang.yuan		   memcmp.o strcmp.o strncmp.o strlen.o strnlen.o	\
6fb872273SJason A. Donenfeld		   strchr.o strrchr.o tishift.o
7c0385b24SWill Deacon
85be8b70aSArd Biesheuvel# Tell the compiler to treat all general purpose registers (with the
95be8b70aSArd Biesheuvel# exception of the IP registers, which are already handled by the caller
105be8b70aSArd Biesheuvel# in case of a PLT) as callee-saved, which allows for efficient runtime
115be8b70aSArd Biesheuvel# patching of the bl instruction in the caller with an atomic instruction
125be8b70aSArd Biesheuvel# when supported by the CPU. Result and argument registers are handled
135be8b70aSArd Biesheuvel# correctly, based on the function prototype.
14c0385b24SWill Deaconlib-$(CONFIG_ARM64_LSE_ATOMICS) += atomic_ll_sc.o
152a6c7c36STri VoCFLAGS_atomic_ll_sc.o	:= -ffixed-x1 -ffixed-x2        		\
16c0385b24SWill Deacon		   -ffixed-x3 -ffixed-x4 -ffixed-x5 -ffixed-x6		\
17c0385b24SWill Deacon		   -ffixed-x7 -fcall-saved-x8 -fcall-saved-x9		\
18c0385b24SWill Deacon		   -fcall-saved-x10 -fcall-saved-x11 -fcall-saved-x12	\
19c0385b24SWill Deacon		   -fcall-saved-x13 -fcall-saved-x14 -fcall-saved-x15	\
206b24442dSWill Deacon		   -fcall-saved-x18 -fomit-frame-pointer
216b24442dSWill DeaconCFLAGS_REMOVE_atomic_ll_sc.o := -pg
223789c122SMark RutlandGCOV_PROFILE_atomic_ll_sc.o	:= n
233789c122SMark RutlandKASAN_SANITIZE_atomic_ll_sc.o	:= n
243789c122SMark RutlandKCOV_INSTRUMENT_atomic_ll_sc.o	:= n
253789c122SMark RutlandUBSAN_SANITIZE_atomic_ll_sc.o	:= n
265d7bdeb1SRobin Murphy
275d7bdeb1SRobin Murphylib-$(CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE) += uaccess_flushcache.o
287481cddfSArd Biesheuvel
297481cddfSArd Biesheuvelobj-$(CONFIG_CRC32) += crc32.o
30