1 /* 2 * Copyright (C) 2012,2013 - ARM Ltd 3 * Author: Marc Zyngier <marc.zyngier@arm.com> 4 * 5 * Derived from arch/arm/kvm/reset.c 6 * Copyright (C) 2012 - Virtual Open Systems and Columbia University 7 * Author: Christoffer Dall <c.dall@virtualopensystems.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program. If not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include <linux/errno.h> 23 #include <linux/kvm_host.h> 24 #include <linux/kvm.h> 25 #include <linux/hw_breakpoint.h> 26 27 #include <kvm/arm_arch_timer.h> 28 29 #include <asm/cputype.h> 30 #include <asm/ptrace.h> 31 #include <asm/kvm_arm.h> 32 #include <asm/kvm_asm.h> 33 #include <asm/kvm_coproc.h> 34 #include <asm/kvm_mmu.h> 35 36 /* 37 * ARMv8 Reset Values 38 */ 39 static const struct kvm_regs default_regs_reset = { 40 .regs.pstate = (PSR_MODE_EL1h | PSR_A_BIT | PSR_I_BIT | 41 PSR_F_BIT | PSR_D_BIT), 42 }; 43 44 static const struct kvm_regs default_regs_reset32 = { 45 .regs.pstate = (COMPAT_PSR_MODE_SVC | COMPAT_PSR_A_BIT | 46 COMPAT_PSR_I_BIT | COMPAT_PSR_F_BIT), 47 }; 48 49 static bool cpu_has_32bit_el1(void) 50 { 51 u64 pfr0; 52 53 pfr0 = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1); 54 return !!(pfr0 & 0x20); 55 } 56 57 /** 58 * kvm_arch_dev_ioctl_check_extension 59 * 60 * We currently assume that the number of HW registers is uniform 61 * across all CPUs (see cpuinfo_sanity_check). 62 */ 63 int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext) 64 { 65 int r; 66 67 switch (ext) { 68 case KVM_CAP_ARM_EL1_32BIT: 69 r = cpu_has_32bit_el1(); 70 break; 71 case KVM_CAP_GUEST_DEBUG_HW_BPS: 72 r = get_num_brps(); 73 break; 74 case KVM_CAP_GUEST_DEBUG_HW_WPS: 75 r = get_num_wrps(); 76 break; 77 case KVM_CAP_ARM_PMU_V3: 78 r = kvm_arm_support_pmu_v3(); 79 break; 80 case KVM_CAP_SET_GUEST_DEBUG: 81 case KVM_CAP_VCPU_ATTRIBUTES: 82 r = 1; 83 break; 84 default: 85 r = 0; 86 } 87 88 return r; 89 } 90 91 /** 92 * kvm_reset_vcpu - sets core registers and sys_regs to reset value 93 * @vcpu: The VCPU pointer 94 * 95 * This function finds the right table above and sets the registers on 96 * the virtual CPU struct to their architecturally defined reset 97 * values. 98 */ 99 int kvm_reset_vcpu(struct kvm_vcpu *vcpu) 100 { 101 const struct kvm_regs *cpu_reset; 102 103 switch (vcpu->arch.target) { 104 default: 105 if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) { 106 if (!cpu_has_32bit_el1()) 107 return -EINVAL; 108 cpu_reset = &default_regs_reset32; 109 } else { 110 cpu_reset = &default_regs_reset; 111 } 112 113 break; 114 } 115 116 /* Reset core registers */ 117 memcpy(vcpu_gp_regs(vcpu), cpu_reset, sizeof(*cpu_reset)); 118 119 /* Reset system registers */ 120 kvm_reset_sys_regs(vcpu); 121 122 /* Reset PMU */ 123 kvm_pmu_vcpu_reset(vcpu); 124 125 /* Default workaround setup is enabled (if supported) */ 126 if (kvm_arm_have_ssbd() == KVM_SSBD_KERNEL) 127 vcpu->arch.workaround_flags |= VCPU_WORKAROUND_2_FLAG; 128 129 /* Reset timer */ 130 return kvm_timer_vcpu_reset(vcpu); 131 } 132