1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2f4672752SMarc Zyngier /* 3f4672752SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 4f4672752SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 5f4672752SMarc Zyngier * 6f4672752SMarc Zyngier * Derived from arch/arm/kvm/reset.c 7f4672752SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 8f4672752SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 9f4672752SMarc Zyngier */ 10f4672752SMarc Zyngier 11f4672752SMarc Zyngier #include <linux/errno.h> 129a3cdf26SDave Martin #include <linux/kernel.h> 13f4672752SMarc Zyngier #include <linux/kvm_host.h> 14f4672752SMarc Zyngier #include <linux/kvm.h> 15834bf887SAlex Bennée #include <linux/hw_breakpoint.h> 169033bba4SDave Martin #include <linux/slab.h> 179a3cdf26SDave Martin #include <linux/string.h> 189033bba4SDave Martin #include <linux/types.h> 19f4672752SMarc Zyngier 20003300deSMarc Zyngier #include <kvm/arm_arch_timer.h> 21003300deSMarc Zyngier 227665f3a8SSuzuki K Poulose #include <asm/cpufeature.h> 23f4672752SMarc Zyngier #include <asm/cputype.h> 249033bba4SDave Martin #include <asm/fpsimd.h> 25f4672752SMarc Zyngier #include <asm/ptrace.h> 26f4672752SMarc Zyngier #include <asm/kvm_arm.h> 2767f69197SAKASHI Takahiro #include <asm/kvm_asm.h> 28358b28f0SMarc Zyngier #include <asm/kvm_emulate.h> 2967f69197SAKASHI Takahiro #include <asm/kvm_mmu.h> 309a3cdf26SDave Martin #include <asm/virt.h> 31f4672752SMarc Zyngier 320f62f0e9SSuzuki K Poulose /* Maximum phys_shift supported for any VM on this host */ 330f62f0e9SSuzuki K Poulose static u32 kvm_ipa_limit; 340f62f0e9SSuzuki K Poulose 35f4672752SMarc Zyngier /* 36f4672752SMarc Zyngier * ARMv8 Reset Values 37f4672752SMarc Zyngier */ 38349c330cSMarc Zyngier #define VCPU_RESET_PSTATE_EL1 (PSR_MODE_EL1h | PSR_A_BIT | PSR_I_BIT | \ 39349c330cSMarc Zyngier PSR_F_BIT | PSR_D_BIT) 40f4672752SMarc Zyngier 41349c330cSMarc Zyngier #define VCPU_RESET_PSTATE_SVC (PSR_AA32_MODE_SVC | PSR_AA32_A_BIT | \ 42349c330cSMarc Zyngier PSR_AA32_I_BIT | PSR_AA32_F_BIT) 430d854a60SMarc Zyngier 449033bba4SDave Martin unsigned int kvm_sve_max_vl; 459033bba4SDave Martin 46a3be836dSDave Martin int kvm_arm_init_sve(void) 479033bba4SDave Martin { 489033bba4SDave Martin if (system_supports_sve()) { 49b5bc00ffSMark Brown kvm_sve_max_vl = sve_max_virtualisable_vl(); 509033bba4SDave Martin 519033bba4SDave Martin /* 529033bba4SDave Martin * The get_sve_reg()/set_sve_reg() ioctl interface will need 539033bba4SDave Martin * to be extended with multiple register slice support in 549033bba4SDave Martin * order to support vector lengths greater than 559033bba4SDave Martin * SVE_VL_ARCH_MAX: 569033bba4SDave Martin */ 579033bba4SDave Martin if (WARN_ON(kvm_sve_max_vl > SVE_VL_ARCH_MAX)) 589033bba4SDave Martin kvm_sve_max_vl = SVE_VL_ARCH_MAX; 599033bba4SDave Martin 609033bba4SDave Martin /* 619033bba4SDave Martin * Don't even try to make use of vector lengths that 629033bba4SDave Martin * aren't available on all CPUs, for now: 639033bba4SDave Martin */ 64b5bc00ffSMark Brown if (kvm_sve_max_vl < sve_max_vl()) 659033bba4SDave Martin pr_warn("KVM: SVE vector length for guests limited to %u bytes\n", 669033bba4SDave Martin kvm_sve_max_vl); 679033bba4SDave Martin } 689033bba4SDave Martin 699033bba4SDave Martin return 0; 709033bba4SDave Martin } 719033bba4SDave Martin 729a3cdf26SDave Martin static int kvm_vcpu_enable_sve(struct kvm_vcpu *vcpu) 739a3cdf26SDave Martin { 749a3cdf26SDave Martin if (!system_supports_sve()) 759a3cdf26SDave Martin return -EINVAL; 769a3cdf26SDave Martin 779a3cdf26SDave Martin vcpu->arch.sve_max_vl = kvm_sve_max_vl; 789a3cdf26SDave Martin 799a3cdf26SDave Martin /* 809a3cdf26SDave Martin * Userspace can still customize the vector lengths by writing 819a3cdf26SDave Martin * KVM_REG_ARM64_SVE_VLS. Allocation is deferred until 829a3cdf26SDave Martin * kvm_arm_vcpu_finalize(), which freezes the configuration. 839a3cdf26SDave Martin */ 849a3cdf26SDave Martin vcpu->arch.flags |= KVM_ARM64_GUEST_HAS_SVE; 859a3cdf26SDave Martin 869a3cdf26SDave Martin return 0; 879a3cdf26SDave Martin } 889a3cdf26SDave Martin 899033bba4SDave Martin /* 909033bba4SDave Martin * Finalize vcpu's maximum SVE vector length, allocating 919033bba4SDave Martin * vcpu->arch.sve_state as necessary. 929033bba4SDave Martin */ 939033bba4SDave Martin static int kvm_vcpu_finalize_sve(struct kvm_vcpu *vcpu) 949033bba4SDave Martin { 959033bba4SDave Martin void *buf; 969033bba4SDave Martin unsigned int vl; 97*bff01a61SMarc Zyngier size_t reg_sz; 98*bff01a61SMarc Zyngier int ret; 999033bba4SDave Martin 1009033bba4SDave Martin vl = vcpu->arch.sve_max_vl; 1019033bba4SDave Martin 1029033bba4SDave Martin /* 103656012c7SFuad Tabba * Responsibility for these properties is shared between 1049033bba4SDave Martin * kvm_arm_init_arch_resources(), kvm_vcpu_enable_sve() and 1059033bba4SDave Martin * set_sve_vls(). Double-check here just to be sure: 1069033bba4SDave Martin */ 107b5bc00ffSMark Brown if (WARN_ON(!sve_vl_valid(vl) || vl > sve_max_virtualisable_vl() || 1089033bba4SDave Martin vl > SVE_VL_ARCH_MAX)) 1099033bba4SDave Martin return -EIO; 1109033bba4SDave Martin 111*bff01a61SMarc Zyngier reg_sz = vcpu_sve_state_size(vcpu); 112*bff01a61SMarc Zyngier buf = kzalloc(reg_sz, GFP_KERNEL_ACCOUNT); 1139033bba4SDave Martin if (!buf) 1149033bba4SDave Martin return -ENOMEM; 1159033bba4SDave Martin 116*bff01a61SMarc Zyngier ret = create_hyp_mappings(buf, buf + reg_sz, PAGE_HYP); 117*bff01a61SMarc Zyngier if (ret) { 118*bff01a61SMarc Zyngier kfree(buf); 119*bff01a61SMarc Zyngier return ret; 120*bff01a61SMarc Zyngier } 121*bff01a61SMarc Zyngier 1229033bba4SDave Martin vcpu->arch.sve_state = buf; 1239033bba4SDave Martin vcpu->arch.flags |= KVM_ARM64_VCPU_SVE_FINALIZED; 1249033bba4SDave Martin return 0; 1259033bba4SDave Martin } 1269033bba4SDave Martin 12792e68b2bSDave Martin int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature) 1289033bba4SDave Martin { 12992e68b2bSDave Martin switch (feature) { 1309033bba4SDave Martin case KVM_ARM_VCPU_SVE: 1319033bba4SDave Martin if (!vcpu_has_sve(vcpu)) 1329033bba4SDave Martin return -EINVAL; 1339033bba4SDave Martin 1349033bba4SDave Martin if (kvm_arm_vcpu_sve_finalized(vcpu)) 1359033bba4SDave Martin return -EPERM; 1369033bba4SDave Martin 1379033bba4SDave Martin return kvm_vcpu_finalize_sve(vcpu); 1389033bba4SDave Martin } 1399033bba4SDave Martin 1409033bba4SDave Martin return -EINVAL; 1419033bba4SDave Martin } 1429033bba4SDave Martin 1439033bba4SDave Martin bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu) 1449033bba4SDave Martin { 1459033bba4SDave Martin if (vcpu_has_sve(vcpu) && !kvm_arm_vcpu_sve_finalized(vcpu)) 1469033bba4SDave Martin return false; 1479033bba4SDave Martin 1489033bba4SDave Martin return true; 1499033bba4SDave Martin } 1509033bba4SDave Martin 15119bcc89eSSean Christopherson void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu) 15219bcc89eSSean Christopherson { 1539033bba4SDave Martin kfree(vcpu->arch.sve_state); 1549033bba4SDave Martin } 1559033bba4SDave Martin 1569a3cdf26SDave Martin static void kvm_vcpu_reset_sve(struct kvm_vcpu *vcpu) 1579a3cdf26SDave Martin { 1589a3cdf26SDave Martin if (vcpu_has_sve(vcpu)) 1599a3cdf26SDave Martin memset(vcpu->arch.sve_state, 0, vcpu_sve_state_size(vcpu)); 1609a3cdf26SDave Martin } 1619a3cdf26SDave Martin 162a22fa321SAmit Daniel Kachhap static int kvm_vcpu_enable_ptrauth(struct kvm_vcpu *vcpu) 163a22fa321SAmit Daniel Kachhap { 164a22fa321SAmit Daniel Kachhap /* 165a22fa321SAmit Daniel Kachhap * For now make sure that both address/generic pointer authentication 166aff7cce0SMarc Zyngier * features are requested by the userspace together and the system 167aff7cce0SMarc Zyngier * supports these capabilities. 168a22fa321SAmit Daniel Kachhap */ 169a22fa321SAmit Daniel Kachhap if (!test_bit(KVM_ARM_VCPU_PTRAUTH_ADDRESS, vcpu->arch.features) || 170aff7cce0SMarc Zyngier !test_bit(KVM_ARM_VCPU_PTRAUTH_GENERIC, vcpu->arch.features) || 171aff7cce0SMarc Zyngier !system_has_full_ptr_auth()) 172a22fa321SAmit Daniel Kachhap return -EINVAL; 173a22fa321SAmit Daniel Kachhap 174a22fa321SAmit Daniel Kachhap vcpu->arch.flags |= KVM_ARM64_GUEST_HAS_PTRAUTH; 175a22fa321SAmit Daniel Kachhap return 0; 176a22fa321SAmit Daniel Kachhap } 177a22fa321SAmit Daniel Kachhap 17866e94d5cSMarc Zyngier static bool vcpu_allowed_register_width(struct kvm_vcpu *vcpu) 17966e94d5cSMarc Zyngier { 18066e94d5cSMarc Zyngier struct kvm_vcpu *tmp; 18166e94d5cSMarc Zyngier bool is32bit; 18266e94d5cSMarc Zyngier int i; 18366e94d5cSMarc Zyngier 18466e94d5cSMarc Zyngier is32bit = vcpu_has_feature(vcpu, KVM_ARM_VCPU_EL1_32BIT); 18566e94d5cSMarc Zyngier if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1) && is32bit) 18666e94d5cSMarc Zyngier return false; 18766e94d5cSMarc Zyngier 188673638f4SSteven Price /* MTE is incompatible with AArch32 */ 189673638f4SSteven Price if (kvm_has_mte(vcpu->kvm) && is32bit) 190673638f4SSteven Price return false; 191673638f4SSteven Price 19266e94d5cSMarc Zyngier /* Check that the vcpus are either all 32bit or all 64bit */ 19366e94d5cSMarc Zyngier kvm_for_each_vcpu(i, tmp, vcpu->kvm) { 19466e94d5cSMarc Zyngier if (vcpu_has_feature(tmp, KVM_ARM_VCPU_EL1_32BIT) != is32bit) 19566e94d5cSMarc Zyngier return false; 19666e94d5cSMarc Zyngier } 19766e94d5cSMarc Zyngier 19866e94d5cSMarc Zyngier return true; 19966e94d5cSMarc Zyngier } 20066e94d5cSMarc Zyngier 201f4672752SMarc Zyngier /** 202f4672752SMarc Zyngier * kvm_reset_vcpu - sets core registers and sys_regs to reset value 203f4672752SMarc Zyngier * @vcpu: The VCPU pointer 204f4672752SMarc Zyngier * 205f4672752SMarc Zyngier * This function finds the right table above and sets the registers on 206edce2292SAndrea Gelmini * the virtual CPU struct to their architecturally defined reset 2079a3cdf26SDave Martin * values, except for registers whose reset is deferred until 2089a3cdf26SDave Martin * kvm_arm_vcpu_finalize(). 209e761a927SChristoffer Dall * 210e761a927SChristoffer Dall * Note: This function can be called from two paths: The KVM_ARM_VCPU_INIT 211e761a927SChristoffer Dall * ioctl or as part of handling a request issued by another VCPU in the PSCI 212e761a927SChristoffer Dall * handling code. In the first case, the VCPU will not be loaded, and in the 213e761a927SChristoffer Dall * second case the VCPU will be loaded. Because this function operates purely 214656012c7SFuad Tabba * on the memory-backed values of system registers, we want to do a full put if 215e761a927SChristoffer Dall * we were loaded (handling a request) and load the values back at the end of 216e761a927SChristoffer Dall * the function. Otherwise we leave the state alone. In both cases, we 217e761a927SChristoffer Dall * disable preemption around the vcpu reset as we would otherwise race with 218e761a927SChristoffer Dall * preempt notifiers which also call put/load. 219f4672752SMarc Zyngier */ 220f4672752SMarc Zyngier int kvm_reset_vcpu(struct kvm_vcpu *vcpu) 221f4672752SMarc Zyngier { 2226654f9dfSOliver Upton struct vcpu_reset_state reset_state; 22366b7e05dSSteven Price int ret; 224e761a927SChristoffer Dall bool loaded; 225349c330cSMarc Zyngier u32 pstate; 226e761a927SChristoffer Dall 2276654f9dfSOliver Upton mutex_lock(&vcpu->kvm->lock); 2286654f9dfSOliver Upton reset_state = vcpu->arch.reset_state; 2296654f9dfSOliver Upton WRITE_ONCE(vcpu->arch.reset_state.reset, false); 2306654f9dfSOliver Upton mutex_unlock(&vcpu->kvm->lock); 2316654f9dfSOliver Upton 232ebff0b0eSMarc Zyngier /* Reset PMU outside of the non-preemptible section */ 233ebff0b0eSMarc Zyngier kvm_pmu_vcpu_reset(vcpu); 234ebff0b0eSMarc Zyngier 235e761a927SChristoffer Dall preempt_disable(); 236e761a927SChristoffer Dall loaded = (vcpu->cpu != -1); 237e761a927SChristoffer Dall if (loaded) 238e761a927SChristoffer Dall kvm_arch_vcpu_put(vcpu); 239f4672752SMarc Zyngier 2409a3cdf26SDave Martin if (!kvm_arm_vcpu_sve_finalized(vcpu)) { 2419a3cdf26SDave Martin if (test_bit(KVM_ARM_VCPU_SVE, vcpu->arch.features)) { 2429a3cdf26SDave Martin ret = kvm_vcpu_enable_sve(vcpu); 2439a3cdf26SDave Martin if (ret) 2449a3cdf26SDave Martin goto out; 2459a3cdf26SDave Martin } 2469a3cdf26SDave Martin } else { 2479a3cdf26SDave Martin kvm_vcpu_reset_sve(vcpu); 2489a3cdf26SDave Martin } 2499a3cdf26SDave Martin 250a22fa321SAmit Daniel Kachhap if (test_bit(KVM_ARM_VCPU_PTRAUTH_ADDRESS, vcpu->arch.features) || 251a22fa321SAmit Daniel Kachhap test_bit(KVM_ARM_VCPU_PTRAUTH_GENERIC, vcpu->arch.features)) { 25266b7e05dSSteven Price if (kvm_vcpu_enable_ptrauth(vcpu)) { 25366b7e05dSSteven Price ret = -EINVAL; 254a22fa321SAmit Daniel Kachhap goto out; 255a22fa321SAmit Daniel Kachhap } 25666b7e05dSSteven Price } 257a22fa321SAmit Daniel Kachhap 25866e94d5cSMarc Zyngier if (!vcpu_allowed_register_width(vcpu)) { 25966b7e05dSSteven Price ret = -EINVAL; 260e761a927SChristoffer Dall goto out; 26166b7e05dSSteven Price } 26266e94d5cSMarc Zyngier 26366e94d5cSMarc Zyngier switch (vcpu->arch.target) { 26466e94d5cSMarc Zyngier default: 26566e94d5cSMarc Zyngier if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) { 266349c330cSMarc Zyngier pstate = VCPU_RESET_PSTATE_SVC; 2670d854a60SMarc Zyngier } else { 268349c330cSMarc Zyngier pstate = VCPU_RESET_PSTATE_EL1; 2690d854a60SMarc Zyngier } 2700d854a60SMarc Zyngier 27177da4303SMarc Zyngier if (kvm_vcpu_has_pmu(vcpu) && !kvm_arm_support_pmu_v3()) { 27277da4303SMarc Zyngier ret = -EINVAL; 27377da4303SMarc Zyngier goto out; 27477da4303SMarc Zyngier } 275f4672752SMarc Zyngier break; 276f4672752SMarc Zyngier } 277f4672752SMarc Zyngier 278f4672752SMarc Zyngier /* Reset core registers */ 279349c330cSMarc Zyngier memset(vcpu_gp_regs(vcpu), 0, sizeof(*vcpu_gp_regs(vcpu))); 28085d70374SMarc Zyngier memset(&vcpu->arch.ctxt.fp_regs, 0, sizeof(vcpu->arch.ctxt.fp_regs)); 28185d70374SMarc Zyngier vcpu->arch.ctxt.spsr_abt = 0; 28285d70374SMarc Zyngier vcpu->arch.ctxt.spsr_und = 0; 28385d70374SMarc Zyngier vcpu->arch.ctxt.spsr_irq = 0; 28485d70374SMarc Zyngier vcpu->arch.ctxt.spsr_fiq = 0; 285e47c2055SMarc Zyngier vcpu_gp_regs(vcpu)->pstate = pstate; 286f4672752SMarc Zyngier 287f4672752SMarc Zyngier /* Reset system registers */ 288f4672752SMarc Zyngier kvm_reset_sys_regs(vcpu); 289f4672752SMarc Zyngier 290358b28f0SMarc Zyngier /* 291358b28f0SMarc Zyngier * Additional reset state handling that PSCI may have imposed on us. 292358b28f0SMarc Zyngier * Must be done after all the sys_reg reset. 293358b28f0SMarc Zyngier */ 2946654f9dfSOliver Upton if (reset_state.reset) { 2956654f9dfSOliver Upton unsigned long target_pc = reset_state.pc; 296358b28f0SMarc Zyngier 297358b28f0SMarc Zyngier /* Gracefully handle Thumb2 entry point */ 298358b28f0SMarc Zyngier if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) { 299358b28f0SMarc Zyngier target_pc &= ~1UL; 300358b28f0SMarc Zyngier vcpu_set_thumb(vcpu); 301358b28f0SMarc Zyngier } 302358b28f0SMarc Zyngier 303358b28f0SMarc Zyngier /* Propagate caller endianness */ 3046654f9dfSOliver Upton if (reset_state.be) 305358b28f0SMarc Zyngier kvm_vcpu_set_be(vcpu); 306358b28f0SMarc Zyngier 307358b28f0SMarc Zyngier *vcpu_pc(vcpu) = target_pc; 3086654f9dfSOliver Upton vcpu_set_reg(vcpu, 0, reset_state.r0); 309358b28f0SMarc Zyngier } 310358b28f0SMarc Zyngier 311003300deSMarc Zyngier /* Reset timer */ 312e761a927SChristoffer Dall ret = kvm_timer_vcpu_reset(vcpu); 313e761a927SChristoffer Dall out: 314e761a927SChristoffer Dall if (loaded) 315e761a927SChristoffer Dall kvm_arch_vcpu_load(vcpu, smp_processor_id()); 316e761a927SChristoffer Dall preempt_enable(); 317e761a927SChristoffer Dall return ret; 318f4672752SMarc Zyngier } 3195b6c6742SSuzuki K Poulose 320c73433fcSAnshuman Khandual u32 get_kvm_ipa_limit(void) 321c73433fcSAnshuman Khandual { 322c73433fcSAnshuman Khandual return kvm_ipa_limit; 323c73433fcSAnshuman Khandual } 324c73433fcSAnshuman Khandual 325b130a8f7SMarc Zyngier int kvm_set_ipa_limit(void) 3260f62f0e9SSuzuki K Poulose { 327b31578f6SAnshuman Khandual unsigned int parange; 328f73531f0SAnshuman Khandual u64 mmfr0; 3290f62f0e9SSuzuki K Poulose 330f73531f0SAnshuman Khandual mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); 331f73531f0SAnshuman Khandual parange = cpuid_feature_extract_unsigned_field(mmfr0, 332f73531f0SAnshuman Khandual ID_AA64MMFR0_PARANGE_SHIFT); 3335e5df957SAnshuman Khandual /* 3345e5df957SAnshuman Khandual * IPA size beyond 48 bits could not be supported 3355e5df957SAnshuman Khandual * on either 4K or 16K page size. Hence let's cap 3365e5df957SAnshuman Khandual * it to 48 bits, in case it's reported as larger 3375e5df957SAnshuman Khandual * on the system. 3385e5df957SAnshuman Khandual */ 3395e5df957SAnshuman Khandual if (PAGE_SIZE != SZ_64K) 3405e5df957SAnshuman Khandual parange = min(parange, (unsigned int)ID_AA64MMFR0_PARANGE_48); 341b130a8f7SMarc Zyngier 342b130a8f7SMarc Zyngier /* 343b130a8f7SMarc Zyngier * Check with ARMv8.5-GTG that our PAGE_SIZE is supported at 344b130a8f7SMarc Zyngier * Stage-2. If not, things will stop very quickly. 345b130a8f7SMarc Zyngier */ 346b31578f6SAnshuman Khandual switch (cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_TGRAN_2_SHIFT)) { 34726f55386SJames Morse case ID_AA64MMFR0_TGRAN_2_SUPPORTED_NONE: 348b130a8f7SMarc Zyngier kvm_err("PAGE_SIZE not supported at Stage-2, giving up\n"); 349b130a8f7SMarc Zyngier return -EINVAL; 35026f55386SJames Morse case ID_AA64MMFR0_TGRAN_2_SUPPORTED_DEFAULT: 351b130a8f7SMarc Zyngier kvm_debug("PAGE_SIZE supported at Stage-2 (default)\n"); 352b130a8f7SMarc Zyngier break; 35326f55386SJames Morse case ID_AA64MMFR0_TGRAN_2_SUPPORTED_MIN ... ID_AA64MMFR0_TGRAN_2_SUPPORTED_MAX: 354b130a8f7SMarc Zyngier kvm_debug("PAGE_SIZE supported at Stage-2 (advertised)\n"); 355b130a8f7SMarc Zyngier break; 35626f55386SJames Morse default: 35726f55386SJames Morse kvm_err("Unsupported value for TGRAN_2, giving up\n"); 35826f55386SJames Morse return -EINVAL; 359b130a8f7SMarc Zyngier } 360b130a8f7SMarc Zyngier 361c9b69a0cSWill Deacon kvm_ipa_limit = id_aa64mmfr0_parange_to_phys_shift(parange); 3627d717558SMarc Zyngier kvm_info("IPA Size Limit: %d bits%s\n", kvm_ipa_limit, 3637d717558SMarc Zyngier ((kvm_ipa_limit < KVM_PHYS_SHIFT) ? 3647d717558SMarc Zyngier " (Reduced IPA size, limited VM/VMM compatibility)" : "")); 365b130a8f7SMarc Zyngier 366b130a8f7SMarc Zyngier return 0; 3670f62f0e9SSuzuki K Poulose } 3680f62f0e9SSuzuki K Poulose 369bca607ebSMarc Zyngier int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type) 3705b6c6742SSuzuki K Poulose { 371bcb25a2bSQuentin Perret u64 mmfr0, mmfr1; 372bcb25a2bSQuentin Perret u32 phys_shift; 3737665f3a8SSuzuki K Poulose 374233a7cb2SSuzuki K Poulose if (type & ~KVM_VM_TYPE_ARM_IPA_SIZE_MASK) 3755b6c6742SSuzuki K Poulose return -EINVAL; 3767665f3a8SSuzuki K Poulose 377233a7cb2SSuzuki K Poulose phys_shift = KVM_VM_TYPE_ARM_IPA_SIZE(type); 378233a7cb2SSuzuki K Poulose if (phys_shift) { 379233a7cb2SSuzuki K Poulose if (phys_shift > kvm_ipa_limit || 3809788c140SAnshuman Khandual phys_shift < ARM64_MIN_PARANGE_BITS) 381233a7cb2SSuzuki K Poulose return -EINVAL; 382233a7cb2SSuzuki K Poulose } else { 383233a7cb2SSuzuki K Poulose phys_shift = KVM_PHYS_SHIFT; 3847d717558SMarc Zyngier if (phys_shift > kvm_ipa_limit) { 3857d717558SMarc Zyngier pr_warn_once("%s using unsupported default IPA limit, upgrade your VMM\n", 3867d717558SMarc Zyngier current->comm); 3877d717558SMarc Zyngier return -EINVAL; 3887d717558SMarc Zyngier } 389233a7cb2SSuzuki K Poulose } 390233a7cb2SSuzuki K Poulose 391f73531f0SAnshuman Khandual mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); 392bcb25a2bSQuentin Perret mmfr1 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1); 393bcb25a2bSQuentin Perret kvm->arch.vtcr = kvm_get_vtcr(mmfr0, mmfr1, phys_shift); 3947665f3a8SSuzuki K Poulose 3955b6c6742SSuzuki K Poulose return 0; 3965b6c6742SSuzuki K Poulose } 397