xref: /openbmc/linux/arch/arm64/kvm/psci.c (revision 8a1e6bb3)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2012 - ARM Ltd
4  * Author: Marc Zyngier <marc.zyngier@arm.com>
5  */
6 
7 #include <linux/arm-smccc.h>
8 #include <linux/preempt.h>
9 #include <linux/kvm_host.h>
10 #include <linux/uaccess.h>
11 #include <linux/wait.h>
12 
13 #include <asm/cputype.h>
14 #include <asm/kvm_emulate.h>
15 
16 #include <kvm/arm_psci.h>
17 #include <kvm/arm_hypercalls.h>
18 
19 /*
20  * This is an implementation of the Power State Coordination Interface
21  * as described in ARM document number ARM DEN 0022A.
22  */
23 
24 #define AFFINITY_MASK(level)	~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
25 
26 static unsigned long psci_affinity_mask(unsigned long affinity_level)
27 {
28 	if (affinity_level <= 3)
29 		return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);
30 
31 	return 0;
32 }
33 
34 static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
35 {
36 	/*
37 	 * NOTE: For simplicity, we make VCPU suspend emulation to be
38 	 * same-as WFI (Wait-for-interrupt) emulation.
39 	 *
40 	 * This means for KVM the wakeup events are interrupts and
41 	 * this is consistent with intended use of StateID as described
42 	 * in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
43 	 *
44 	 * Further, we also treat power-down request to be same as
45 	 * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
46 	 * specification (ARM DEN 0022A). This means all suspend states
47 	 * for KVM will preserve the register state.
48 	 */
49 	kvm_vcpu_wfi(vcpu);
50 
51 	return PSCI_RET_SUCCESS;
52 }
53 
54 static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
55 {
56 	vcpu->arch.power_off = true;
57 	kvm_make_request(KVM_REQ_SLEEP, vcpu);
58 	kvm_vcpu_kick(vcpu);
59 }
60 
61 static inline bool kvm_psci_valid_affinity(struct kvm_vcpu *vcpu,
62 					   unsigned long affinity)
63 {
64 	return !(affinity & ~MPIDR_HWID_BITMASK);
65 }
66 
67 static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
68 {
69 	struct vcpu_reset_state *reset_state;
70 	struct kvm *kvm = source_vcpu->kvm;
71 	struct kvm_vcpu *vcpu = NULL;
72 	unsigned long cpu_id;
73 
74 	cpu_id = smccc_get_arg1(source_vcpu);
75 	if (!kvm_psci_valid_affinity(source_vcpu, cpu_id))
76 		return PSCI_RET_INVALID_PARAMS;
77 
78 	vcpu = kvm_mpidr_to_vcpu(kvm, cpu_id);
79 
80 	/*
81 	 * Make sure the caller requested a valid CPU and that the CPU is
82 	 * turned off.
83 	 */
84 	if (!vcpu)
85 		return PSCI_RET_INVALID_PARAMS;
86 	if (!vcpu->arch.power_off) {
87 		if (kvm_psci_version(source_vcpu) != KVM_ARM_PSCI_0_1)
88 			return PSCI_RET_ALREADY_ON;
89 		else
90 			return PSCI_RET_INVALID_PARAMS;
91 	}
92 
93 	reset_state = &vcpu->arch.reset_state;
94 
95 	reset_state->pc = smccc_get_arg2(source_vcpu);
96 
97 	/* Propagate caller endianness */
98 	reset_state->be = kvm_vcpu_is_be(source_vcpu);
99 
100 	/*
101 	 * NOTE: We always update r0 (or x0) because for PSCI v0.1
102 	 * the general purpose registers are undefined upon CPU_ON.
103 	 */
104 	reset_state->r0 = smccc_get_arg3(source_vcpu);
105 
106 	WRITE_ONCE(reset_state->reset, true);
107 	kvm_make_request(KVM_REQ_VCPU_RESET, vcpu);
108 
109 	/*
110 	 * Make sure the reset request is observed if the change to
111 	 * power_off is observed.
112 	 */
113 	smp_wmb();
114 
115 	vcpu->arch.power_off = false;
116 	kvm_vcpu_wake_up(vcpu);
117 
118 	return PSCI_RET_SUCCESS;
119 }
120 
121 static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
122 {
123 	int matching_cpus = 0;
124 	unsigned long i, mpidr;
125 	unsigned long target_affinity;
126 	unsigned long target_affinity_mask;
127 	unsigned long lowest_affinity_level;
128 	struct kvm *kvm = vcpu->kvm;
129 	struct kvm_vcpu *tmp;
130 
131 	target_affinity = smccc_get_arg1(vcpu);
132 	lowest_affinity_level = smccc_get_arg2(vcpu);
133 
134 	if (!kvm_psci_valid_affinity(vcpu, target_affinity))
135 		return PSCI_RET_INVALID_PARAMS;
136 
137 	/* Determine target affinity mask */
138 	target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
139 	if (!target_affinity_mask)
140 		return PSCI_RET_INVALID_PARAMS;
141 
142 	/* Ignore other bits of target affinity */
143 	target_affinity &= target_affinity_mask;
144 
145 	/*
146 	 * If one or more VCPU matching target affinity are running
147 	 * then ON else OFF
148 	 */
149 	kvm_for_each_vcpu(i, tmp, kvm) {
150 		mpidr = kvm_vcpu_get_mpidr_aff(tmp);
151 		if ((mpidr & target_affinity_mask) == target_affinity) {
152 			matching_cpus++;
153 			if (!tmp->arch.power_off)
154 				return PSCI_0_2_AFFINITY_LEVEL_ON;
155 		}
156 	}
157 
158 	if (!matching_cpus)
159 		return PSCI_RET_INVALID_PARAMS;
160 
161 	return PSCI_0_2_AFFINITY_LEVEL_OFF;
162 }
163 
164 static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type, u64 flags)
165 {
166 	unsigned long i;
167 	struct kvm_vcpu *tmp;
168 
169 	/*
170 	 * The KVM ABI specifies that a system event exit may call KVM_RUN
171 	 * again and may perform shutdown/reboot at a later time that when the
172 	 * actual request is made.  Since we are implementing PSCI and a
173 	 * caller of PSCI reboot and shutdown expects that the system shuts
174 	 * down or reboots immediately, let's make sure that VCPUs are not run
175 	 * after this call is handled and before the VCPUs have been
176 	 * re-initialized.
177 	 */
178 	kvm_for_each_vcpu(i, tmp, vcpu->kvm)
179 		tmp->arch.power_off = true;
180 	kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP);
181 
182 	memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
183 	vcpu->run->system_event.type = type;
184 	vcpu->run->system_event.flags = flags;
185 	vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
186 }
187 
188 static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
189 {
190 	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN, 0);
191 }
192 
193 static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
194 {
195 	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET, 0);
196 }
197 
198 static void kvm_psci_system_reset2(struct kvm_vcpu *vcpu)
199 {
200 	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET,
201 				 KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2);
202 }
203 
204 static void kvm_psci_narrow_to_32bit(struct kvm_vcpu *vcpu)
205 {
206 	int i;
207 
208 	/*
209 	 * Zero the input registers' upper 32 bits. They will be fully
210 	 * zeroed on exit, so we're fine changing them in place.
211 	 */
212 	for (i = 1; i < 4; i++)
213 		vcpu_set_reg(vcpu, i, lower_32_bits(vcpu_get_reg(vcpu, i)));
214 }
215 
216 static unsigned long kvm_psci_check_allowed_function(struct kvm_vcpu *vcpu, u32 fn)
217 {
218 	switch(fn) {
219 	case PSCI_0_2_FN64_CPU_SUSPEND:
220 	case PSCI_0_2_FN64_CPU_ON:
221 	case PSCI_0_2_FN64_AFFINITY_INFO:
222 		/* Disallow these functions for 32bit guests */
223 		if (vcpu_mode_is_32bit(vcpu))
224 			return PSCI_RET_NOT_SUPPORTED;
225 		break;
226 	}
227 
228 	return 0;
229 }
230 
231 static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
232 {
233 	struct kvm *kvm = vcpu->kvm;
234 	u32 psci_fn = smccc_get_function(vcpu);
235 	unsigned long val;
236 	int ret = 1;
237 
238 	val = kvm_psci_check_allowed_function(vcpu, psci_fn);
239 	if (val)
240 		goto out;
241 
242 	switch (psci_fn) {
243 	case PSCI_0_2_FN_PSCI_VERSION:
244 		/*
245 		 * Bits[31:16] = Major Version = 0
246 		 * Bits[15:0] = Minor Version = 2
247 		 */
248 		val = KVM_ARM_PSCI_0_2;
249 		break;
250 	case PSCI_0_2_FN_CPU_SUSPEND:
251 	case PSCI_0_2_FN64_CPU_SUSPEND:
252 		val = kvm_psci_vcpu_suspend(vcpu);
253 		break;
254 	case PSCI_0_2_FN_CPU_OFF:
255 		kvm_psci_vcpu_off(vcpu);
256 		val = PSCI_RET_SUCCESS;
257 		break;
258 	case PSCI_0_2_FN_CPU_ON:
259 		kvm_psci_narrow_to_32bit(vcpu);
260 		fallthrough;
261 	case PSCI_0_2_FN64_CPU_ON:
262 		mutex_lock(&kvm->lock);
263 		val = kvm_psci_vcpu_on(vcpu);
264 		mutex_unlock(&kvm->lock);
265 		break;
266 	case PSCI_0_2_FN_AFFINITY_INFO:
267 		kvm_psci_narrow_to_32bit(vcpu);
268 		fallthrough;
269 	case PSCI_0_2_FN64_AFFINITY_INFO:
270 		val = kvm_psci_vcpu_affinity_info(vcpu);
271 		break;
272 	case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
273 		/*
274 		 * Trusted OS is MP hence does not require migration
275 	         * or
276 		 * Trusted OS is not present
277 		 */
278 		val = PSCI_0_2_TOS_MP;
279 		break;
280 	case PSCI_0_2_FN_SYSTEM_OFF:
281 		kvm_psci_system_off(vcpu);
282 		/*
283 		 * We shouldn't be going back to guest VCPU after
284 		 * receiving SYSTEM_OFF request.
285 		 *
286 		 * If user space accidentally/deliberately resumes
287 		 * guest VCPU after SYSTEM_OFF request then guest
288 		 * VCPU should see internal failure from PSCI return
289 		 * value. To achieve this, we preload r0 (or x0) with
290 		 * PSCI return value INTERNAL_FAILURE.
291 		 */
292 		val = PSCI_RET_INTERNAL_FAILURE;
293 		ret = 0;
294 		break;
295 	case PSCI_0_2_FN_SYSTEM_RESET:
296 		kvm_psci_system_reset(vcpu);
297 		/*
298 		 * Same reason as SYSTEM_OFF for preloading r0 (or x0)
299 		 * with PSCI return value INTERNAL_FAILURE.
300 		 */
301 		val = PSCI_RET_INTERNAL_FAILURE;
302 		ret = 0;
303 		break;
304 	default:
305 		val = PSCI_RET_NOT_SUPPORTED;
306 		break;
307 	}
308 
309 out:
310 	smccc_set_retval(vcpu, val, 0, 0, 0);
311 	return ret;
312 }
313 
314 static int kvm_psci_1_x_call(struct kvm_vcpu *vcpu, u32 minor)
315 {
316 	u32 psci_fn = smccc_get_function(vcpu);
317 	u32 arg;
318 	unsigned long val;
319 	int ret = 1;
320 
321 	if (minor > 1)
322 		return -EINVAL;
323 
324 	switch(psci_fn) {
325 	case PSCI_0_2_FN_PSCI_VERSION:
326 		val = minor == 0 ? KVM_ARM_PSCI_1_0 : KVM_ARM_PSCI_1_1;
327 		break;
328 	case PSCI_1_0_FN_PSCI_FEATURES:
329 		arg = smccc_get_arg1(vcpu);
330 		val = kvm_psci_check_allowed_function(vcpu, arg);
331 		if (val)
332 			break;
333 
334 		switch(arg) {
335 		case PSCI_0_2_FN_PSCI_VERSION:
336 		case PSCI_0_2_FN_CPU_SUSPEND:
337 		case PSCI_0_2_FN64_CPU_SUSPEND:
338 		case PSCI_0_2_FN_CPU_OFF:
339 		case PSCI_0_2_FN_CPU_ON:
340 		case PSCI_0_2_FN64_CPU_ON:
341 		case PSCI_0_2_FN_AFFINITY_INFO:
342 		case PSCI_0_2_FN64_AFFINITY_INFO:
343 		case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
344 		case PSCI_0_2_FN_SYSTEM_OFF:
345 		case PSCI_0_2_FN_SYSTEM_RESET:
346 		case PSCI_1_0_FN_PSCI_FEATURES:
347 		case ARM_SMCCC_VERSION_FUNC_ID:
348 			val = 0;
349 			break;
350 		case PSCI_1_1_FN_SYSTEM_RESET2:
351 		case PSCI_1_1_FN64_SYSTEM_RESET2:
352 			if (minor >= 1) {
353 				val = 0;
354 				break;
355 			}
356 			fallthrough;
357 		default:
358 			val = PSCI_RET_NOT_SUPPORTED;
359 			break;
360 		}
361 		break;
362 	case PSCI_1_1_FN_SYSTEM_RESET2:
363 		kvm_psci_narrow_to_32bit(vcpu);
364 		fallthrough;
365 	case PSCI_1_1_FN64_SYSTEM_RESET2:
366 		if (minor >= 1) {
367 			arg = smccc_get_arg1(vcpu);
368 
369 			if (arg <= PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET ||
370 			    arg >= PSCI_1_1_RESET_TYPE_VENDOR_START) {
371 				kvm_psci_system_reset2(vcpu);
372 				vcpu_set_reg(vcpu, 0, PSCI_RET_INTERNAL_FAILURE);
373 				return 0;
374 			}
375 
376 			val = PSCI_RET_INVALID_PARAMS;
377 			break;
378 		}
379 		fallthrough;
380 	default:
381 		return kvm_psci_0_2_call(vcpu);
382 	}
383 
384 	smccc_set_retval(vcpu, val, 0, 0, 0);
385 	return ret;
386 }
387 
388 static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
389 {
390 	struct kvm *kvm = vcpu->kvm;
391 	u32 psci_fn = smccc_get_function(vcpu);
392 	unsigned long val;
393 
394 	switch (psci_fn) {
395 	case KVM_PSCI_FN_CPU_OFF:
396 		kvm_psci_vcpu_off(vcpu);
397 		val = PSCI_RET_SUCCESS;
398 		break;
399 	case KVM_PSCI_FN_CPU_ON:
400 		mutex_lock(&kvm->lock);
401 		val = kvm_psci_vcpu_on(vcpu);
402 		mutex_unlock(&kvm->lock);
403 		break;
404 	default:
405 		val = PSCI_RET_NOT_SUPPORTED;
406 		break;
407 	}
408 
409 	smccc_set_retval(vcpu, val, 0, 0, 0);
410 	return 1;
411 }
412 
413 /**
414  * kvm_psci_call - handle PSCI call if r0 value is in range
415  * @vcpu: Pointer to the VCPU struct
416  *
417  * Handle PSCI calls from guests through traps from HVC instructions.
418  * The calling convention is similar to SMC calls to the secure world
419  * where the function number is placed in r0.
420  *
421  * This function returns: > 0 (success), 0 (success but exit to user
422  * space), and < 0 (errors)
423  *
424  * Errors:
425  * -EINVAL: Unrecognized PSCI function
426  */
427 int kvm_psci_call(struct kvm_vcpu *vcpu)
428 {
429 	switch (kvm_psci_version(vcpu)) {
430 	case KVM_ARM_PSCI_1_1:
431 		return kvm_psci_1_x_call(vcpu, 1);
432 	case KVM_ARM_PSCI_1_0:
433 		return kvm_psci_1_x_call(vcpu, 0);
434 	case KVM_ARM_PSCI_0_2:
435 		return kvm_psci_0_2_call(vcpu);
436 	case KVM_ARM_PSCI_0_1:
437 		return kvm_psci_0_1_call(vcpu);
438 	default:
439 		return -EINVAL;
440 	}
441 }
442 
443 int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
444 {
445 	return 4;		/* PSCI version and three workaround registers */
446 }
447 
448 int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
449 {
450 	if (put_user(KVM_REG_ARM_PSCI_VERSION, uindices++))
451 		return -EFAULT;
452 
453 	if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1, uindices++))
454 		return -EFAULT;
455 
456 	if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, uindices++))
457 		return -EFAULT;
458 
459 	if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3, uindices++))
460 		return -EFAULT;
461 
462 	return 0;
463 }
464 
465 #define KVM_REG_FEATURE_LEVEL_WIDTH	4
466 #define KVM_REG_FEATURE_LEVEL_MASK	(BIT(KVM_REG_FEATURE_LEVEL_WIDTH) - 1)
467 
468 /*
469  * Convert the workaround level into an easy-to-compare number, where higher
470  * values mean better protection.
471  */
472 static int get_kernel_wa_level(u64 regid)
473 {
474 	switch (regid) {
475 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
476 		switch (arm64_get_spectre_v2_state()) {
477 		case SPECTRE_VULNERABLE:
478 			return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
479 		case SPECTRE_MITIGATED:
480 			return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL;
481 		case SPECTRE_UNAFFECTED:
482 			return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED;
483 		}
484 		return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
485 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
486 		switch (arm64_get_spectre_v4_state()) {
487 		case SPECTRE_MITIGATED:
488 			/*
489 			 * As for the hypercall discovery, we pretend we
490 			 * don't have any FW mitigation if SSBS is there at
491 			 * all times.
492 			 */
493 			if (cpus_have_final_cap(ARM64_SSBS))
494 				return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
495 			fallthrough;
496 		case SPECTRE_UNAFFECTED:
497 			return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
498 		case SPECTRE_VULNERABLE:
499 			return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
500 		}
501 		break;
502 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
503 		switch (arm64_get_spectre_bhb_state()) {
504 		case SPECTRE_VULNERABLE:
505 			return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
506 		case SPECTRE_MITIGATED:
507 			return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL;
508 		case SPECTRE_UNAFFECTED:
509 			return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED;
510 		}
511 		return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
512 	}
513 
514 	return -EINVAL;
515 }
516 
517 int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
518 {
519 	void __user *uaddr = (void __user *)(long)reg->addr;
520 	u64 val;
521 
522 	switch (reg->id) {
523 	case KVM_REG_ARM_PSCI_VERSION:
524 		val = kvm_psci_version(vcpu);
525 		break;
526 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
527 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
528 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
529 		val = get_kernel_wa_level(reg->id) & KVM_REG_FEATURE_LEVEL_MASK;
530 		break;
531 	default:
532 		return -ENOENT;
533 	}
534 
535 	if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)))
536 		return -EFAULT;
537 
538 	return 0;
539 }
540 
541 int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
542 {
543 	void __user *uaddr = (void __user *)(long)reg->addr;
544 	u64 val;
545 	int wa_level;
546 
547 	if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)))
548 		return -EFAULT;
549 
550 	switch (reg->id) {
551 	case KVM_REG_ARM_PSCI_VERSION:
552 	{
553 		bool wants_02;
554 
555 		wants_02 = test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features);
556 
557 		switch (val) {
558 		case KVM_ARM_PSCI_0_1:
559 			if (wants_02)
560 				return -EINVAL;
561 			vcpu->kvm->arch.psci_version = val;
562 			return 0;
563 		case KVM_ARM_PSCI_0_2:
564 		case KVM_ARM_PSCI_1_0:
565 		case KVM_ARM_PSCI_1_1:
566 			if (!wants_02)
567 				return -EINVAL;
568 			vcpu->kvm->arch.psci_version = val;
569 			return 0;
570 		}
571 		break;
572 	}
573 
574 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
575 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
576 		if (val & ~KVM_REG_FEATURE_LEVEL_MASK)
577 			return -EINVAL;
578 
579 		if (get_kernel_wa_level(reg->id) < val)
580 			return -EINVAL;
581 
582 		return 0;
583 
584 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
585 		if (val & ~(KVM_REG_FEATURE_LEVEL_MASK |
586 			    KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED))
587 			return -EINVAL;
588 
589 		/* The enabled bit must not be set unless the level is AVAIL. */
590 		if ((val & KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED) &&
591 		    (val & KVM_REG_FEATURE_LEVEL_MASK) != KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL)
592 			return -EINVAL;
593 
594 		/*
595 		 * Map all the possible incoming states to the only two we
596 		 * really want to deal with.
597 		 */
598 		switch (val & KVM_REG_FEATURE_LEVEL_MASK) {
599 		case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL:
600 		case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN:
601 			wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
602 			break;
603 		case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL:
604 		case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
605 			wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
606 			break;
607 		default:
608 			return -EINVAL;
609 		}
610 
611 		/*
612 		 * We can deal with NOT_AVAIL on NOT_REQUIRED, but not the
613 		 * other way around.
614 		 */
615 		if (get_kernel_wa_level(reg->id) < wa_level)
616 			return -EINVAL;
617 
618 		return 0;
619 	default:
620 		return -ENOENT;
621 	}
622 
623 	return -EINVAL;
624 }
625