1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Stand-alone page-table allocator for hyp stage-1 and guest stage-2. 4 * No bombay mix was harmed in the writing of this file. 5 * 6 * Copyright (C) 2020 Google LLC 7 * Author: Will Deacon <will@kernel.org> 8 */ 9 10 #include <linux/bitfield.h> 11 #include <asm/kvm_pgtable.h> 12 #include <asm/stage2_pgtable.h> 13 14 15 #define KVM_PTE_TYPE BIT(1) 16 #define KVM_PTE_TYPE_BLOCK 0 17 #define KVM_PTE_TYPE_PAGE 1 18 #define KVM_PTE_TYPE_TABLE 1 19 20 #define KVM_PTE_LEAF_ATTR_LO GENMASK(11, 2) 21 22 #define KVM_PTE_LEAF_ATTR_LO_S1_ATTRIDX GENMASK(4, 2) 23 #define KVM_PTE_LEAF_ATTR_LO_S1_AP GENMASK(7, 6) 24 #define KVM_PTE_LEAF_ATTR_LO_S1_AP_RO 3 25 #define KVM_PTE_LEAF_ATTR_LO_S1_AP_RW 1 26 #define KVM_PTE_LEAF_ATTR_LO_S1_SH GENMASK(9, 8) 27 #define KVM_PTE_LEAF_ATTR_LO_S1_SH_IS 3 28 #define KVM_PTE_LEAF_ATTR_LO_S1_AF BIT(10) 29 30 #define KVM_PTE_LEAF_ATTR_LO_S2_MEMATTR GENMASK(5, 2) 31 #define KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R BIT(6) 32 #define KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W BIT(7) 33 #define KVM_PTE_LEAF_ATTR_LO_S2_SH GENMASK(9, 8) 34 #define KVM_PTE_LEAF_ATTR_LO_S2_SH_IS 3 35 #define KVM_PTE_LEAF_ATTR_LO_S2_AF BIT(10) 36 37 #define KVM_PTE_LEAF_ATTR_HI GENMASK(63, 51) 38 39 #define KVM_PTE_LEAF_ATTR_HI_SW GENMASK(58, 55) 40 41 #define KVM_PTE_LEAF_ATTR_HI_S1_XN BIT(54) 42 43 #define KVM_PTE_LEAF_ATTR_HI_S2_XN BIT(54) 44 45 #define KVM_PTE_LEAF_ATTR_S2_PERMS (KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R | \ 46 KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W | \ 47 KVM_PTE_LEAF_ATTR_HI_S2_XN) 48 49 #define KVM_INVALID_PTE_OWNER_MASK GENMASK(9, 2) 50 #define KVM_MAX_OWNER_ID 1 51 52 /* 53 * Used to indicate a pte for which a 'break-before-make' sequence is in 54 * progress. 55 */ 56 #define KVM_INVALID_PTE_LOCKED BIT(10) 57 58 struct kvm_pgtable_walk_data { 59 struct kvm_pgtable_walker *walker; 60 61 const u64 start; 62 u64 addr; 63 const u64 end; 64 }; 65 66 static bool kvm_phys_is_valid(u64 phys) 67 { 68 return phys < BIT(id_aa64mmfr0_parange_to_phys_shift(ID_AA64MMFR0_EL1_PARANGE_MAX)); 69 } 70 71 static bool kvm_block_mapping_supported(const struct kvm_pgtable_visit_ctx *ctx, u64 phys) 72 { 73 u64 granule = kvm_granule_size(ctx->level); 74 75 if (!kvm_level_supports_block_mapping(ctx->level)) 76 return false; 77 78 if (granule > (ctx->end - ctx->addr)) 79 return false; 80 81 if (kvm_phys_is_valid(phys) && !IS_ALIGNED(phys, granule)) 82 return false; 83 84 return IS_ALIGNED(ctx->addr, granule); 85 } 86 87 static u32 kvm_pgtable_idx(struct kvm_pgtable_walk_data *data, u32 level) 88 { 89 u64 shift = kvm_granule_shift(level); 90 u64 mask = BIT(PAGE_SHIFT - 3) - 1; 91 92 return (data->addr >> shift) & mask; 93 } 94 95 static u32 kvm_pgd_page_idx(struct kvm_pgtable *pgt, u64 addr) 96 { 97 u64 shift = kvm_granule_shift(pgt->start_level - 1); /* May underflow */ 98 u64 mask = BIT(pgt->ia_bits) - 1; 99 100 return (addr & mask) >> shift; 101 } 102 103 static u32 kvm_pgd_pages(u32 ia_bits, u32 start_level) 104 { 105 struct kvm_pgtable pgt = { 106 .ia_bits = ia_bits, 107 .start_level = start_level, 108 }; 109 110 return kvm_pgd_page_idx(&pgt, -1ULL) + 1; 111 } 112 113 static bool kvm_pte_table(kvm_pte_t pte, u32 level) 114 { 115 if (level == KVM_PGTABLE_MAX_LEVELS - 1) 116 return false; 117 118 if (!kvm_pte_valid(pte)) 119 return false; 120 121 return FIELD_GET(KVM_PTE_TYPE, pte) == KVM_PTE_TYPE_TABLE; 122 } 123 124 static kvm_pte_t *kvm_pte_follow(kvm_pte_t pte, struct kvm_pgtable_mm_ops *mm_ops) 125 { 126 return mm_ops->phys_to_virt(kvm_pte_to_phys(pte)); 127 } 128 129 static void kvm_clear_pte(kvm_pte_t *ptep) 130 { 131 WRITE_ONCE(*ptep, 0); 132 } 133 134 static kvm_pte_t kvm_init_table_pte(kvm_pte_t *childp, struct kvm_pgtable_mm_ops *mm_ops) 135 { 136 kvm_pte_t pte = kvm_phys_to_pte(mm_ops->virt_to_phys(childp)); 137 138 pte |= FIELD_PREP(KVM_PTE_TYPE, KVM_PTE_TYPE_TABLE); 139 pte |= KVM_PTE_VALID; 140 return pte; 141 } 142 143 static kvm_pte_t kvm_init_valid_leaf_pte(u64 pa, kvm_pte_t attr, u32 level) 144 { 145 kvm_pte_t pte = kvm_phys_to_pte(pa); 146 u64 type = (level == KVM_PGTABLE_MAX_LEVELS - 1) ? KVM_PTE_TYPE_PAGE : 147 KVM_PTE_TYPE_BLOCK; 148 149 pte |= attr & (KVM_PTE_LEAF_ATTR_LO | KVM_PTE_LEAF_ATTR_HI); 150 pte |= FIELD_PREP(KVM_PTE_TYPE, type); 151 pte |= KVM_PTE_VALID; 152 153 return pte; 154 } 155 156 static kvm_pte_t kvm_init_invalid_leaf_owner(u8 owner_id) 157 { 158 return FIELD_PREP(KVM_INVALID_PTE_OWNER_MASK, owner_id); 159 } 160 161 static int kvm_pgtable_visitor_cb(struct kvm_pgtable_walk_data *data, 162 const struct kvm_pgtable_visit_ctx *ctx, 163 enum kvm_pgtable_walk_flags visit) 164 { 165 struct kvm_pgtable_walker *walker = data->walker; 166 167 /* Ensure the appropriate lock is held (e.g. RCU lock for stage-2 MMU) */ 168 WARN_ON_ONCE(kvm_pgtable_walk_shared(ctx) && !kvm_pgtable_walk_lock_held()); 169 return walker->cb(ctx, visit); 170 } 171 172 static bool kvm_pgtable_walk_continue(const struct kvm_pgtable_walker *walker, 173 int r) 174 { 175 /* 176 * Visitor callbacks return EAGAIN when the conditions that led to a 177 * fault are no longer reflected in the page tables due to a race to 178 * update a PTE. In the context of a fault handler this is interpreted 179 * as a signal to retry guest execution. 180 * 181 * Ignore the return code altogether for walkers outside a fault handler 182 * (e.g. write protecting a range of memory) and chug along with the 183 * page table walk. 184 */ 185 if (r == -EAGAIN) 186 return !(walker->flags & KVM_PGTABLE_WALK_HANDLE_FAULT); 187 188 return !r; 189 } 190 191 static int __kvm_pgtable_walk(struct kvm_pgtable_walk_data *data, 192 struct kvm_pgtable_mm_ops *mm_ops, kvm_pteref_t pgtable, u32 level); 193 194 static inline int __kvm_pgtable_visit(struct kvm_pgtable_walk_data *data, 195 struct kvm_pgtable_mm_ops *mm_ops, 196 kvm_pteref_t pteref, u32 level) 197 { 198 enum kvm_pgtable_walk_flags flags = data->walker->flags; 199 kvm_pte_t *ptep = kvm_dereference_pteref(data->walker, pteref); 200 struct kvm_pgtable_visit_ctx ctx = { 201 .ptep = ptep, 202 .old = READ_ONCE(*ptep), 203 .arg = data->walker->arg, 204 .mm_ops = mm_ops, 205 .start = data->start, 206 .addr = data->addr, 207 .end = data->end, 208 .level = level, 209 .flags = flags, 210 }; 211 int ret = 0; 212 bool reload = false; 213 kvm_pteref_t childp; 214 bool table = kvm_pte_table(ctx.old, level); 215 216 if (table && (ctx.flags & KVM_PGTABLE_WALK_TABLE_PRE)) { 217 ret = kvm_pgtable_visitor_cb(data, &ctx, KVM_PGTABLE_WALK_TABLE_PRE); 218 reload = true; 219 } 220 221 if (!table && (ctx.flags & KVM_PGTABLE_WALK_LEAF)) { 222 ret = kvm_pgtable_visitor_cb(data, &ctx, KVM_PGTABLE_WALK_LEAF); 223 reload = true; 224 } 225 226 /* 227 * Reload the page table after invoking the walker callback for leaf 228 * entries or after pre-order traversal, to allow the walker to descend 229 * into a newly installed or replaced table. 230 */ 231 if (reload) { 232 ctx.old = READ_ONCE(*ptep); 233 table = kvm_pte_table(ctx.old, level); 234 } 235 236 if (!kvm_pgtable_walk_continue(data->walker, ret)) 237 goto out; 238 239 if (!table) { 240 data->addr = ALIGN_DOWN(data->addr, kvm_granule_size(level)); 241 data->addr += kvm_granule_size(level); 242 goto out; 243 } 244 245 childp = (kvm_pteref_t)kvm_pte_follow(ctx.old, mm_ops); 246 ret = __kvm_pgtable_walk(data, mm_ops, childp, level + 1); 247 if (!kvm_pgtable_walk_continue(data->walker, ret)) 248 goto out; 249 250 if (ctx.flags & KVM_PGTABLE_WALK_TABLE_POST) 251 ret = kvm_pgtable_visitor_cb(data, &ctx, KVM_PGTABLE_WALK_TABLE_POST); 252 253 out: 254 if (kvm_pgtable_walk_continue(data->walker, ret)) 255 return 0; 256 257 return ret; 258 } 259 260 static int __kvm_pgtable_walk(struct kvm_pgtable_walk_data *data, 261 struct kvm_pgtable_mm_ops *mm_ops, kvm_pteref_t pgtable, u32 level) 262 { 263 u32 idx; 264 int ret = 0; 265 266 if (WARN_ON_ONCE(level >= KVM_PGTABLE_MAX_LEVELS)) 267 return -EINVAL; 268 269 for (idx = kvm_pgtable_idx(data, level); idx < PTRS_PER_PTE; ++idx) { 270 kvm_pteref_t pteref = &pgtable[idx]; 271 272 if (data->addr >= data->end) 273 break; 274 275 ret = __kvm_pgtable_visit(data, mm_ops, pteref, level); 276 if (ret) 277 break; 278 } 279 280 return ret; 281 } 282 283 static int _kvm_pgtable_walk(struct kvm_pgtable *pgt, struct kvm_pgtable_walk_data *data) 284 { 285 u32 idx; 286 int ret = 0; 287 u64 limit = BIT(pgt->ia_bits); 288 289 if (data->addr > limit || data->end > limit) 290 return -ERANGE; 291 292 if (!pgt->pgd) 293 return -EINVAL; 294 295 for (idx = kvm_pgd_page_idx(pgt, data->addr); data->addr < data->end; ++idx) { 296 kvm_pteref_t pteref = &pgt->pgd[idx * PTRS_PER_PTE]; 297 298 ret = __kvm_pgtable_walk(data, pgt->mm_ops, pteref, pgt->start_level); 299 if (ret) 300 break; 301 } 302 303 return ret; 304 } 305 306 int kvm_pgtable_walk(struct kvm_pgtable *pgt, u64 addr, u64 size, 307 struct kvm_pgtable_walker *walker) 308 { 309 struct kvm_pgtable_walk_data walk_data = { 310 .start = ALIGN_DOWN(addr, PAGE_SIZE), 311 .addr = ALIGN_DOWN(addr, PAGE_SIZE), 312 .end = PAGE_ALIGN(walk_data.addr + size), 313 .walker = walker, 314 }; 315 int r; 316 317 r = kvm_pgtable_walk_begin(walker); 318 if (r) 319 return r; 320 321 r = _kvm_pgtable_walk(pgt, &walk_data); 322 kvm_pgtable_walk_end(walker); 323 324 return r; 325 } 326 327 struct leaf_walk_data { 328 kvm_pte_t pte; 329 u32 level; 330 }; 331 332 static int leaf_walker(const struct kvm_pgtable_visit_ctx *ctx, 333 enum kvm_pgtable_walk_flags visit) 334 { 335 struct leaf_walk_data *data = ctx->arg; 336 337 data->pte = ctx->old; 338 data->level = ctx->level; 339 340 return 0; 341 } 342 343 int kvm_pgtable_get_leaf(struct kvm_pgtable *pgt, u64 addr, 344 kvm_pte_t *ptep, u32 *level) 345 { 346 struct leaf_walk_data data; 347 struct kvm_pgtable_walker walker = { 348 .cb = leaf_walker, 349 .flags = KVM_PGTABLE_WALK_LEAF, 350 .arg = &data, 351 }; 352 int ret; 353 354 ret = kvm_pgtable_walk(pgt, ALIGN_DOWN(addr, PAGE_SIZE), 355 PAGE_SIZE, &walker); 356 if (!ret) { 357 if (ptep) 358 *ptep = data.pte; 359 if (level) 360 *level = data.level; 361 } 362 363 return ret; 364 } 365 366 struct hyp_map_data { 367 const u64 phys; 368 kvm_pte_t attr; 369 }; 370 371 static int hyp_set_prot_attr(enum kvm_pgtable_prot prot, kvm_pte_t *ptep) 372 { 373 bool device = prot & KVM_PGTABLE_PROT_DEVICE; 374 u32 mtype = device ? MT_DEVICE_nGnRE : MT_NORMAL; 375 kvm_pte_t attr = FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_ATTRIDX, mtype); 376 u32 sh = KVM_PTE_LEAF_ATTR_LO_S1_SH_IS; 377 u32 ap = (prot & KVM_PGTABLE_PROT_W) ? KVM_PTE_LEAF_ATTR_LO_S1_AP_RW : 378 KVM_PTE_LEAF_ATTR_LO_S1_AP_RO; 379 380 if (!(prot & KVM_PGTABLE_PROT_R)) 381 return -EINVAL; 382 383 if (prot & KVM_PGTABLE_PROT_X) { 384 if (prot & KVM_PGTABLE_PROT_W) 385 return -EINVAL; 386 387 if (device) 388 return -EINVAL; 389 } else { 390 attr |= KVM_PTE_LEAF_ATTR_HI_S1_XN; 391 } 392 393 attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_AP, ap); 394 attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_SH, sh); 395 attr |= KVM_PTE_LEAF_ATTR_LO_S1_AF; 396 attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW; 397 *ptep = attr; 398 399 return 0; 400 } 401 402 enum kvm_pgtable_prot kvm_pgtable_hyp_pte_prot(kvm_pte_t pte) 403 { 404 enum kvm_pgtable_prot prot = pte & KVM_PTE_LEAF_ATTR_HI_SW; 405 u32 ap; 406 407 if (!kvm_pte_valid(pte)) 408 return prot; 409 410 if (!(pte & KVM_PTE_LEAF_ATTR_HI_S1_XN)) 411 prot |= KVM_PGTABLE_PROT_X; 412 413 ap = FIELD_GET(KVM_PTE_LEAF_ATTR_LO_S1_AP, pte); 414 if (ap == KVM_PTE_LEAF_ATTR_LO_S1_AP_RO) 415 prot |= KVM_PGTABLE_PROT_R; 416 else if (ap == KVM_PTE_LEAF_ATTR_LO_S1_AP_RW) 417 prot |= KVM_PGTABLE_PROT_RW; 418 419 return prot; 420 } 421 422 static bool hyp_map_walker_try_leaf(const struct kvm_pgtable_visit_ctx *ctx, 423 struct hyp_map_data *data) 424 { 425 u64 phys = data->phys + (ctx->addr - ctx->start); 426 kvm_pte_t new; 427 428 if (!kvm_block_mapping_supported(ctx, phys)) 429 return false; 430 431 new = kvm_init_valid_leaf_pte(phys, data->attr, ctx->level); 432 if (ctx->old == new) 433 return true; 434 if (!kvm_pte_valid(ctx->old)) 435 ctx->mm_ops->get_page(ctx->ptep); 436 else if (WARN_ON((ctx->old ^ new) & ~KVM_PTE_LEAF_ATTR_HI_SW)) 437 return false; 438 439 smp_store_release(ctx->ptep, new); 440 return true; 441 } 442 443 static int hyp_map_walker(const struct kvm_pgtable_visit_ctx *ctx, 444 enum kvm_pgtable_walk_flags visit) 445 { 446 kvm_pte_t *childp, new; 447 struct hyp_map_data *data = ctx->arg; 448 struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops; 449 450 if (hyp_map_walker_try_leaf(ctx, data)) 451 return 0; 452 453 if (WARN_ON(ctx->level == KVM_PGTABLE_MAX_LEVELS - 1)) 454 return -EINVAL; 455 456 childp = (kvm_pte_t *)mm_ops->zalloc_page(NULL); 457 if (!childp) 458 return -ENOMEM; 459 460 new = kvm_init_table_pte(childp, mm_ops); 461 mm_ops->get_page(ctx->ptep); 462 smp_store_release(ctx->ptep, new); 463 464 return 0; 465 } 466 467 int kvm_pgtable_hyp_map(struct kvm_pgtable *pgt, u64 addr, u64 size, u64 phys, 468 enum kvm_pgtable_prot prot) 469 { 470 int ret; 471 struct hyp_map_data map_data = { 472 .phys = ALIGN_DOWN(phys, PAGE_SIZE), 473 }; 474 struct kvm_pgtable_walker walker = { 475 .cb = hyp_map_walker, 476 .flags = KVM_PGTABLE_WALK_LEAF, 477 .arg = &map_data, 478 }; 479 480 ret = hyp_set_prot_attr(prot, &map_data.attr); 481 if (ret) 482 return ret; 483 484 ret = kvm_pgtable_walk(pgt, addr, size, &walker); 485 dsb(ishst); 486 isb(); 487 return ret; 488 } 489 490 static int hyp_unmap_walker(const struct kvm_pgtable_visit_ctx *ctx, 491 enum kvm_pgtable_walk_flags visit) 492 { 493 kvm_pte_t *childp = NULL; 494 u64 granule = kvm_granule_size(ctx->level); 495 u64 *unmapped = ctx->arg; 496 struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops; 497 498 if (!kvm_pte_valid(ctx->old)) 499 return -EINVAL; 500 501 if (kvm_pte_table(ctx->old, ctx->level)) { 502 childp = kvm_pte_follow(ctx->old, mm_ops); 503 504 if (mm_ops->page_count(childp) != 1) 505 return 0; 506 507 kvm_clear_pte(ctx->ptep); 508 dsb(ishst); 509 __tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), ctx->level); 510 } else { 511 if (ctx->end - ctx->addr < granule) 512 return -EINVAL; 513 514 kvm_clear_pte(ctx->ptep); 515 dsb(ishst); 516 __tlbi_level(vale2is, __TLBI_VADDR(ctx->addr, 0), ctx->level); 517 *unmapped += granule; 518 } 519 520 dsb(ish); 521 isb(); 522 mm_ops->put_page(ctx->ptep); 523 524 if (childp) 525 mm_ops->put_page(childp); 526 527 return 0; 528 } 529 530 u64 kvm_pgtable_hyp_unmap(struct kvm_pgtable *pgt, u64 addr, u64 size) 531 { 532 u64 unmapped = 0; 533 struct kvm_pgtable_walker walker = { 534 .cb = hyp_unmap_walker, 535 .arg = &unmapped, 536 .flags = KVM_PGTABLE_WALK_LEAF | KVM_PGTABLE_WALK_TABLE_POST, 537 }; 538 539 if (!pgt->mm_ops->page_count) 540 return 0; 541 542 kvm_pgtable_walk(pgt, addr, size, &walker); 543 return unmapped; 544 } 545 546 int kvm_pgtable_hyp_init(struct kvm_pgtable *pgt, u32 va_bits, 547 struct kvm_pgtable_mm_ops *mm_ops) 548 { 549 u64 levels = ARM64_HW_PGTABLE_LEVELS(va_bits); 550 551 pgt->pgd = (kvm_pteref_t)mm_ops->zalloc_page(NULL); 552 if (!pgt->pgd) 553 return -ENOMEM; 554 555 pgt->ia_bits = va_bits; 556 pgt->start_level = KVM_PGTABLE_MAX_LEVELS - levels; 557 pgt->mm_ops = mm_ops; 558 pgt->mmu = NULL; 559 pgt->force_pte_cb = NULL; 560 561 return 0; 562 } 563 564 static int hyp_free_walker(const struct kvm_pgtable_visit_ctx *ctx, 565 enum kvm_pgtable_walk_flags visit) 566 { 567 struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops; 568 569 if (!kvm_pte_valid(ctx->old)) 570 return 0; 571 572 mm_ops->put_page(ctx->ptep); 573 574 if (kvm_pte_table(ctx->old, ctx->level)) 575 mm_ops->put_page(kvm_pte_follow(ctx->old, mm_ops)); 576 577 return 0; 578 } 579 580 void kvm_pgtable_hyp_destroy(struct kvm_pgtable *pgt) 581 { 582 struct kvm_pgtable_walker walker = { 583 .cb = hyp_free_walker, 584 .flags = KVM_PGTABLE_WALK_LEAF | KVM_PGTABLE_WALK_TABLE_POST, 585 }; 586 587 WARN_ON(kvm_pgtable_walk(pgt, 0, BIT(pgt->ia_bits), &walker)); 588 pgt->mm_ops->put_page(kvm_dereference_pteref(&walker, pgt->pgd)); 589 pgt->pgd = NULL; 590 } 591 592 struct stage2_map_data { 593 const u64 phys; 594 kvm_pte_t attr; 595 u8 owner_id; 596 597 kvm_pte_t *anchor; 598 kvm_pte_t *childp; 599 600 struct kvm_s2_mmu *mmu; 601 void *memcache; 602 603 /* Force mappings to page granularity */ 604 bool force_pte; 605 }; 606 607 u64 kvm_get_vtcr(u64 mmfr0, u64 mmfr1, u32 phys_shift) 608 { 609 u64 vtcr = VTCR_EL2_FLAGS; 610 u8 lvls; 611 612 vtcr |= kvm_get_parange(mmfr0) << VTCR_EL2_PS_SHIFT; 613 vtcr |= VTCR_EL2_T0SZ(phys_shift); 614 /* 615 * Use a minimum 2 level page table to prevent splitting 616 * host PMD huge pages at stage2. 617 */ 618 lvls = stage2_pgtable_levels(phys_shift); 619 if (lvls < 2) 620 lvls = 2; 621 vtcr |= VTCR_EL2_LVLS_TO_SL0(lvls); 622 623 #ifdef CONFIG_ARM64_HW_AFDBM 624 /* 625 * Enable the Hardware Access Flag management, unconditionally 626 * on all CPUs. The features is RES0 on CPUs without the support 627 * and must be ignored by the CPUs. 628 */ 629 vtcr |= VTCR_EL2_HA; 630 #endif /* CONFIG_ARM64_HW_AFDBM */ 631 632 /* Set the vmid bits */ 633 vtcr |= (get_vmid_bits(mmfr1) == 16) ? 634 VTCR_EL2_VS_16BIT : 635 VTCR_EL2_VS_8BIT; 636 637 return vtcr; 638 } 639 640 static bool stage2_has_fwb(struct kvm_pgtable *pgt) 641 { 642 if (!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) 643 return false; 644 645 return !(pgt->flags & KVM_PGTABLE_S2_NOFWB); 646 } 647 648 #define KVM_S2_MEMATTR(pgt, attr) PAGE_S2_MEMATTR(attr, stage2_has_fwb(pgt)) 649 650 static int stage2_set_prot_attr(struct kvm_pgtable *pgt, enum kvm_pgtable_prot prot, 651 kvm_pte_t *ptep) 652 { 653 bool device = prot & KVM_PGTABLE_PROT_DEVICE; 654 kvm_pte_t attr = device ? KVM_S2_MEMATTR(pgt, DEVICE_nGnRE) : 655 KVM_S2_MEMATTR(pgt, NORMAL); 656 u32 sh = KVM_PTE_LEAF_ATTR_LO_S2_SH_IS; 657 658 if (!(prot & KVM_PGTABLE_PROT_X)) 659 attr |= KVM_PTE_LEAF_ATTR_HI_S2_XN; 660 else if (device) 661 return -EINVAL; 662 663 if (prot & KVM_PGTABLE_PROT_R) 664 attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R; 665 666 if (prot & KVM_PGTABLE_PROT_W) 667 attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W; 668 669 attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S2_SH, sh); 670 attr |= KVM_PTE_LEAF_ATTR_LO_S2_AF; 671 attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW; 672 *ptep = attr; 673 674 return 0; 675 } 676 677 enum kvm_pgtable_prot kvm_pgtable_stage2_pte_prot(kvm_pte_t pte) 678 { 679 enum kvm_pgtable_prot prot = pte & KVM_PTE_LEAF_ATTR_HI_SW; 680 681 if (!kvm_pte_valid(pte)) 682 return prot; 683 684 if (pte & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R) 685 prot |= KVM_PGTABLE_PROT_R; 686 if (pte & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W) 687 prot |= KVM_PGTABLE_PROT_W; 688 if (!(pte & KVM_PTE_LEAF_ATTR_HI_S2_XN)) 689 prot |= KVM_PGTABLE_PROT_X; 690 691 return prot; 692 } 693 694 static bool stage2_pte_needs_update(kvm_pte_t old, kvm_pte_t new) 695 { 696 if (!kvm_pte_valid(old) || !kvm_pte_valid(new)) 697 return true; 698 699 return ((old ^ new) & (~KVM_PTE_LEAF_ATTR_S2_PERMS)); 700 } 701 702 static bool stage2_pte_is_counted(kvm_pte_t pte) 703 { 704 /* 705 * The refcount tracks valid entries as well as invalid entries if they 706 * encode ownership of a page to another entity than the page-table 707 * owner, whose id is 0. 708 */ 709 return !!pte; 710 } 711 712 static bool stage2_pte_is_locked(kvm_pte_t pte) 713 { 714 return !kvm_pte_valid(pte) && (pte & KVM_INVALID_PTE_LOCKED); 715 } 716 717 static bool stage2_try_set_pte(const struct kvm_pgtable_visit_ctx *ctx, kvm_pte_t new) 718 { 719 if (!kvm_pgtable_walk_shared(ctx)) { 720 WRITE_ONCE(*ctx->ptep, new); 721 return true; 722 } 723 724 return cmpxchg(ctx->ptep, ctx->old, new) == ctx->old; 725 } 726 727 /** 728 * stage2_try_break_pte() - Invalidates a pte according to the 729 * 'break-before-make' requirements of the 730 * architecture. 731 * 732 * @ctx: context of the visited pte. 733 * @mmu: stage-2 mmu 734 * 735 * Returns: true if the pte was successfully broken. 736 * 737 * If the removed pte was valid, performs the necessary serialization and TLB 738 * invalidation for the old value. For counted ptes, drops the reference count 739 * on the containing table page. 740 */ 741 static bool stage2_try_break_pte(const struct kvm_pgtable_visit_ctx *ctx, 742 struct kvm_s2_mmu *mmu) 743 { 744 struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops; 745 746 if (stage2_pte_is_locked(ctx->old)) { 747 /* 748 * Should never occur if this walker has exclusive access to the 749 * page tables. 750 */ 751 WARN_ON(!kvm_pgtable_walk_shared(ctx)); 752 return false; 753 } 754 755 if (!stage2_try_set_pte(ctx, KVM_INVALID_PTE_LOCKED)) 756 return false; 757 758 /* 759 * Perform the appropriate TLB invalidation based on the evicted pte 760 * value (if any). 761 */ 762 if (kvm_pte_table(ctx->old, ctx->level)) 763 kvm_call_hyp(__kvm_tlb_flush_vmid, mmu); 764 else if (kvm_pte_valid(ctx->old)) 765 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, ctx->addr, ctx->level); 766 767 if (stage2_pte_is_counted(ctx->old)) 768 mm_ops->put_page(ctx->ptep); 769 770 return true; 771 } 772 773 static void stage2_make_pte(const struct kvm_pgtable_visit_ctx *ctx, kvm_pte_t new) 774 { 775 struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops; 776 777 WARN_ON(!stage2_pte_is_locked(*ctx->ptep)); 778 779 if (stage2_pte_is_counted(new)) 780 mm_ops->get_page(ctx->ptep); 781 782 smp_store_release(ctx->ptep, new); 783 } 784 785 static void stage2_put_pte(const struct kvm_pgtable_visit_ctx *ctx, struct kvm_s2_mmu *mmu, 786 struct kvm_pgtable_mm_ops *mm_ops) 787 { 788 /* 789 * Clear the existing PTE, and perform break-before-make with 790 * TLB maintenance if it was valid. 791 */ 792 if (kvm_pte_valid(ctx->old)) { 793 kvm_clear_pte(ctx->ptep); 794 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, ctx->addr, ctx->level); 795 } 796 797 mm_ops->put_page(ctx->ptep); 798 } 799 800 static bool stage2_pte_cacheable(struct kvm_pgtable *pgt, kvm_pte_t pte) 801 { 802 u64 memattr = pte & KVM_PTE_LEAF_ATTR_LO_S2_MEMATTR; 803 return memattr == KVM_S2_MEMATTR(pgt, NORMAL); 804 } 805 806 static bool stage2_pte_executable(kvm_pte_t pte) 807 { 808 return !(pte & KVM_PTE_LEAF_ATTR_HI_S2_XN); 809 } 810 811 static u64 stage2_map_walker_phys_addr(const struct kvm_pgtable_visit_ctx *ctx, 812 const struct stage2_map_data *data) 813 { 814 u64 phys = data->phys; 815 816 /* 817 * Stage-2 walks to update ownership data are communicated to the map 818 * walker using an invalid PA. Avoid offsetting an already invalid PA, 819 * which could overflow and make the address valid again. 820 */ 821 if (!kvm_phys_is_valid(phys)) 822 return phys; 823 824 /* 825 * Otherwise, work out the correct PA based on how far the walk has 826 * gotten. 827 */ 828 return phys + (ctx->addr - ctx->start); 829 } 830 831 static bool stage2_leaf_mapping_allowed(const struct kvm_pgtable_visit_ctx *ctx, 832 struct stage2_map_data *data) 833 { 834 u64 phys = stage2_map_walker_phys_addr(ctx, data); 835 836 if (data->force_pte && (ctx->level < (KVM_PGTABLE_MAX_LEVELS - 1))) 837 return false; 838 839 return kvm_block_mapping_supported(ctx, phys); 840 } 841 842 static int stage2_map_walker_try_leaf(const struct kvm_pgtable_visit_ctx *ctx, 843 struct stage2_map_data *data) 844 { 845 kvm_pte_t new; 846 u64 phys = stage2_map_walker_phys_addr(ctx, data); 847 u64 granule = kvm_granule_size(ctx->level); 848 struct kvm_pgtable *pgt = data->mmu->pgt; 849 struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops; 850 851 if (!stage2_leaf_mapping_allowed(ctx, data)) 852 return -E2BIG; 853 854 if (kvm_phys_is_valid(phys)) 855 new = kvm_init_valid_leaf_pte(phys, data->attr, ctx->level); 856 else 857 new = kvm_init_invalid_leaf_owner(data->owner_id); 858 859 /* 860 * Skip updating the PTE if we are trying to recreate the exact 861 * same mapping or only change the access permissions. Instead, 862 * the vCPU will exit one more time from guest if still needed 863 * and then go through the path of relaxing permissions. 864 */ 865 if (!stage2_pte_needs_update(ctx->old, new)) 866 return -EAGAIN; 867 868 if (!stage2_try_break_pte(ctx, data->mmu)) 869 return -EAGAIN; 870 871 /* Perform CMOs before installation of the guest stage-2 PTE */ 872 if (mm_ops->dcache_clean_inval_poc && stage2_pte_cacheable(pgt, new)) 873 mm_ops->dcache_clean_inval_poc(kvm_pte_follow(new, mm_ops), 874 granule); 875 876 if (mm_ops->icache_inval_pou && stage2_pte_executable(new)) 877 mm_ops->icache_inval_pou(kvm_pte_follow(new, mm_ops), granule); 878 879 stage2_make_pte(ctx, new); 880 881 return 0; 882 } 883 884 static int stage2_map_walk_table_pre(const struct kvm_pgtable_visit_ctx *ctx, 885 struct stage2_map_data *data) 886 { 887 struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops; 888 kvm_pte_t *childp = kvm_pte_follow(ctx->old, mm_ops); 889 int ret; 890 891 if (!stage2_leaf_mapping_allowed(ctx, data)) 892 return 0; 893 894 ret = stage2_map_walker_try_leaf(ctx, data); 895 if (ret) 896 return ret; 897 898 mm_ops->free_removed_table(childp, ctx->level); 899 return 0; 900 } 901 902 static int stage2_map_walk_leaf(const struct kvm_pgtable_visit_ctx *ctx, 903 struct stage2_map_data *data) 904 { 905 struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops; 906 kvm_pte_t *childp, new; 907 int ret; 908 909 ret = stage2_map_walker_try_leaf(ctx, data); 910 if (ret != -E2BIG) 911 return ret; 912 913 if (WARN_ON(ctx->level == KVM_PGTABLE_MAX_LEVELS - 1)) 914 return -EINVAL; 915 916 if (!data->memcache) 917 return -ENOMEM; 918 919 childp = mm_ops->zalloc_page(data->memcache); 920 if (!childp) 921 return -ENOMEM; 922 923 if (!stage2_try_break_pte(ctx, data->mmu)) { 924 mm_ops->put_page(childp); 925 return -EAGAIN; 926 } 927 928 /* 929 * If we've run into an existing block mapping then replace it with 930 * a table. Accesses beyond 'end' that fall within the new table 931 * will be mapped lazily. 932 */ 933 new = kvm_init_table_pte(childp, mm_ops); 934 stage2_make_pte(ctx, new); 935 936 return 0; 937 } 938 939 /* 940 * The TABLE_PRE callback runs for table entries on the way down, looking 941 * for table entries which we could conceivably replace with a block entry 942 * for this mapping. If it finds one it replaces the entry and calls 943 * kvm_pgtable_mm_ops::free_removed_table() to tear down the detached table. 944 * 945 * Otherwise, the LEAF callback performs the mapping at the existing leaves 946 * instead. 947 */ 948 static int stage2_map_walker(const struct kvm_pgtable_visit_ctx *ctx, 949 enum kvm_pgtable_walk_flags visit) 950 { 951 struct stage2_map_data *data = ctx->arg; 952 953 switch (visit) { 954 case KVM_PGTABLE_WALK_TABLE_PRE: 955 return stage2_map_walk_table_pre(ctx, data); 956 case KVM_PGTABLE_WALK_LEAF: 957 return stage2_map_walk_leaf(ctx, data); 958 default: 959 return -EINVAL; 960 } 961 } 962 963 int kvm_pgtable_stage2_map(struct kvm_pgtable *pgt, u64 addr, u64 size, 964 u64 phys, enum kvm_pgtable_prot prot, 965 void *mc, enum kvm_pgtable_walk_flags flags) 966 { 967 int ret; 968 struct stage2_map_data map_data = { 969 .phys = ALIGN_DOWN(phys, PAGE_SIZE), 970 .mmu = pgt->mmu, 971 .memcache = mc, 972 .force_pte = pgt->force_pte_cb && pgt->force_pte_cb(addr, addr + size, prot), 973 }; 974 struct kvm_pgtable_walker walker = { 975 .cb = stage2_map_walker, 976 .flags = flags | 977 KVM_PGTABLE_WALK_TABLE_PRE | 978 KVM_PGTABLE_WALK_LEAF, 979 .arg = &map_data, 980 }; 981 982 if (WARN_ON((pgt->flags & KVM_PGTABLE_S2_IDMAP) && (addr != phys))) 983 return -EINVAL; 984 985 ret = stage2_set_prot_attr(pgt, prot, &map_data.attr); 986 if (ret) 987 return ret; 988 989 ret = kvm_pgtable_walk(pgt, addr, size, &walker); 990 dsb(ishst); 991 return ret; 992 } 993 994 int kvm_pgtable_stage2_set_owner(struct kvm_pgtable *pgt, u64 addr, u64 size, 995 void *mc, u8 owner_id) 996 { 997 int ret; 998 struct stage2_map_data map_data = { 999 .phys = KVM_PHYS_INVALID, 1000 .mmu = pgt->mmu, 1001 .memcache = mc, 1002 .owner_id = owner_id, 1003 .force_pte = true, 1004 }; 1005 struct kvm_pgtable_walker walker = { 1006 .cb = stage2_map_walker, 1007 .flags = KVM_PGTABLE_WALK_TABLE_PRE | 1008 KVM_PGTABLE_WALK_LEAF, 1009 .arg = &map_data, 1010 }; 1011 1012 if (owner_id > KVM_MAX_OWNER_ID) 1013 return -EINVAL; 1014 1015 ret = kvm_pgtable_walk(pgt, addr, size, &walker); 1016 return ret; 1017 } 1018 1019 static int stage2_unmap_walker(const struct kvm_pgtable_visit_ctx *ctx, 1020 enum kvm_pgtable_walk_flags visit) 1021 { 1022 struct kvm_pgtable *pgt = ctx->arg; 1023 struct kvm_s2_mmu *mmu = pgt->mmu; 1024 struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops; 1025 kvm_pte_t *childp = NULL; 1026 bool need_flush = false; 1027 1028 if (!kvm_pte_valid(ctx->old)) { 1029 if (stage2_pte_is_counted(ctx->old)) { 1030 kvm_clear_pte(ctx->ptep); 1031 mm_ops->put_page(ctx->ptep); 1032 } 1033 return 0; 1034 } 1035 1036 if (kvm_pte_table(ctx->old, ctx->level)) { 1037 childp = kvm_pte_follow(ctx->old, mm_ops); 1038 1039 if (mm_ops->page_count(childp) != 1) 1040 return 0; 1041 } else if (stage2_pte_cacheable(pgt, ctx->old)) { 1042 need_flush = !stage2_has_fwb(pgt); 1043 } 1044 1045 /* 1046 * This is similar to the map() path in that we unmap the entire 1047 * block entry and rely on the remaining portions being faulted 1048 * back lazily. 1049 */ 1050 stage2_put_pte(ctx, mmu, mm_ops); 1051 1052 if (need_flush && mm_ops->dcache_clean_inval_poc) 1053 mm_ops->dcache_clean_inval_poc(kvm_pte_follow(ctx->old, mm_ops), 1054 kvm_granule_size(ctx->level)); 1055 1056 if (childp) 1057 mm_ops->put_page(childp); 1058 1059 return 0; 1060 } 1061 1062 int kvm_pgtable_stage2_unmap(struct kvm_pgtable *pgt, u64 addr, u64 size) 1063 { 1064 struct kvm_pgtable_walker walker = { 1065 .cb = stage2_unmap_walker, 1066 .arg = pgt, 1067 .flags = KVM_PGTABLE_WALK_LEAF | KVM_PGTABLE_WALK_TABLE_POST, 1068 }; 1069 1070 return kvm_pgtable_walk(pgt, addr, size, &walker); 1071 } 1072 1073 struct stage2_attr_data { 1074 kvm_pte_t attr_set; 1075 kvm_pte_t attr_clr; 1076 kvm_pte_t pte; 1077 u32 level; 1078 }; 1079 1080 static int stage2_attr_walker(const struct kvm_pgtable_visit_ctx *ctx, 1081 enum kvm_pgtable_walk_flags visit) 1082 { 1083 kvm_pte_t pte = ctx->old; 1084 struct stage2_attr_data *data = ctx->arg; 1085 struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops; 1086 1087 if (!kvm_pte_valid(ctx->old)) 1088 return -EAGAIN; 1089 1090 data->level = ctx->level; 1091 data->pte = pte; 1092 pte &= ~data->attr_clr; 1093 pte |= data->attr_set; 1094 1095 /* 1096 * We may race with the CPU trying to set the access flag here, 1097 * but worst-case the access flag update gets lost and will be 1098 * set on the next access instead. 1099 */ 1100 if (data->pte != pte) { 1101 /* 1102 * Invalidate instruction cache before updating the guest 1103 * stage-2 PTE if we are going to add executable permission. 1104 */ 1105 if (mm_ops->icache_inval_pou && 1106 stage2_pte_executable(pte) && !stage2_pte_executable(ctx->old)) 1107 mm_ops->icache_inval_pou(kvm_pte_follow(pte, mm_ops), 1108 kvm_granule_size(ctx->level)); 1109 1110 if (!stage2_try_set_pte(ctx, pte)) 1111 return -EAGAIN; 1112 } 1113 1114 return 0; 1115 } 1116 1117 static int stage2_update_leaf_attrs(struct kvm_pgtable *pgt, u64 addr, 1118 u64 size, kvm_pte_t attr_set, 1119 kvm_pte_t attr_clr, kvm_pte_t *orig_pte, 1120 u32 *level, enum kvm_pgtable_walk_flags flags) 1121 { 1122 int ret; 1123 kvm_pte_t attr_mask = KVM_PTE_LEAF_ATTR_LO | KVM_PTE_LEAF_ATTR_HI; 1124 struct stage2_attr_data data = { 1125 .attr_set = attr_set & attr_mask, 1126 .attr_clr = attr_clr & attr_mask, 1127 }; 1128 struct kvm_pgtable_walker walker = { 1129 .cb = stage2_attr_walker, 1130 .arg = &data, 1131 .flags = flags | KVM_PGTABLE_WALK_LEAF, 1132 }; 1133 1134 ret = kvm_pgtable_walk(pgt, addr, size, &walker); 1135 if (ret) 1136 return ret; 1137 1138 if (orig_pte) 1139 *orig_pte = data.pte; 1140 1141 if (level) 1142 *level = data.level; 1143 return 0; 1144 } 1145 1146 int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size) 1147 { 1148 return stage2_update_leaf_attrs(pgt, addr, size, 0, 1149 KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W, 1150 NULL, NULL, 0); 1151 } 1152 1153 kvm_pte_t kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr) 1154 { 1155 kvm_pte_t pte = 0; 1156 int ret; 1157 1158 ret = stage2_update_leaf_attrs(pgt, addr, 1, KVM_PTE_LEAF_ATTR_LO_S2_AF, 0, 1159 &pte, NULL, 1160 KVM_PGTABLE_WALK_HANDLE_FAULT | 1161 KVM_PGTABLE_WALK_SHARED); 1162 if (!ret) 1163 dsb(ishst); 1164 1165 return pte; 1166 } 1167 1168 kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr) 1169 { 1170 kvm_pte_t pte = 0; 1171 stage2_update_leaf_attrs(pgt, addr, 1, 0, KVM_PTE_LEAF_ATTR_LO_S2_AF, 1172 &pte, NULL, 0); 1173 /* 1174 * "But where's the TLBI?!", you scream. 1175 * "Over in the core code", I sigh. 1176 * 1177 * See the '->clear_flush_young()' callback on the KVM mmu notifier. 1178 */ 1179 return pte; 1180 } 1181 1182 bool kvm_pgtable_stage2_is_young(struct kvm_pgtable *pgt, u64 addr) 1183 { 1184 kvm_pte_t pte = 0; 1185 stage2_update_leaf_attrs(pgt, addr, 1, 0, 0, &pte, NULL, 0); 1186 return pte & KVM_PTE_LEAF_ATTR_LO_S2_AF; 1187 } 1188 1189 int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr, 1190 enum kvm_pgtable_prot prot) 1191 { 1192 int ret; 1193 u32 level; 1194 kvm_pte_t set = 0, clr = 0; 1195 1196 if (prot & KVM_PTE_LEAF_ATTR_HI_SW) 1197 return -EINVAL; 1198 1199 if (prot & KVM_PGTABLE_PROT_R) 1200 set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R; 1201 1202 if (prot & KVM_PGTABLE_PROT_W) 1203 set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W; 1204 1205 if (prot & KVM_PGTABLE_PROT_X) 1206 clr |= KVM_PTE_LEAF_ATTR_HI_S2_XN; 1207 1208 ret = stage2_update_leaf_attrs(pgt, addr, 1, set, clr, NULL, &level, 1209 KVM_PGTABLE_WALK_HANDLE_FAULT | 1210 KVM_PGTABLE_WALK_SHARED); 1211 if (!ret) 1212 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, pgt->mmu, addr, level); 1213 return ret; 1214 } 1215 1216 static int stage2_flush_walker(const struct kvm_pgtable_visit_ctx *ctx, 1217 enum kvm_pgtable_walk_flags visit) 1218 { 1219 struct kvm_pgtable *pgt = ctx->arg; 1220 struct kvm_pgtable_mm_ops *mm_ops = pgt->mm_ops; 1221 1222 if (!kvm_pte_valid(ctx->old) || !stage2_pte_cacheable(pgt, ctx->old)) 1223 return 0; 1224 1225 if (mm_ops->dcache_clean_inval_poc) 1226 mm_ops->dcache_clean_inval_poc(kvm_pte_follow(ctx->old, mm_ops), 1227 kvm_granule_size(ctx->level)); 1228 return 0; 1229 } 1230 1231 int kvm_pgtable_stage2_flush(struct kvm_pgtable *pgt, u64 addr, u64 size) 1232 { 1233 struct kvm_pgtable_walker walker = { 1234 .cb = stage2_flush_walker, 1235 .flags = KVM_PGTABLE_WALK_LEAF, 1236 .arg = pgt, 1237 }; 1238 1239 if (stage2_has_fwb(pgt)) 1240 return 0; 1241 1242 return kvm_pgtable_walk(pgt, addr, size, &walker); 1243 } 1244 1245 1246 int __kvm_pgtable_stage2_init(struct kvm_pgtable *pgt, struct kvm_s2_mmu *mmu, 1247 struct kvm_pgtable_mm_ops *mm_ops, 1248 enum kvm_pgtable_stage2_flags flags, 1249 kvm_pgtable_force_pte_cb_t force_pte_cb) 1250 { 1251 size_t pgd_sz; 1252 u64 vtcr = mmu->arch->vtcr; 1253 u32 ia_bits = VTCR_EL2_IPA(vtcr); 1254 u32 sl0 = FIELD_GET(VTCR_EL2_SL0_MASK, vtcr); 1255 u32 start_level = VTCR_EL2_TGRAN_SL0_BASE - sl0; 1256 1257 pgd_sz = kvm_pgd_pages(ia_bits, start_level) * PAGE_SIZE; 1258 pgt->pgd = (kvm_pteref_t)mm_ops->zalloc_pages_exact(pgd_sz); 1259 if (!pgt->pgd) 1260 return -ENOMEM; 1261 1262 pgt->ia_bits = ia_bits; 1263 pgt->start_level = start_level; 1264 pgt->mm_ops = mm_ops; 1265 pgt->mmu = mmu; 1266 pgt->flags = flags; 1267 pgt->force_pte_cb = force_pte_cb; 1268 1269 /* Ensure zeroed PGD pages are visible to the hardware walker */ 1270 dsb(ishst); 1271 return 0; 1272 } 1273 1274 size_t kvm_pgtable_stage2_pgd_size(u64 vtcr) 1275 { 1276 u32 ia_bits = VTCR_EL2_IPA(vtcr); 1277 u32 sl0 = FIELD_GET(VTCR_EL2_SL0_MASK, vtcr); 1278 u32 start_level = VTCR_EL2_TGRAN_SL0_BASE - sl0; 1279 1280 return kvm_pgd_pages(ia_bits, start_level) * PAGE_SIZE; 1281 } 1282 1283 static int stage2_free_walker(const struct kvm_pgtable_visit_ctx *ctx, 1284 enum kvm_pgtable_walk_flags visit) 1285 { 1286 struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops; 1287 1288 if (!stage2_pte_is_counted(ctx->old)) 1289 return 0; 1290 1291 mm_ops->put_page(ctx->ptep); 1292 1293 if (kvm_pte_table(ctx->old, ctx->level)) 1294 mm_ops->put_page(kvm_pte_follow(ctx->old, mm_ops)); 1295 1296 return 0; 1297 } 1298 1299 void kvm_pgtable_stage2_destroy(struct kvm_pgtable *pgt) 1300 { 1301 size_t pgd_sz; 1302 struct kvm_pgtable_walker walker = { 1303 .cb = stage2_free_walker, 1304 .flags = KVM_PGTABLE_WALK_LEAF | 1305 KVM_PGTABLE_WALK_TABLE_POST, 1306 }; 1307 1308 WARN_ON(kvm_pgtable_walk(pgt, 0, BIT(pgt->ia_bits), &walker)); 1309 pgd_sz = kvm_pgd_pages(pgt->ia_bits, pgt->start_level) * PAGE_SIZE; 1310 pgt->mm_ops->free_pages_exact(kvm_dereference_pteref(&walker, pgt->pgd), pgd_sz); 1311 pgt->pgd = NULL; 1312 } 1313 1314 void kvm_pgtable_stage2_free_removed(struct kvm_pgtable_mm_ops *mm_ops, void *pgtable, u32 level) 1315 { 1316 kvm_pteref_t ptep = (kvm_pteref_t)pgtable; 1317 struct kvm_pgtable_walker walker = { 1318 .cb = stage2_free_walker, 1319 .flags = KVM_PGTABLE_WALK_LEAF | 1320 KVM_PGTABLE_WALK_TABLE_POST, 1321 }; 1322 struct kvm_pgtable_walk_data data = { 1323 .walker = &walker, 1324 1325 /* 1326 * At this point the IPA really doesn't matter, as the page 1327 * table being traversed has already been removed from the stage 1328 * 2. Set an appropriate range to cover the entire page table. 1329 */ 1330 .addr = 0, 1331 .end = kvm_granule_size(level), 1332 }; 1333 1334 WARN_ON(__kvm_pgtable_walk(&data, mm_ops, ptep, level + 1)); 1335 1336 WARN_ON(mm_ops->page_count(pgtable) != 1); 1337 mm_ops->put_page(pgtable); 1338 } 1339