xref: /openbmc/linux/arch/arm64/kvm/hyp/nvhe/hyp-main.c (revision 83946783)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2020 - Google Inc
4  * Author: Andrew Scull <ascull@google.com>
5  */
6 
7 #include <hyp/adjust_pc.h>
8 
9 #include <asm/pgtable-types.h>
10 #include <asm/kvm_asm.h>
11 #include <asm/kvm_emulate.h>
12 #include <asm/kvm_host.h>
13 #include <asm/kvm_hyp.h>
14 #include <asm/kvm_mmu.h>
15 
16 #include <nvhe/mem_protect.h>
17 #include <nvhe/mm.h>
18 #include <nvhe/trap_handler.h>
19 
20 DEFINE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params);
21 
22 void __kvm_hyp_host_forward_smc(struct kvm_cpu_context *host_ctxt);
23 
24 static void handle___kvm_vcpu_run(struct kvm_cpu_context *host_ctxt)
25 {
26 	DECLARE_REG(struct kvm_vcpu *, vcpu, host_ctxt, 1);
27 
28 	cpu_reg(host_ctxt, 1) =  __kvm_vcpu_run(kern_hyp_va(vcpu));
29 }
30 
31 static void handle___kvm_adjust_pc(struct kvm_cpu_context *host_ctxt)
32 {
33 	DECLARE_REG(struct kvm_vcpu *, vcpu, host_ctxt, 1);
34 
35 	__kvm_adjust_pc(kern_hyp_va(vcpu));
36 }
37 
38 static void handle___kvm_flush_vm_context(struct kvm_cpu_context *host_ctxt)
39 {
40 	__kvm_flush_vm_context();
41 }
42 
43 static void handle___kvm_tlb_flush_vmid_ipa(struct kvm_cpu_context *host_ctxt)
44 {
45 	DECLARE_REG(struct kvm_s2_mmu *, mmu, host_ctxt, 1);
46 	DECLARE_REG(phys_addr_t, ipa, host_ctxt, 2);
47 	DECLARE_REG(int, level, host_ctxt, 3);
48 
49 	__kvm_tlb_flush_vmid_ipa(kern_hyp_va(mmu), ipa, level);
50 }
51 
52 static void handle___kvm_tlb_flush_vmid(struct kvm_cpu_context *host_ctxt)
53 {
54 	DECLARE_REG(struct kvm_s2_mmu *, mmu, host_ctxt, 1);
55 
56 	__kvm_tlb_flush_vmid(kern_hyp_va(mmu));
57 }
58 
59 static void handle___kvm_flush_cpu_context(struct kvm_cpu_context *host_ctxt)
60 {
61 	DECLARE_REG(struct kvm_s2_mmu *, mmu, host_ctxt, 1);
62 
63 	__kvm_flush_cpu_context(kern_hyp_va(mmu));
64 }
65 
66 static void handle___kvm_timer_set_cntvoff(struct kvm_cpu_context *host_ctxt)
67 {
68 	__kvm_timer_set_cntvoff(cpu_reg(host_ctxt, 1));
69 }
70 
71 static void handle___kvm_enable_ssbs(struct kvm_cpu_context *host_ctxt)
72 {
73 	u64 tmp;
74 
75 	tmp = read_sysreg_el2(SYS_SCTLR);
76 	tmp |= SCTLR_ELx_DSSBS;
77 	write_sysreg_el2(tmp, SYS_SCTLR);
78 }
79 
80 static void handle___vgic_v3_get_gic_config(struct kvm_cpu_context *host_ctxt)
81 {
82 	cpu_reg(host_ctxt, 1) = __vgic_v3_get_gic_config();
83 }
84 
85 static void handle___vgic_v3_read_vmcr(struct kvm_cpu_context *host_ctxt)
86 {
87 	cpu_reg(host_ctxt, 1) = __vgic_v3_read_vmcr();
88 }
89 
90 static void handle___vgic_v3_write_vmcr(struct kvm_cpu_context *host_ctxt)
91 {
92 	__vgic_v3_write_vmcr(cpu_reg(host_ctxt, 1));
93 }
94 
95 static void handle___vgic_v3_init_lrs(struct kvm_cpu_context *host_ctxt)
96 {
97 	__vgic_v3_init_lrs();
98 }
99 
100 static void handle___kvm_get_mdcr_el2(struct kvm_cpu_context *host_ctxt)
101 {
102 	cpu_reg(host_ctxt, 1) = __kvm_get_mdcr_el2();
103 }
104 
105 static void handle___vgic_v3_save_aprs(struct kvm_cpu_context *host_ctxt)
106 {
107 	DECLARE_REG(struct vgic_v3_cpu_if *, cpu_if, host_ctxt, 1);
108 
109 	__vgic_v3_save_aprs(kern_hyp_va(cpu_if));
110 }
111 
112 static void handle___vgic_v3_restore_aprs(struct kvm_cpu_context *host_ctxt)
113 {
114 	DECLARE_REG(struct vgic_v3_cpu_if *, cpu_if, host_ctxt, 1);
115 
116 	__vgic_v3_restore_aprs(kern_hyp_va(cpu_if));
117 }
118 
119 static void handle___pkvm_init(struct kvm_cpu_context *host_ctxt)
120 {
121 	DECLARE_REG(phys_addr_t, phys, host_ctxt, 1);
122 	DECLARE_REG(unsigned long, size, host_ctxt, 2);
123 	DECLARE_REG(unsigned long, nr_cpus, host_ctxt, 3);
124 	DECLARE_REG(unsigned long *, per_cpu_base, host_ctxt, 4);
125 	DECLARE_REG(u32, hyp_va_bits, host_ctxt, 5);
126 
127 	/*
128 	 * __pkvm_init() will return only if an error occurred, otherwise it
129 	 * will tail-call in __pkvm_init_finalise() which will have to deal
130 	 * with the host context directly.
131 	 */
132 	cpu_reg(host_ctxt, 1) = __pkvm_init(phys, size, nr_cpus, per_cpu_base,
133 					    hyp_va_bits);
134 }
135 
136 static void handle___pkvm_cpu_set_vector(struct kvm_cpu_context *host_ctxt)
137 {
138 	DECLARE_REG(enum arm64_hyp_spectre_vector, slot, host_ctxt, 1);
139 
140 	cpu_reg(host_ctxt, 1) = pkvm_cpu_set_vector(slot);
141 }
142 
143 static void handle___pkvm_host_share_hyp(struct kvm_cpu_context *host_ctxt)
144 {
145 	DECLARE_REG(u64, pfn, host_ctxt, 1);
146 
147 	cpu_reg(host_ctxt, 1) = __pkvm_host_share_hyp(pfn);
148 }
149 
150 static void handle___pkvm_create_private_mapping(struct kvm_cpu_context *host_ctxt)
151 {
152 	DECLARE_REG(phys_addr_t, phys, host_ctxt, 1);
153 	DECLARE_REG(size_t, size, host_ctxt, 2);
154 	DECLARE_REG(enum kvm_pgtable_prot, prot, host_ctxt, 3);
155 
156 	cpu_reg(host_ctxt, 1) = __pkvm_create_private_mapping(phys, size, prot);
157 }
158 
159 static void handle___pkvm_prot_finalize(struct kvm_cpu_context *host_ctxt)
160 {
161 	cpu_reg(host_ctxt, 1) = __pkvm_prot_finalize();
162 }
163 
164 static void handle___pkvm_vcpu_init_traps(struct kvm_cpu_context *host_ctxt)
165 {
166 	DECLARE_REG(struct kvm_vcpu *, vcpu, host_ctxt, 1);
167 
168 	__pkvm_vcpu_init_traps(kern_hyp_va(vcpu));
169 }
170 
171 typedef void (*hcall_t)(struct kvm_cpu_context *);
172 
173 #define HANDLE_FUNC(x)	[__KVM_HOST_SMCCC_FUNC_##x] = (hcall_t)handle_##x
174 
175 static const hcall_t host_hcall[] = {
176 	/* ___kvm_hyp_init */
177 	HANDLE_FUNC(__kvm_get_mdcr_el2),
178 	HANDLE_FUNC(__pkvm_init),
179 	HANDLE_FUNC(__pkvm_create_private_mapping),
180 	HANDLE_FUNC(__pkvm_cpu_set_vector),
181 	HANDLE_FUNC(__kvm_enable_ssbs),
182 	HANDLE_FUNC(__vgic_v3_init_lrs),
183 	HANDLE_FUNC(__vgic_v3_get_gic_config),
184 	HANDLE_FUNC(__pkvm_prot_finalize),
185 
186 	HANDLE_FUNC(__pkvm_host_share_hyp),
187 	HANDLE_FUNC(__kvm_adjust_pc),
188 	HANDLE_FUNC(__kvm_vcpu_run),
189 	HANDLE_FUNC(__kvm_flush_vm_context),
190 	HANDLE_FUNC(__kvm_tlb_flush_vmid_ipa),
191 	HANDLE_FUNC(__kvm_tlb_flush_vmid),
192 	HANDLE_FUNC(__kvm_flush_cpu_context),
193 	HANDLE_FUNC(__kvm_timer_set_cntvoff),
194 	HANDLE_FUNC(__vgic_v3_read_vmcr),
195 	HANDLE_FUNC(__vgic_v3_write_vmcr),
196 	HANDLE_FUNC(__vgic_v3_save_aprs),
197 	HANDLE_FUNC(__vgic_v3_restore_aprs),
198 	HANDLE_FUNC(__pkvm_vcpu_init_traps),
199 };
200 
201 static void handle_host_hcall(struct kvm_cpu_context *host_ctxt)
202 {
203 	DECLARE_REG(unsigned long, id, host_ctxt, 0);
204 	unsigned long hcall_min = 0;
205 	hcall_t hfn;
206 
207 	/*
208 	 * If pKVM has been initialised then reject any calls to the
209 	 * early "privileged" hypercalls. Note that we cannot reject
210 	 * calls to __pkvm_prot_finalize for two reasons: (1) The static
211 	 * key used to determine initialisation must be toggled prior to
212 	 * finalisation and (2) finalisation is performed on a per-CPU
213 	 * basis. This is all fine, however, since __pkvm_prot_finalize
214 	 * returns -EPERM after the first call for a given CPU.
215 	 */
216 	if (static_branch_unlikely(&kvm_protected_mode_initialized))
217 		hcall_min = __KVM_HOST_SMCCC_FUNC___pkvm_prot_finalize;
218 
219 	id -= KVM_HOST_SMCCC_ID(0);
220 
221 	if (unlikely(id < hcall_min || id >= ARRAY_SIZE(host_hcall)))
222 		goto inval;
223 
224 	hfn = host_hcall[id];
225 	if (unlikely(!hfn))
226 		goto inval;
227 
228 	cpu_reg(host_ctxt, 0) = SMCCC_RET_SUCCESS;
229 	hfn(host_ctxt);
230 
231 	return;
232 inval:
233 	cpu_reg(host_ctxt, 0) = SMCCC_RET_NOT_SUPPORTED;
234 }
235 
236 static void default_host_smc_handler(struct kvm_cpu_context *host_ctxt)
237 {
238 	__kvm_hyp_host_forward_smc(host_ctxt);
239 }
240 
241 static void handle_host_smc(struct kvm_cpu_context *host_ctxt)
242 {
243 	bool handled;
244 
245 	handled = kvm_host_psci_handler(host_ctxt);
246 	if (!handled)
247 		default_host_smc_handler(host_ctxt);
248 
249 	/* SMC was trapped, move ELR past the current PC. */
250 	kvm_skip_host_instr();
251 }
252 
253 void handle_trap(struct kvm_cpu_context *host_ctxt)
254 {
255 	u64 esr = read_sysreg_el2(SYS_ESR);
256 
257 	switch (ESR_ELx_EC(esr)) {
258 	case ESR_ELx_EC_HVC64:
259 		handle_host_hcall(host_ctxt);
260 		break;
261 	case ESR_ELx_EC_SMC64:
262 		handle_host_smc(host_ctxt);
263 		break;
264 	case ESR_ELx_EC_SVE:
265 		sysreg_clear_set(cptr_el2, CPTR_EL2_TZ, 0);
266 		isb();
267 		sve_cond_update_zcr_vq(ZCR_ELx_LEN_MASK, SYS_ZCR_EL2);
268 		break;
269 	case ESR_ELx_EC_IABT_LOW:
270 	case ESR_ELx_EC_DABT_LOW:
271 		handle_host_mem_abort(host_ctxt);
272 		break;
273 	default:
274 		BUG();
275 	}
276 }
277