1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2012,2013 - ARM Ltd 4 * Author: Marc Zyngier <marc.zyngier@arm.com> 5 */ 6 7#include <linux/arm-smccc.h> 8#include <linux/linkage.h> 9 10#include <asm/alternative.h> 11#include <asm/assembler.h> 12#include <asm/el2_setup.h> 13#include <asm/kvm_arm.h> 14#include <asm/kvm_asm.h> 15#include <asm/kvm_mmu.h> 16#include <asm/pgtable-hwdef.h> 17#include <asm/sysreg.h> 18#include <asm/virt.h> 19 20 .text 21 .pushsection .idmap.text, "ax" 22 23 .align 11 24 25SYM_CODE_START(__kvm_hyp_init) 26 ventry __invalid // Synchronous EL2t 27 ventry __invalid // IRQ EL2t 28 ventry __invalid // FIQ EL2t 29 ventry __invalid // Error EL2t 30 31 ventry __invalid // Synchronous EL2h 32 ventry __invalid // IRQ EL2h 33 ventry __invalid // FIQ EL2h 34 ventry __invalid // Error EL2h 35 36 ventry __do_hyp_init // Synchronous 64-bit EL1 37 ventry __invalid // IRQ 64-bit EL1 38 ventry __invalid // FIQ 64-bit EL1 39 ventry __invalid // Error 64-bit EL1 40 41 ventry __invalid // Synchronous 32-bit EL1 42 ventry __invalid // IRQ 32-bit EL1 43 ventry __invalid // FIQ 32-bit EL1 44 ventry __invalid // Error 32-bit EL1 45 46__invalid: 47 b . 48 49 /* 50 * Only uses x0..x3 so as to not clobber callee-saved SMCCC registers. 51 * 52 * x0: SMCCC function ID 53 * x1: struct kvm_nvhe_init_params PA 54 */ 55__do_hyp_init: 56 /* Check for a stub HVC call */ 57 cmp x0, #HVC_STUB_HCALL_NR 58 b.lo __kvm_handle_stub_hvc 59 60 mov x3, #KVM_HOST_SMCCC_FUNC(__kvm_hyp_init) 61 cmp x0, x3 62 b.eq 1f 63 64 mov x0, #SMCCC_RET_NOT_SUPPORTED 65 eret 66 671: mov x0, x1 68 mov x3, lr 69 bl ___kvm_hyp_init // Clobbers x0..x2 70 mov lr, x3 71 72 /* Hello, World! */ 73 mov x0, #SMCCC_RET_SUCCESS 74 eret 75SYM_CODE_END(__kvm_hyp_init) 76 77/* 78 * Initialize the hypervisor in EL2. 79 * 80 * Only uses x0..x2 so as to not clobber callee-saved SMCCC registers 81 * and leave x3 for the caller. 82 * 83 * x0: struct kvm_nvhe_init_params PA 84 */ 85SYM_CODE_START_LOCAL(___kvm_hyp_init) 86 ldr x1, [x0, #NVHE_INIT_STACK_HYP_VA] 87 mov sp, x1 88 89 ldr x1, [x0, #NVHE_INIT_MAIR_EL2] 90 msr mair_el2, x1 91 92 ldr x1, [x0, #NVHE_INIT_HCR_EL2] 93 msr hcr_el2, x1 94 95 mov x2, #HCR_E2H 96 and x2, x1, x2 97 cbz x2, 1f 98 99 // hVHE: Replay the EL2 setup to account for the E2H bit 100 // TPIDR_EL2 is used to preserve x0 across the macro maze... 101 isb 102 msr tpidr_el2, x0 103 init_el2_state 104 finalise_el2_state 105 mrs x0, tpidr_el2 106 1071: 108 ldr x1, [x0, #NVHE_INIT_TPIDR_EL2] 109 msr tpidr_el2, x1 110 111 ldr x1, [x0, #NVHE_INIT_VTTBR] 112 msr vttbr_el2, x1 113 114 ldr x1, [x0, #NVHE_INIT_VTCR] 115 msr vtcr_el2, x1 116 117 ldr x1, [x0, #NVHE_INIT_PGD_PA] 118 phys_to_ttbr x2, x1 119alternative_if ARM64_HAS_CNP 120 orr x2, x2, #TTBR_CNP_BIT 121alternative_else_nop_endif 122 msr ttbr0_el2, x2 123 124 /* 125 * Set the PS bits in TCR_EL2. 126 */ 127 ldr x0, [x0, #NVHE_INIT_TCR_EL2] 128 tcr_compute_pa_size x0, #TCR_EL2_PS_SHIFT, x1, x2 129 msr tcr_el2, x0 130 131 isb 132 133 /* Invalidate the stale TLBs from Bootloader */ 134 tlbi alle2 135 tlbi vmalls12e1 136 dsb sy 137 138 mov_q x0, INIT_SCTLR_EL2_MMU_ON 139alternative_if ARM64_HAS_ADDRESS_AUTH 140 mov_q x1, (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | \ 141 SCTLR_ELx_ENDA | SCTLR_ELx_ENDB) 142 orr x0, x0, x1 143alternative_else_nop_endif 144 145#ifdef CONFIG_ARM64_BTI_KERNEL 146alternative_if ARM64_BTI 147 orr x0, x0, #SCTLR_EL2_BT 148alternative_else_nop_endif 149#endif /* CONFIG_ARM64_BTI_KERNEL */ 150 151 msr sctlr_el2, x0 152 isb 153 154 /* Set the host vector */ 155 ldr x0, =__kvm_hyp_host_vector 156 msr vbar_el2, x0 157 158 ret 159SYM_CODE_END(___kvm_hyp_init) 160 161/* 162 * PSCI CPU_ON entry point 163 * 164 * x0: struct kvm_nvhe_init_params PA 165 */ 166SYM_CODE_START(kvm_hyp_cpu_entry) 167 mov x1, #1 // is_cpu_on = true 168 b __kvm_hyp_init_cpu 169SYM_CODE_END(kvm_hyp_cpu_entry) 170 171/* 172 * PSCI CPU_SUSPEND / SYSTEM_SUSPEND entry point 173 * 174 * x0: struct kvm_nvhe_init_params PA 175 */ 176SYM_CODE_START(kvm_hyp_cpu_resume) 177 mov x1, #0 // is_cpu_on = false 178 b __kvm_hyp_init_cpu 179SYM_CODE_END(kvm_hyp_cpu_resume) 180 181/* 182 * Common code for CPU entry points. Initializes EL2 state and 183 * installs the hypervisor before handing over to a C handler. 184 * 185 * x0: struct kvm_nvhe_init_params PA 186 * x1: bool is_cpu_on 187 */ 188SYM_CODE_START_LOCAL(__kvm_hyp_init_cpu) 189 mov x28, x0 // Stash arguments 190 mov x29, x1 191 192 /* Check that the core was booted in EL2. */ 193 mrs x0, CurrentEL 194 cmp x0, #CurrentEL_EL2 195 b.eq 2f 196 197 /* The core booted in EL1. KVM cannot be initialized on it. */ 1981: wfe 199 wfi 200 b 1b 201 2022: msr SPsel, #1 // We want to use SP_EL{1,2} 203 204 /* Initialize EL2 CPU state to sane values. */ 205 init_el2_state // Clobbers x0..x2 206 finalise_el2_state 207 __init_el2_nvhe_prepare_eret 208 209 /* Enable MMU, set vectors and stack. */ 210 mov x0, x28 211 bl ___kvm_hyp_init // Clobbers x0..x2 212 213 /* Leave idmap. */ 214 mov x0, x29 215 ldr x1, =kvm_host_psci_cpu_entry 216 br x1 217SYM_CODE_END(__kvm_hyp_init_cpu) 218 219SYM_CODE_START(__kvm_handle_stub_hvc) 220 /* 221 * __kvm_handle_stub_hvc called from __host_hvc through branch instruction(br) so 222 * we need bti j at beginning. 223 */ 224 bti j 225 cmp x0, #HVC_SOFT_RESTART 226 b.ne 1f 227 228 /* This is where we're about to jump, staying at EL2 */ 229 msr elr_el2, x1 230 mov x0, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT | PSR_MODE_EL2h) 231 msr spsr_el2, x0 232 233 /* Shuffle the arguments, and don't come back */ 234 mov x0, x2 235 mov x1, x3 236 mov x2, x4 237 b reset 238 2391: cmp x0, #HVC_RESET_VECTORS 240 b.ne 1f 241 242 /* 243 * Set the HVC_RESET_VECTORS return code before entering the common 244 * path so that we do not clobber x0-x2 in case we are coming via 245 * HVC_SOFT_RESTART. 246 */ 247 mov x0, xzr 248reset: 249 /* Reset kvm back to the hyp stub. */ 250 mov_q x5, INIT_SCTLR_EL2_MMU_OFF 251 pre_disable_mmu_workaround 252 msr sctlr_el2, x5 253 isb 254 255alternative_if ARM64_KVM_PROTECTED_MODE 256 mov_q x5, HCR_HOST_NVHE_FLAGS 257 msr hcr_el2, x5 258alternative_else_nop_endif 259 260 /* Install stub vectors */ 261 adr_l x5, __hyp_stub_vectors 262 msr vbar_el2, x5 263 eret 264 2651: /* Bad stub call */ 266 mov_q x0, HVC_STUB_ERR 267 eret 268 269SYM_CODE_END(__kvm_handle_stub_hvc) 270 271SYM_FUNC_START(__pkvm_init_switch_pgd) 272 /* Turn the MMU off */ 273 pre_disable_mmu_workaround 274 mrs x2, sctlr_el2 275 bic x3, x2, #SCTLR_ELx_M 276 msr sctlr_el2, x3 277 isb 278 279 tlbi alle2 280 281 /* Install the new pgtables */ 282 ldr x3, [x0, #NVHE_INIT_PGD_PA] 283 phys_to_ttbr x4, x3 284alternative_if ARM64_HAS_CNP 285 orr x4, x4, #TTBR_CNP_BIT 286alternative_else_nop_endif 287 msr ttbr0_el2, x4 288 289 /* Set the new stack pointer */ 290 ldr x0, [x0, #NVHE_INIT_STACK_HYP_VA] 291 mov sp, x0 292 293 /* And turn the MMU back on! */ 294 set_sctlr_el2 x2 295 ret x1 296SYM_FUNC_END(__pkvm_init_switch_pgd) 297 298 .popsection 299