xref: /openbmc/linux/arch/arm64/kvm/handle_exit.c (revision 2f0754f2)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2012,2013 - ARM Ltd
4  * Author: Marc Zyngier <marc.zyngier@arm.com>
5  *
6  * Derived from arch/arm/kvm/handle_exit.c:
7  * Copyright (C) 2012 - Virtual Open Systems and Columbia University
8  * Author: Christoffer Dall <c.dall@virtualopensystems.com>
9  */
10 
11 #include <linux/kvm.h>
12 #include <linux/kvm_host.h>
13 
14 #include <asm/esr.h>
15 #include <asm/exception.h>
16 #include <asm/kvm_asm.h>
17 #include <asm/kvm_emulate.h>
18 #include <asm/kvm_mmu.h>
19 #include <asm/debug-monitors.h>
20 #include <asm/traps.h>
21 
22 #include <kvm/arm_hypercalls.h>
23 
24 #define CREATE_TRACE_POINTS
25 #include "trace_handle_exit.h"
26 
27 typedef int (*exit_handle_fn)(struct kvm_vcpu *);
28 
29 static void kvm_handle_guest_serror(struct kvm_vcpu *vcpu, u32 esr)
30 {
31 	if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(NULL, esr))
32 		kvm_inject_vabt(vcpu);
33 }
34 
35 static int handle_hvc(struct kvm_vcpu *vcpu)
36 {
37 	int ret;
38 
39 	trace_kvm_hvc_arm64(*vcpu_pc(vcpu), vcpu_get_reg(vcpu, 0),
40 			    kvm_vcpu_hvc_get_imm(vcpu));
41 	vcpu->stat.hvc_exit_stat++;
42 
43 	ret = kvm_hvc_call_handler(vcpu);
44 	if (ret < 0) {
45 		vcpu_set_reg(vcpu, 0, ~0UL);
46 		return 1;
47 	}
48 
49 	return ret;
50 }
51 
52 static int handle_smc(struct kvm_vcpu *vcpu)
53 {
54 	/*
55 	 * "If an SMC instruction executed at Non-secure EL1 is
56 	 * trapped to EL2 because HCR_EL2.TSC is 1, the exception is a
57 	 * Trap exception, not a Secure Monitor Call exception [...]"
58 	 *
59 	 * We need to advance the PC after the trap, as it would
60 	 * otherwise return to the same address...
61 	 */
62 	vcpu_set_reg(vcpu, 0, ~0UL);
63 	kvm_incr_pc(vcpu);
64 	return 1;
65 }
66 
67 /*
68  * Guest access to FP/ASIMD registers are routed to this handler only
69  * when the system doesn't support FP/ASIMD.
70  */
71 static int handle_no_fpsimd(struct kvm_vcpu *vcpu)
72 {
73 	kvm_inject_undefined(vcpu);
74 	return 1;
75 }
76 
77 /**
78  * kvm_handle_wfx - handle a wait-for-interrupts or wait-for-event
79  *		    instruction executed by a guest
80  *
81  * @vcpu:	the vcpu pointer
82  *
83  * WFE: Yield the CPU and come back to this vcpu when the scheduler
84  * decides to.
85  * WFI: Simply call kvm_vcpu_halt(), which will halt execution of
86  * world-switches and schedule other host processes until there is an
87  * incoming IRQ or FIQ to the VM.
88  */
89 static int kvm_handle_wfx(struct kvm_vcpu *vcpu)
90 {
91 	if (kvm_vcpu_get_esr(vcpu) & ESR_ELx_WFx_ISS_WFE) {
92 		trace_kvm_wfx_arm64(*vcpu_pc(vcpu), true);
93 		vcpu->stat.wfe_exit_stat++;
94 		kvm_vcpu_on_spin(vcpu, vcpu_mode_priv(vcpu));
95 	} else {
96 		trace_kvm_wfx_arm64(*vcpu_pc(vcpu), false);
97 		vcpu->stat.wfi_exit_stat++;
98 		kvm_vcpu_wfi(vcpu);
99 	}
100 
101 	kvm_incr_pc(vcpu);
102 
103 	return 1;
104 }
105 
106 /**
107  * kvm_handle_guest_debug - handle a debug exception instruction
108  *
109  * @vcpu:	the vcpu pointer
110  *
111  * We route all debug exceptions through the same handler. If both the
112  * guest and host are using the same debug facilities it will be up to
113  * userspace to re-inject the correct exception for guest delivery.
114  *
115  * @return: 0 (while setting vcpu->run->exit_reason)
116  */
117 static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu)
118 {
119 	struct kvm_run *run = vcpu->run;
120 	u32 esr = kvm_vcpu_get_esr(vcpu);
121 
122 	run->exit_reason = KVM_EXIT_DEBUG;
123 	run->debug.arch.hsr = esr;
124 
125 	if (ESR_ELx_EC(esr) == ESR_ELx_EC_WATCHPT_LOW)
126 		run->debug.arch.far = vcpu->arch.fault.far_el2;
127 
128 	return 0;
129 }
130 
131 static int kvm_handle_unknown_ec(struct kvm_vcpu *vcpu)
132 {
133 	u32 esr = kvm_vcpu_get_esr(vcpu);
134 
135 	kvm_pr_unimpl("Unknown exception class: esr: %#08x -- %s\n",
136 		      esr, esr_get_class_string(esr));
137 
138 	kvm_inject_undefined(vcpu);
139 	return 1;
140 }
141 
142 /*
143  * Guest access to SVE registers should be routed to this handler only
144  * when the system doesn't support SVE.
145  */
146 static int handle_sve(struct kvm_vcpu *vcpu)
147 {
148 	kvm_inject_undefined(vcpu);
149 	return 1;
150 }
151 
152 /*
153  * Guest usage of a ptrauth instruction (which the guest EL1 did not turn into
154  * a NOP). If we get here, it is that we didn't fixup ptrauth on exit, and all
155  * that we can do is give the guest an UNDEF.
156  */
157 static int kvm_handle_ptrauth(struct kvm_vcpu *vcpu)
158 {
159 	kvm_inject_undefined(vcpu);
160 	return 1;
161 }
162 
163 static exit_handle_fn arm_exit_handlers[] = {
164 	[0 ... ESR_ELx_EC_MAX]	= kvm_handle_unknown_ec,
165 	[ESR_ELx_EC_WFx]	= kvm_handle_wfx,
166 	[ESR_ELx_EC_CP15_32]	= kvm_handle_cp15_32,
167 	[ESR_ELx_EC_CP15_64]	= kvm_handle_cp15_64,
168 	[ESR_ELx_EC_CP14_MR]	= kvm_handle_cp14_32,
169 	[ESR_ELx_EC_CP14_LS]	= kvm_handle_cp14_load_store,
170 	[ESR_ELx_EC_CP14_64]	= kvm_handle_cp14_64,
171 	[ESR_ELx_EC_HVC32]	= handle_hvc,
172 	[ESR_ELx_EC_SMC32]	= handle_smc,
173 	[ESR_ELx_EC_HVC64]	= handle_hvc,
174 	[ESR_ELx_EC_SMC64]	= handle_smc,
175 	[ESR_ELx_EC_SYS64]	= kvm_handle_sys_reg,
176 	[ESR_ELx_EC_SVE]	= handle_sve,
177 	[ESR_ELx_EC_IABT_LOW]	= kvm_handle_guest_abort,
178 	[ESR_ELx_EC_DABT_LOW]	= kvm_handle_guest_abort,
179 	[ESR_ELx_EC_SOFTSTP_LOW]= kvm_handle_guest_debug,
180 	[ESR_ELx_EC_WATCHPT_LOW]= kvm_handle_guest_debug,
181 	[ESR_ELx_EC_BREAKPT_LOW]= kvm_handle_guest_debug,
182 	[ESR_ELx_EC_BKPT32]	= kvm_handle_guest_debug,
183 	[ESR_ELx_EC_BRK64]	= kvm_handle_guest_debug,
184 	[ESR_ELx_EC_FP_ASIMD]	= handle_no_fpsimd,
185 	[ESR_ELx_EC_PAC]	= kvm_handle_ptrauth,
186 };
187 
188 static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)
189 {
190 	u32 esr = kvm_vcpu_get_esr(vcpu);
191 	u8 esr_ec = ESR_ELx_EC(esr);
192 
193 	return arm_exit_handlers[esr_ec];
194 }
195 
196 /*
197  * We may be single-stepping an emulated instruction. If the emulation
198  * has been completed in the kernel, we can return to userspace with a
199  * KVM_EXIT_DEBUG, otherwise userspace needs to complete its
200  * emulation first.
201  */
202 static int handle_trap_exceptions(struct kvm_vcpu *vcpu)
203 {
204 	int handled;
205 
206 	/*
207 	 * See ARM ARM B1.14.1: "Hyp traps on instructions
208 	 * that fail their condition code check"
209 	 */
210 	if (!kvm_condition_valid(vcpu)) {
211 		kvm_incr_pc(vcpu);
212 		handled = 1;
213 	} else {
214 		exit_handle_fn exit_handler;
215 
216 		exit_handler = kvm_get_exit_handler(vcpu);
217 		handled = exit_handler(vcpu);
218 	}
219 
220 	return handled;
221 }
222 
223 /*
224  * Return > 0 to return to guest, < 0 on error, 0 (and set exit_reason) on
225  * proper exit to userspace.
226  */
227 int handle_exit(struct kvm_vcpu *vcpu, int exception_index)
228 {
229 	struct kvm_run *run = vcpu->run;
230 
231 	exception_index = ARM_EXCEPTION_CODE(exception_index);
232 
233 	switch (exception_index) {
234 	case ARM_EXCEPTION_IRQ:
235 		return 1;
236 	case ARM_EXCEPTION_EL1_SERROR:
237 		return 1;
238 	case ARM_EXCEPTION_TRAP:
239 		return handle_trap_exceptions(vcpu);
240 	case ARM_EXCEPTION_HYP_GONE:
241 		/*
242 		 * EL2 has been reset to the hyp-stub. This happens when a guest
243 		 * is pre-empted by kvm_reboot()'s shutdown call.
244 		 */
245 		run->exit_reason = KVM_EXIT_FAIL_ENTRY;
246 		return 0;
247 	case ARM_EXCEPTION_IL:
248 		/*
249 		 * We attempted an illegal exception return.  Guest state must
250 		 * have been corrupted somehow.  Give up.
251 		 */
252 		run->exit_reason = KVM_EXIT_FAIL_ENTRY;
253 		return -EINVAL;
254 	default:
255 		kvm_pr_unimpl("Unsupported exception type: %d",
256 			      exception_index);
257 		run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
258 		return 0;
259 	}
260 }
261 
262 /* For exit types that need handling before we can be preempted */
263 void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index)
264 {
265 	if (ARM_SERROR_PENDING(exception_index)) {
266 		if (this_cpu_has_cap(ARM64_HAS_RAS_EXTN)) {
267 			u64 disr = kvm_vcpu_get_disr(vcpu);
268 
269 			kvm_handle_guest_serror(vcpu, disr_to_esr(disr));
270 		} else {
271 			kvm_inject_vabt(vcpu);
272 		}
273 
274 		return;
275 	}
276 
277 	exception_index = ARM_EXCEPTION_CODE(exception_index);
278 
279 	if (exception_index == ARM_EXCEPTION_EL1_SERROR)
280 		kvm_handle_guest_serror(vcpu, kvm_vcpu_get_esr(vcpu));
281 }
282 
283 void __noreturn __cold nvhe_hyp_panic_handler(u64 esr, u64 spsr,
284 					      u64 elr_virt, u64 elr_phys,
285 					      u64 par, uintptr_t vcpu,
286 					      u64 far, u64 hpfar) {
287 	u64 elr_in_kimg = __phys_to_kimg(elr_phys);
288 	u64 hyp_offset = elr_in_kimg - kaslr_offset() - elr_virt;
289 	u64 mode = spsr & PSR_MODE_MASK;
290 
291 	/*
292 	 * The nVHE hyp symbols are not included by kallsyms to avoid issues
293 	 * with aliasing. That means that the symbols cannot be printed with the
294 	 * "%pS" format specifier, so fall back to the vmlinux address if
295 	 * there's no better option.
296 	 */
297 	if (mode != PSR_MODE_EL2t && mode != PSR_MODE_EL2h) {
298 		kvm_err("Invalid host exception to nVHE hyp!\n");
299 	} else if (ESR_ELx_EC(esr) == ESR_ELx_EC_BRK64 &&
300 		   (esr & ESR_ELx_BRK64_ISS_COMMENT_MASK) == BUG_BRK_IMM) {
301 		const char *file = NULL;
302 		unsigned int line = 0;
303 
304 		/* All hyp bugs, including warnings, are treated as fatal. */
305 		if (!is_protected_kvm_enabled() ||
306 		    IS_ENABLED(CONFIG_NVHE_EL2_DEBUG)) {
307 			struct bug_entry *bug = find_bug(elr_in_kimg);
308 
309 			if (bug)
310 				bug_get_file_line(bug, &file, &line);
311 		}
312 
313 		if (file)
314 			kvm_err("nVHE hyp BUG at: %s:%u!\n", file, line);
315 		else
316 			kvm_err("nVHE hyp BUG at: %016llx!\n", elr_virt + hyp_offset);
317 	} else {
318 		kvm_err("nVHE hyp panic at: %016llx!\n", elr_virt + hyp_offset);
319 	}
320 
321 	/*
322 	 * Hyp has panicked and we're going to handle that by panicking the
323 	 * kernel. The kernel offset will be revealed in the panic so we're
324 	 * also safe to reveal the hyp offset as a debugging aid for translating
325 	 * hyp VAs to vmlinux addresses.
326 	 */
327 	kvm_err("Hyp Offset: 0x%llx\n", hyp_offset);
328 
329 	panic("HYP panic:\nPS:%08llx PC:%016llx ESR:%08llx\nFAR:%016llx HPFAR:%016llx PAR:%016llx\nVCPU:%016lx\n",
330 	      spsr, elr_virt, esr, far, hpfar, par, vcpu);
331 }
332