1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 - Virtual Open Systems and Columbia University 4 * Author: Christoffer Dall <c.dall@virtualopensystems.com> 5 */ 6 7 #include <linux/bug.h> 8 #include <linux/cpu_pm.h> 9 #include <linux/errno.h> 10 #include <linux/err.h> 11 #include <linux/kvm_host.h> 12 #include <linux/list.h> 13 #include <linux/module.h> 14 #include <linux/vmalloc.h> 15 #include <linux/fs.h> 16 #include <linux/mman.h> 17 #include <linux/sched.h> 18 #include <linux/kvm.h> 19 #include <linux/kvm_irqfd.h> 20 #include <linux/irqbypass.h> 21 #include <linux/sched/stat.h> 22 #include <linux/psci.h> 23 #include <trace/events/kvm.h> 24 25 #define CREATE_TRACE_POINTS 26 #include "trace_arm.h" 27 28 #include <linux/uaccess.h> 29 #include <asm/ptrace.h> 30 #include <asm/mman.h> 31 #include <asm/tlbflush.h> 32 #include <asm/cacheflush.h> 33 #include <asm/cpufeature.h> 34 #include <asm/virt.h> 35 #include <asm/kvm_arm.h> 36 #include <asm/kvm_asm.h> 37 #include <asm/kvm_mmu.h> 38 #include <asm/kvm_emulate.h> 39 #include <asm/sections.h> 40 41 #include <kvm/arm_hypercalls.h> 42 #include <kvm/arm_pmu.h> 43 #include <kvm/arm_psci.h> 44 45 #ifdef REQUIRES_VIRT 46 __asm__(".arch_extension virt"); 47 #endif 48 49 static enum kvm_mode kvm_mode = KVM_MODE_DEFAULT; 50 DEFINE_STATIC_KEY_FALSE(kvm_protected_mode_initialized); 51 52 DECLARE_KVM_HYP_PER_CPU(unsigned long, kvm_hyp_vector); 53 54 static DEFINE_PER_CPU(unsigned long, kvm_arm_hyp_stack_page); 55 unsigned long kvm_arm_hyp_percpu_base[NR_CPUS]; 56 DECLARE_KVM_NVHE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params); 57 58 /* The VMID used in the VTTBR */ 59 static atomic64_t kvm_vmid_gen = ATOMIC64_INIT(1); 60 static u32 kvm_next_vmid; 61 static DEFINE_SPINLOCK(kvm_vmid_lock); 62 63 static bool vgic_present; 64 65 static DEFINE_PER_CPU(unsigned char, kvm_arm_hardware_enabled); 66 DEFINE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 67 68 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu) 69 { 70 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE; 71 } 72 73 int kvm_arch_hardware_setup(void *opaque) 74 { 75 return 0; 76 } 77 78 int kvm_arch_check_processor_compat(void *opaque) 79 { 80 return 0; 81 } 82 83 int kvm_vm_ioctl_enable_cap(struct kvm *kvm, 84 struct kvm_enable_cap *cap) 85 { 86 int r; 87 88 if (cap->flags) 89 return -EINVAL; 90 91 switch (cap->cap) { 92 case KVM_CAP_ARM_NISV_TO_USER: 93 r = 0; 94 kvm->arch.return_nisv_io_abort_to_user = true; 95 break; 96 default: 97 r = -EINVAL; 98 break; 99 } 100 101 return r; 102 } 103 104 static int kvm_arm_default_max_vcpus(void) 105 { 106 return vgic_present ? kvm_vgic_get_max_vcpus() : KVM_MAX_VCPUS; 107 } 108 109 static void set_default_spectre(struct kvm *kvm) 110 { 111 /* 112 * The default is to expose CSV2 == 1 if the HW isn't affected. 113 * Although this is a per-CPU feature, we make it global because 114 * asymmetric systems are just a nuisance. 115 * 116 * Userspace can override this as long as it doesn't promise 117 * the impossible. 118 */ 119 if (arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED) 120 kvm->arch.pfr0_csv2 = 1; 121 if (arm64_get_meltdown_state() == SPECTRE_UNAFFECTED) 122 kvm->arch.pfr0_csv3 = 1; 123 } 124 125 /** 126 * kvm_arch_init_vm - initializes a VM data structure 127 * @kvm: pointer to the KVM struct 128 */ 129 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) 130 { 131 int ret; 132 133 ret = kvm_arm_setup_stage2(kvm, type); 134 if (ret) 135 return ret; 136 137 ret = kvm_init_stage2_mmu(kvm, &kvm->arch.mmu); 138 if (ret) 139 return ret; 140 141 ret = create_hyp_mappings(kvm, kvm + 1, PAGE_HYP); 142 if (ret) 143 goto out_free_stage2_pgd; 144 145 kvm_vgic_early_init(kvm); 146 147 /* The maximum number of VCPUs is limited by the host's GIC model */ 148 kvm->arch.max_vcpus = kvm_arm_default_max_vcpus(); 149 150 set_default_spectre(kvm); 151 152 return ret; 153 out_free_stage2_pgd: 154 kvm_free_stage2_pgd(&kvm->arch.mmu); 155 return ret; 156 } 157 158 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf) 159 { 160 return VM_FAULT_SIGBUS; 161 } 162 163 164 /** 165 * kvm_arch_destroy_vm - destroy the VM data structure 166 * @kvm: pointer to the KVM struct 167 */ 168 void kvm_arch_destroy_vm(struct kvm *kvm) 169 { 170 int i; 171 172 bitmap_free(kvm->arch.pmu_filter); 173 174 kvm_vgic_destroy(kvm); 175 176 for (i = 0; i < KVM_MAX_VCPUS; ++i) { 177 if (kvm->vcpus[i]) { 178 kvm_vcpu_destroy(kvm->vcpus[i]); 179 kvm->vcpus[i] = NULL; 180 } 181 } 182 atomic_set(&kvm->online_vcpus, 0); 183 } 184 185 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) 186 { 187 int r; 188 switch (ext) { 189 case KVM_CAP_IRQCHIP: 190 r = vgic_present; 191 break; 192 case KVM_CAP_IOEVENTFD: 193 case KVM_CAP_DEVICE_CTRL: 194 case KVM_CAP_USER_MEMORY: 195 case KVM_CAP_SYNC_MMU: 196 case KVM_CAP_DESTROY_MEMORY_REGION_WORKS: 197 case KVM_CAP_ONE_REG: 198 case KVM_CAP_ARM_PSCI: 199 case KVM_CAP_ARM_PSCI_0_2: 200 case KVM_CAP_READONLY_MEM: 201 case KVM_CAP_MP_STATE: 202 case KVM_CAP_IMMEDIATE_EXIT: 203 case KVM_CAP_VCPU_EVENTS: 204 case KVM_CAP_ARM_IRQ_LINE_LAYOUT_2: 205 case KVM_CAP_ARM_NISV_TO_USER: 206 case KVM_CAP_ARM_INJECT_EXT_DABT: 207 case KVM_CAP_SET_GUEST_DEBUG: 208 case KVM_CAP_VCPU_ATTRIBUTES: 209 case KVM_CAP_PTP_KVM: 210 r = 1; 211 break; 212 case KVM_CAP_SET_GUEST_DEBUG2: 213 return KVM_GUESTDBG_VALID_MASK; 214 case KVM_CAP_ARM_SET_DEVICE_ADDR: 215 r = 1; 216 break; 217 case KVM_CAP_NR_VCPUS: 218 r = num_online_cpus(); 219 break; 220 case KVM_CAP_MAX_VCPUS: 221 case KVM_CAP_MAX_VCPU_ID: 222 if (kvm) 223 r = kvm->arch.max_vcpus; 224 else 225 r = kvm_arm_default_max_vcpus(); 226 break; 227 case KVM_CAP_MSI_DEVID: 228 if (!kvm) 229 r = -EINVAL; 230 else 231 r = kvm->arch.vgic.msis_require_devid; 232 break; 233 case KVM_CAP_ARM_USER_IRQ: 234 /* 235 * 1: EL1_VTIMER, EL1_PTIMER, and PMU. 236 * (bump this number if adding more devices) 237 */ 238 r = 1; 239 break; 240 case KVM_CAP_STEAL_TIME: 241 r = kvm_arm_pvtime_supported(); 242 break; 243 case KVM_CAP_ARM_EL1_32BIT: 244 r = cpus_have_const_cap(ARM64_HAS_32BIT_EL1); 245 break; 246 case KVM_CAP_GUEST_DEBUG_HW_BPS: 247 r = get_num_brps(); 248 break; 249 case KVM_CAP_GUEST_DEBUG_HW_WPS: 250 r = get_num_wrps(); 251 break; 252 case KVM_CAP_ARM_PMU_V3: 253 r = kvm_arm_support_pmu_v3(); 254 break; 255 case KVM_CAP_ARM_INJECT_SERROR_ESR: 256 r = cpus_have_const_cap(ARM64_HAS_RAS_EXTN); 257 break; 258 case KVM_CAP_ARM_VM_IPA_SIZE: 259 r = get_kvm_ipa_limit(); 260 break; 261 case KVM_CAP_ARM_SVE: 262 r = system_supports_sve(); 263 break; 264 case KVM_CAP_ARM_PTRAUTH_ADDRESS: 265 case KVM_CAP_ARM_PTRAUTH_GENERIC: 266 r = system_has_full_ptr_auth(); 267 break; 268 default: 269 r = 0; 270 } 271 272 return r; 273 } 274 275 long kvm_arch_dev_ioctl(struct file *filp, 276 unsigned int ioctl, unsigned long arg) 277 { 278 return -EINVAL; 279 } 280 281 struct kvm *kvm_arch_alloc_vm(void) 282 { 283 if (!has_vhe()) 284 return kzalloc(sizeof(struct kvm), GFP_KERNEL); 285 286 return vzalloc(sizeof(struct kvm)); 287 } 288 289 void kvm_arch_free_vm(struct kvm *kvm) 290 { 291 if (!has_vhe()) 292 kfree(kvm); 293 else 294 vfree(kvm); 295 } 296 297 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id) 298 { 299 if (irqchip_in_kernel(kvm) && vgic_initialized(kvm)) 300 return -EBUSY; 301 302 if (id >= kvm->arch.max_vcpus) 303 return -EINVAL; 304 305 return 0; 306 } 307 308 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) 309 { 310 int err; 311 312 /* Force users to call KVM_ARM_VCPU_INIT */ 313 vcpu->arch.target = -1; 314 bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES); 315 316 vcpu->arch.mmu_page_cache.gfp_zero = __GFP_ZERO; 317 318 /* Set up the timer */ 319 kvm_timer_vcpu_init(vcpu); 320 321 kvm_pmu_vcpu_init(vcpu); 322 323 kvm_arm_reset_debug_ptr(vcpu); 324 325 kvm_arm_pvtime_vcpu_init(&vcpu->arch); 326 327 vcpu->arch.hw_mmu = &vcpu->kvm->arch.mmu; 328 329 err = kvm_vgic_vcpu_init(vcpu); 330 if (err) 331 return err; 332 333 return create_hyp_mappings(vcpu, vcpu + 1, PAGE_HYP); 334 } 335 336 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu) 337 { 338 } 339 340 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) 341 { 342 if (vcpu->arch.has_run_once && unlikely(!irqchip_in_kernel(vcpu->kvm))) 343 static_branch_dec(&userspace_irqchip_in_use); 344 345 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_cache); 346 kvm_timer_vcpu_terminate(vcpu); 347 kvm_pmu_vcpu_destroy(vcpu); 348 349 kvm_arm_vcpu_destroy(vcpu); 350 } 351 352 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu) 353 { 354 return kvm_timer_is_pending(vcpu); 355 } 356 357 void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 358 { 359 /* 360 * If we're about to block (most likely because we've just hit a 361 * WFI), we need to sync back the state of the GIC CPU interface 362 * so that we have the latest PMR and group enables. This ensures 363 * that kvm_arch_vcpu_runnable has up-to-date data to decide 364 * whether we have pending interrupts. 365 * 366 * For the same reason, we want to tell GICv4 that we need 367 * doorbells to be signalled, should an interrupt become pending. 368 */ 369 preempt_disable(); 370 kvm_vgic_vmcr_sync(vcpu); 371 vgic_v4_put(vcpu, true); 372 preempt_enable(); 373 } 374 375 void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 376 { 377 preempt_disable(); 378 vgic_v4_load(vcpu); 379 preempt_enable(); 380 } 381 382 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 383 { 384 struct kvm_s2_mmu *mmu; 385 int *last_ran; 386 387 mmu = vcpu->arch.hw_mmu; 388 last_ran = this_cpu_ptr(mmu->last_vcpu_ran); 389 390 /* 391 * We guarantee that both TLBs and I-cache are private to each 392 * vcpu. If detecting that a vcpu from the same VM has 393 * previously run on the same physical CPU, call into the 394 * hypervisor code to nuke the relevant contexts. 395 * 396 * We might get preempted before the vCPU actually runs, but 397 * over-invalidation doesn't affect correctness. 398 */ 399 if (*last_ran != vcpu->vcpu_id) { 400 kvm_call_hyp(__kvm_flush_cpu_context, mmu); 401 *last_ran = vcpu->vcpu_id; 402 } 403 404 vcpu->cpu = cpu; 405 406 kvm_vgic_load(vcpu); 407 kvm_timer_vcpu_load(vcpu); 408 if (has_vhe()) 409 kvm_vcpu_load_sysregs_vhe(vcpu); 410 kvm_arch_vcpu_load_fp(vcpu); 411 kvm_vcpu_pmu_restore_guest(vcpu); 412 if (kvm_arm_is_pvtime_enabled(&vcpu->arch)) 413 kvm_make_request(KVM_REQ_RECORD_STEAL, vcpu); 414 415 if (single_task_running()) 416 vcpu_clear_wfx_traps(vcpu); 417 else 418 vcpu_set_wfx_traps(vcpu); 419 420 if (vcpu_has_ptrauth(vcpu)) 421 vcpu_ptrauth_disable(vcpu); 422 kvm_arch_vcpu_load_debug_state_flags(vcpu); 423 } 424 425 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) 426 { 427 kvm_arch_vcpu_put_debug_state_flags(vcpu); 428 kvm_arch_vcpu_put_fp(vcpu); 429 if (has_vhe()) 430 kvm_vcpu_put_sysregs_vhe(vcpu); 431 kvm_timer_vcpu_put(vcpu); 432 kvm_vgic_put(vcpu); 433 kvm_vcpu_pmu_restore_host(vcpu); 434 435 vcpu->cpu = -1; 436 } 437 438 static void vcpu_power_off(struct kvm_vcpu *vcpu) 439 { 440 vcpu->arch.power_off = true; 441 kvm_make_request(KVM_REQ_SLEEP, vcpu); 442 kvm_vcpu_kick(vcpu); 443 } 444 445 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, 446 struct kvm_mp_state *mp_state) 447 { 448 if (vcpu->arch.power_off) 449 mp_state->mp_state = KVM_MP_STATE_STOPPED; 450 else 451 mp_state->mp_state = KVM_MP_STATE_RUNNABLE; 452 453 return 0; 454 } 455 456 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu, 457 struct kvm_mp_state *mp_state) 458 { 459 int ret = 0; 460 461 switch (mp_state->mp_state) { 462 case KVM_MP_STATE_RUNNABLE: 463 vcpu->arch.power_off = false; 464 break; 465 case KVM_MP_STATE_STOPPED: 466 vcpu_power_off(vcpu); 467 break; 468 default: 469 ret = -EINVAL; 470 } 471 472 return ret; 473 } 474 475 /** 476 * kvm_arch_vcpu_runnable - determine if the vcpu can be scheduled 477 * @v: The VCPU pointer 478 * 479 * If the guest CPU is not waiting for interrupts or an interrupt line is 480 * asserted, the CPU is by definition runnable. 481 */ 482 int kvm_arch_vcpu_runnable(struct kvm_vcpu *v) 483 { 484 bool irq_lines = *vcpu_hcr(v) & (HCR_VI | HCR_VF); 485 return ((irq_lines || kvm_vgic_vcpu_pending_irq(v)) 486 && !v->arch.power_off && !v->arch.pause); 487 } 488 489 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu) 490 { 491 return vcpu_mode_priv(vcpu); 492 } 493 494 /* Just ensure a guest exit from a particular CPU */ 495 static void exit_vm_noop(void *info) 496 { 497 } 498 499 void force_vm_exit(const cpumask_t *mask) 500 { 501 preempt_disable(); 502 smp_call_function_many(mask, exit_vm_noop, NULL, true); 503 preempt_enable(); 504 } 505 506 /** 507 * need_new_vmid_gen - check that the VMID is still valid 508 * @vmid: The VMID to check 509 * 510 * return true if there is a new generation of VMIDs being used 511 * 512 * The hardware supports a limited set of values with the value zero reserved 513 * for the host, so we check if an assigned value belongs to a previous 514 * generation, which requires us to assign a new value. If we're the first to 515 * use a VMID for the new generation, we must flush necessary caches and TLBs 516 * on all CPUs. 517 */ 518 static bool need_new_vmid_gen(struct kvm_vmid *vmid) 519 { 520 u64 current_vmid_gen = atomic64_read(&kvm_vmid_gen); 521 smp_rmb(); /* Orders read of kvm_vmid_gen and kvm->arch.vmid */ 522 return unlikely(READ_ONCE(vmid->vmid_gen) != current_vmid_gen); 523 } 524 525 /** 526 * update_vmid - Update the vmid with a valid VMID for the current generation 527 * @vmid: The stage-2 VMID information struct 528 */ 529 static void update_vmid(struct kvm_vmid *vmid) 530 { 531 if (!need_new_vmid_gen(vmid)) 532 return; 533 534 spin_lock(&kvm_vmid_lock); 535 536 /* 537 * We need to re-check the vmid_gen here to ensure that if another vcpu 538 * already allocated a valid vmid for this vm, then this vcpu should 539 * use the same vmid. 540 */ 541 if (!need_new_vmid_gen(vmid)) { 542 spin_unlock(&kvm_vmid_lock); 543 return; 544 } 545 546 /* First user of a new VMID generation? */ 547 if (unlikely(kvm_next_vmid == 0)) { 548 atomic64_inc(&kvm_vmid_gen); 549 kvm_next_vmid = 1; 550 551 /* 552 * On SMP we know no other CPUs can use this CPU's or each 553 * other's VMID after force_vm_exit returns since the 554 * kvm_vmid_lock blocks them from reentry to the guest. 555 */ 556 force_vm_exit(cpu_all_mask); 557 /* 558 * Now broadcast TLB + ICACHE invalidation over the inner 559 * shareable domain to make sure all data structures are 560 * clean. 561 */ 562 kvm_call_hyp(__kvm_flush_vm_context); 563 } 564 565 vmid->vmid = kvm_next_vmid; 566 kvm_next_vmid++; 567 kvm_next_vmid &= (1 << kvm_get_vmid_bits()) - 1; 568 569 smp_wmb(); 570 WRITE_ONCE(vmid->vmid_gen, atomic64_read(&kvm_vmid_gen)); 571 572 spin_unlock(&kvm_vmid_lock); 573 } 574 575 static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu) 576 { 577 struct kvm *kvm = vcpu->kvm; 578 int ret = 0; 579 580 if (likely(vcpu->arch.has_run_once)) 581 return 0; 582 583 if (!kvm_arm_vcpu_is_finalized(vcpu)) 584 return -EPERM; 585 586 vcpu->arch.has_run_once = true; 587 588 kvm_arm_vcpu_init_debug(vcpu); 589 590 if (likely(irqchip_in_kernel(kvm))) { 591 /* 592 * Map the VGIC hardware resources before running a vcpu the 593 * first time on this VM. 594 */ 595 ret = kvm_vgic_map_resources(kvm); 596 if (ret) 597 return ret; 598 } else { 599 /* 600 * Tell the rest of the code that there are userspace irqchip 601 * VMs in the wild. 602 */ 603 static_branch_inc(&userspace_irqchip_in_use); 604 } 605 606 ret = kvm_timer_enable(vcpu); 607 if (ret) 608 return ret; 609 610 ret = kvm_arm_pmu_v3_enable(vcpu); 611 612 return ret; 613 } 614 615 bool kvm_arch_intc_initialized(struct kvm *kvm) 616 { 617 return vgic_initialized(kvm); 618 } 619 620 void kvm_arm_halt_guest(struct kvm *kvm) 621 { 622 int i; 623 struct kvm_vcpu *vcpu; 624 625 kvm_for_each_vcpu(i, vcpu, kvm) 626 vcpu->arch.pause = true; 627 kvm_make_all_cpus_request(kvm, KVM_REQ_SLEEP); 628 } 629 630 void kvm_arm_resume_guest(struct kvm *kvm) 631 { 632 int i; 633 struct kvm_vcpu *vcpu; 634 635 kvm_for_each_vcpu(i, vcpu, kvm) { 636 vcpu->arch.pause = false; 637 rcuwait_wake_up(kvm_arch_vcpu_get_wait(vcpu)); 638 } 639 } 640 641 static void vcpu_req_sleep(struct kvm_vcpu *vcpu) 642 { 643 struct rcuwait *wait = kvm_arch_vcpu_get_wait(vcpu); 644 645 rcuwait_wait_event(wait, 646 (!vcpu->arch.power_off) &&(!vcpu->arch.pause), 647 TASK_INTERRUPTIBLE); 648 649 if (vcpu->arch.power_off || vcpu->arch.pause) { 650 /* Awaken to handle a signal, request we sleep again later. */ 651 kvm_make_request(KVM_REQ_SLEEP, vcpu); 652 } 653 654 /* 655 * Make sure we will observe a potential reset request if we've 656 * observed a change to the power state. Pairs with the smp_wmb() in 657 * kvm_psci_vcpu_on(). 658 */ 659 smp_rmb(); 660 } 661 662 static int kvm_vcpu_initialized(struct kvm_vcpu *vcpu) 663 { 664 return vcpu->arch.target >= 0; 665 } 666 667 static void check_vcpu_requests(struct kvm_vcpu *vcpu) 668 { 669 if (kvm_request_pending(vcpu)) { 670 if (kvm_check_request(KVM_REQ_SLEEP, vcpu)) 671 vcpu_req_sleep(vcpu); 672 673 if (kvm_check_request(KVM_REQ_VCPU_RESET, vcpu)) 674 kvm_reset_vcpu(vcpu); 675 676 /* 677 * Clear IRQ_PENDING requests that were made to guarantee 678 * that a VCPU sees new virtual interrupts. 679 */ 680 kvm_check_request(KVM_REQ_IRQ_PENDING, vcpu); 681 682 if (kvm_check_request(KVM_REQ_RECORD_STEAL, vcpu)) 683 kvm_update_stolen_time(vcpu); 684 685 if (kvm_check_request(KVM_REQ_RELOAD_GICv4, vcpu)) { 686 /* The distributor enable bits were changed */ 687 preempt_disable(); 688 vgic_v4_put(vcpu, false); 689 vgic_v4_load(vcpu); 690 preempt_enable(); 691 } 692 693 if (kvm_check_request(KVM_REQ_RELOAD_PMU, vcpu)) 694 kvm_pmu_handle_pmcr(vcpu, 695 __vcpu_sys_reg(vcpu, PMCR_EL0)); 696 } 697 } 698 699 /** 700 * kvm_arch_vcpu_ioctl_run - the main VCPU run function to execute guest code 701 * @vcpu: The VCPU pointer 702 * 703 * This function is called through the VCPU_RUN ioctl called from user space. It 704 * will execute VM code in a loop until the time slice for the process is used 705 * or some emulation is needed from user space in which case the function will 706 * return with return value 0 and with the kvm_run structure filled in with the 707 * required data for the requested emulation. 708 */ 709 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) 710 { 711 struct kvm_run *run = vcpu->run; 712 int ret; 713 714 if (unlikely(!kvm_vcpu_initialized(vcpu))) 715 return -ENOEXEC; 716 717 ret = kvm_vcpu_first_run_init(vcpu); 718 if (ret) 719 return ret; 720 721 if (run->exit_reason == KVM_EXIT_MMIO) { 722 ret = kvm_handle_mmio_return(vcpu); 723 if (ret) 724 return ret; 725 } 726 727 vcpu_load(vcpu); 728 729 if (run->immediate_exit) { 730 ret = -EINTR; 731 goto out; 732 } 733 734 kvm_sigset_activate(vcpu); 735 736 ret = 1; 737 run->exit_reason = KVM_EXIT_UNKNOWN; 738 while (ret > 0) { 739 /* 740 * Check conditions before entering the guest 741 */ 742 cond_resched(); 743 744 update_vmid(&vcpu->arch.hw_mmu->vmid); 745 746 check_vcpu_requests(vcpu); 747 748 /* 749 * Preparing the interrupts to be injected also 750 * involves poking the GIC, which must be done in a 751 * non-preemptible context. 752 */ 753 preempt_disable(); 754 755 kvm_pmu_flush_hwstate(vcpu); 756 757 local_irq_disable(); 758 759 kvm_vgic_flush_hwstate(vcpu); 760 761 /* 762 * Exit if we have a signal pending so that we can deliver the 763 * signal to user space. 764 */ 765 if (signal_pending(current)) { 766 ret = -EINTR; 767 run->exit_reason = KVM_EXIT_INTR; 768 } 769 770 /* 771 * If we're using a userspace irqchip, then check if we need 772 * to tell a userspace irqchip about timer or PMU level 773 * changes and if so, exit to userspace (the actual level 774 * state gets updated in kvm_timer_update_run and 775 * kvm_pmu_update_run below). 776 */ 777 if (static_branch_unlikely(&userspace_irqchip_in_use)) { 778 if (kvm_timer_should_notify_user(vcpu) || 779 kvm_pmu_should_notify_user(vcpu)) { 780 ret = -EINTR; 781 run->exit_reason = KVM_EXIT_INTR; 782 } 783 } 784 785 /* 786 * Ensure we set mode to IN_GUEST_MODE after we disable 787 * interrupts and before the final VCPU requests check. 788 * See the comment in kvm_vcpu_exiting_guest_mode() and 789 * Documentation/virt/kvm/vcpu-requests.rst 790 */ 791 smp_store_mb(vcpu->mode, IN_GUEST_MODE); 792 793 if (ret <= 0 || need_new_vmid_gen(&vcpu->arch.hw_mmu->vmid) || 794 kvm_request_pending(vcpu)) { 795 vcpu->mode = OUTSIDE_GUEST_MODE; 796 isb(); /* Ensure work in x_flush_hwstate is committed */ 797 kvm_pmu_sync_hwstate(vcpu); 798 if (static_branch_unlikely(&userspace_irqchip_in_use)) 799 kvm_timer_sync_user(vcpu); 800 kvm_vgic_sync_hwstate(vcpu); 801 local_irq_enable(); 802 preempt_enable(); 803 continue; 804 } 805 806 kvm_arm_setup_debug(vcpu); 807 808 /************************************************************** 809 * Enter the guest 810 */ 811 trace_kvm_entry(*vcpu_pc(vcpu)); 812 guest_enter_irqoff(); 813 814 ret = kvm_call_hyp_ret(__kvm_vcpu_run, vcpu); 815 816 vcpu->mode = OUTSIDE_GUEST_MODE; 817 vcpu->stat.exits++; 818 /* 819 * Back from guest 820 *************************************************************/ 821 822 kvm_arm_clear_debug(vcpu); 823 824 /* 825 * We must sync the PMU state before the vgic state so 826 * that the vgic can properly sample the updated state of the 827 * interrupt line. 828 */ 829 kvm_pmu_sync_hwstate(vcpu); 830 831 /* 832 * Sync the vgic state before syncing the timer state because 833 * the timer code needs to know if the virtual timer 834 * interrupts are active. 835 */ 836 kvm_vgic_sync_hwstate(vcpu); 837 838 /* 839 * Sync the timer hardware state before enabling interrupts as 840 * we don't want vtimer interrupts to race with syncing the 841 * timer virtual interrupt state. 842 */ 843 if (static_branch_unlikely(&userspace_irqchip_in_use)) 844 kvm_timer_sync_user(vcpu); 845 846 kvm_arch_vcpu_ctxsync_fp(vcpu); 847 848 /* 849 * We may have taken a host interrupt in HYP mode (ie 850 * while executing the guest). This interrupt is still 851 * pending, as we haven't serviced it yet! 852 * 853 * We're now back in SVC mode, with interrupts 854 * disabled. Enabling the interrupts now will have 855 * the effect of taking the interrupt again, in SVC 856 * mode this time. 857 */ 858 local_irq_enable(); 859 860 /* 861 * We do local_irq_enable() before calling guest_exit() so 862 * that if a timer interrupt hits while running the guest we 863 * account that tick as being spent in the guest. We enable 864 * preemption after calling guest_exit() so that if we get 865 * preempted we make sure ticks after that is not counted as 866 * guest time. 867 */ 868 guest_exit(); 869 trace_kvm_exit(ret, kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu)); 870 871 /* Exit types that need handling before we can be preempted */ 872 handle_exit_early(vcpu, ret); 873 874 preempt_enable(); 875 876 /* 877 * The ARMv8 architecture doesn't give the hypervisor 878 * a mechanism to prevent a guest from dropping to AArch32 EL0 879 * if implemented by the CPU. If we spot the guest in such 880 * state and that we decided it wasn't supposed to do so (like 881 * with the asymmetric AArch32 case), return to userspace with 882 * a fatal error. 883 */ 884 if (!system_supports_32bit_el0() && vcpu_mode_is_32bit(vcpu)) { 885 /* 886 * As we have caught the guest red-handed, decide that 887 * it isn't fit for purpose anymore by making the vcpu 888 * invalid. The VMM can try and fix it by issuing a 889 * KVM_ARM_VCPU_INIT if it really wants to. 890 */ 891 vcpu->arch.target = -1; 892 ret = ARM_EXCEPTION_IL; 893 } 894 895 ret = handle_exit(vcpu, ret); 896 } 897 898 /* Tell userspace about in-kernel device output levels */ 899 if (unlikely(!irqchip_in_kernel(vcpu->kvm))) { 900 kvm_timer_update_run(vcpu); 901 kvm_pmu_update_run(vcpu); 902 } 903 904 kvm_sigset_deactivate(vcpu); 905 906 out: 907 /* 908 * In the unlikely event that we are returning to userspace 909 * with pending exceptions or PC adjustment, commit these 910 * adjustments in order to give userspace a consistent view of 911 * the vcpu state. Note that this relies on __kvm_adjust_pc() 912 * being preempt-safe on VHE. 913 */ 914 if (unlikely(vcpu->arch.flags & (KVM_ARM64_PENDING_EXCEPTION | 915 KVM_ARM64_INCREMENT_PC))) 916 kvm_call_hyp(__kvm_adjust_pc, vcpu); 917 918 vcpu_put(vcpu); 919 return ret; 920 } 921 922 static int vcpu_interrupt_line(struct kvm_vcpu *vcpu, int number, bool level) 923 { 924 int bit_index; 925 bool set; 926 unsigned long *hcr; 927 928 if (number == KVM_ARM_IRQ_CPU_IRQ) 929 bit_index = __ffs(HCR_VI); 930 else /* KVM_ARM_IRQ_CPU_FIQ */ 931 bit_index = __ffs(HCR_VF); 932 933 hcr = vcpu_hcr(vcpu); 934 if (level) 935 set = test_and_set_bit(bit_index, hcr); 936 else 937 set = test_and_clear_bit(bit_index, hcr); 938 939 /* 940 * If we didn't change anything, no need to wake up or kick other CPUs 941 */ 942 if (set == level) 943 return 0; 944 945 /* 946 * The vcpu irq_lines field was updated, wake up sleeping VCPUs and 947 * trigger a world-switch round on the running physical CPU to set the 948 * virtual IRQ/FIQ fields in the HCR appropriately. 949 */ 950 kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); 951 kvm_vcpu_kick(vcpu); 952 953 return 0; 954 } 955 956 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_level, 957 bool line_status) 958 { 959 u32 irq = irq_level->irq; 960 unsigned int irq_type, vcpu_idx, irq_num; 961 int nrcpus = atomic_read(&kvm->online_vcpus); 962 struct kvm_vcpu *vcpu = NULL; 963 bool level = irq_level->level; 964 965 irq_type = (irq >> KVM_ARM_IRQ_TYPE_SHIFT) & KVM_ARM_IRQ_TYPE_MASK; 966 vcpu_idx = (irq >> KVM_ARM_IRQ_VCPU_SHIFT) & KVM_ARM_IRQ_VCPU_MASK; 967 vcpu_idx += ((irq >> KVM_ARM_IRQ_VCPU2_SHIFT) & KVM_ARM_IRQ_VCPU2_MASK) * (KVM_ARM_IRQ_VCPU_MASK + 1); 968 irq_num = (irq >> KVM_ARM_IRQ_NUM_SHIFT) & KVM_ARM_IRQ_NUM_MASK; 969 970 trace_kvm_irq_line(irq_type, vcpu_idx, irq_num, irq_level->level); 971 972 switch (irq_type) { 973 case KVM_ARM_IRQ_TYPE_CPU: 974 if (irqchip_in_kernel(kvm)) 975 return -ENXIO; 976 977 if (vcpu_idx >= nrcpus) 978 return -EINVAL; 979 980 vcpu = kvm_get_vcpu(kvm, vcpu_idx); 981 if (!vcpu) 982 return -EINVAL; 983 984 if (irq_num > KVM_ARM_IRQ_CPU_FIQ) 985 return -EINVAL; 986 987 return vcpu_interrupt_line(vcpu, irq_num, level); 988 case KVM_ARM_IRQ_TYPE_PPI: 989 if (!irqchip_in_kernel(kvm)) 990 return -ENXIO; 991 992 if (vcpu_idx >= nrcpus) 993 return -EINVAL; 994 995 vcpu = kvm_get_vcpu(kvm, vcpu_idx); 996 if (!vcpu) 997 return -EINVAL; 998 999 if (irq_num < VGIC_NR_SGIS || irq_num >= VGIC_NR_PRIVATE_IRQS) 1000 return -EINVAL; 1001 1002 return kvm_vgic_inject_irq(kvm, vcpu->vcpu_id, irq_num, level, NULL); 1003 case KVM_ARM_IRQ_TYPE_SPI: 1004 if (!irqchip_in_kernel(kvm)) 1005 return -ENXIO; 1006 1007 if (irq_num < VGIC_NR_PRIVATE_IRQS) 1008 return -EINVAL; 1009 1010 return kvm_vgic_inject_irq(kvm, 0, irq_num, level, NULL); 1011 } 1012 1013 return -EINVAL; 1014 } 1015 1016 static int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, 1017 const struct kvm_vcpu_init *init) 1018 { 1019 unsigned int i, ret; 1020 int phys_target = kvm_target_cpu(); 1021 1022 if (init->target != phys_target) 1023 return -EINVAL; 1024 1025 /* 1026 * Secondary and subsequent calls to KVM_ARM_VCPU_INIT must 1027 * use the same target. 1028 */ 1029 if (vcpu->arch.target != -1 && vcpu->arch.target != init->target) 1030 return -EINVAL; 1031 1032 /* -ENOENT for unknown features, -EINVAL for invalid combinations. */ 1033 for (i = 0; i < sizeof(init->features) * 8; i++) { 1034 bool set = (init->features[i / 32] & (1 << (i % 32))); 1035 1036 if (set && i >= KVM_VCPU_MAX_FEATURES) 1037 return -ENOENT; 1038 1039 /* 1040 * Secondary and subsequent calls to KVM_ARM_VCPU_INIT must 1041 * use the same feature set. 1042 */ 1043 if (vcpu->arch.target != -1 && i < KVM_VCPU_MAX_FEATURES && 1044 test_bit(i, vcpu->arch.features) != set) 1045 return -EINVAL; 1046 1047 if (set) 1048 set_bit(i, vcpu->arch.features); 1049 } 1050 1051 vcpu->arch.target = phys_target; 1052 1053 /* Now we know what it is, we can reset it. */ 1054 ret = kvm_reset_vcpu(vcpu); 1055 if (ret) { 1056 vcpu->arch.target = -1; 1057 bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES); 1058 } 1059 1060 return ret; 1061 } 1062 1063 static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu, 1064 struct kvm_vcpu_init *init) 1065 { 1066 int ret; 1067 1068 ret = kvm_vcpu_set_target(vcpu, init); 1069 if (ret) 1070 return ret; 1071 1072 /* 1073 * Ensure a rebooted VM will fault in RAM pages and detect if the 1074 * guest MMU is turned off and flush the caches as needed. 1075 * 1076 * S2FWB enforces all memory accesses to RAM being cacheable, 1077 * ensuring that the data side is always coherent. We still 1078 * need to invalidate the I-cache though, as FWB does *not* 1079 * imply CTR_EL0.DIC. 1080 */ 1081 if (vcpu->arch.has_run_once) { 1082 if (!cpus_have_final_cap(ARM64_HAS_STAGE2_FWB)) 1083 stage2_unmap_vm(vcpu->kvm); 1084 else 1085 __flush_icache_all(); 1086 } 1087 1088 vcpu_reset_hcr(vcpu); 1089 1090 /* 1091 * Handle the "start in power-off" case. 1092 */ 1093 if (test_bit(KVM_ARM_VCPU_POWER_OFF, vcpu->arch.features)) 1094 vcpu_power_off(vcpu); 1095 else 1096 vcpu->arch.power_off = false; 1097 1098 return 0; 1099 } 1100 1101 static int kvm_arm_vcpu_set_attr(struct kvm_vcpu *vcpu, 1102 struct kvm_device_attr *attr) 1103 { 1104 int ret = -ENXIO; 1105 1106 switch (attr->group) { 1107 default: 1108 ret = kvm_arm_vcpu_arch_set_attr(vcpu, attr); 1109 break; 1110 } 1111 1112 return ret; 1113 } 1114 1115 static int kvm_arm_vcpu_get_attr(struct kvm_vcpu *vcpu, 1116 struct kvm_device_attr *attr) 1117 { 1118 int ret = -ENXIO; 1119 1120 switch (attr->group) { 1121 default: 1122 ret = kvm_arm_vcpu_arch_get_attr(vcpu, attr); 1123 break; 1124 } 1125 1126 return ret; 1127 } 1128 1129 static int kvm_arm_vcpu_has_attr(struct kvm_vcpu *vcpu, 1130 struct kvm_device_attr *attr) 1131 { 1132 int ret = -ENXIO; 1133 1134 switch (attr->group) { 1135 default: 1136 ret = kvm_arm_vcpu_arch_has_attr(vcpu, attr); 1137 break; 1138 } 1139 1140 return ret; 1141 } 1142 1143 static int kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, 1144 struct kvm_vcpu_events *events) 1145 { 1146 memset(events, 0, sizeof(*events)); 1147 1148 return __kvm_arm_vcpu_get_events(vcpu, events); 1149 } 1150 1151 static int kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, 1152 struct kvm_vcpu_events *events) 1153 { 1154 int i; 1155 1156 /* check whether the reserved field is zero */ 1157 for (i = 0; i < ARRAY_SIZE(events->reserved); i++) 1158 if (events->reserved[i]) 1159 return -EINVAL; 1160 1161 /* check whether the pad field is zero */ 1162 for (i = 0; i < ARRAY_SIZE(events->exception.pad); i++) 1163 if (events->exception.pad[i]) 1164 return -EINVAL; 1165 1166 return __kvm_arm_vcpu_set_events(vcpu, events); 1167 } 1168 1169 long kvm_arch_vcpu_ioctl(struct file *filp, 1170 unsigned int ioctl, unsigned long arg) 1171 { 1172 struct kvm_vcpu *vcpu = filp->private_data; 1173 void __user *argp = (void __user *)arg; 1174 struct kvm_device_attr attr; 1175 long r; 1176 1177 switch (ioctl) { 1178 case KVM_ARM_VCPU_INIT: { 1179 struct kvm_vcpu_init init; 1180 1181 r = -EFAULT; 1182 if (copy_from_user(&init, argp, sizeof(init))) 1183 break; 1184 1185 r = kvm_arch_vcpu_ioctl_vcpu_init(vcpu, &init); 1186 break; 1187 } 1188 case KVM_SET_ONE_REG: 1189 case KVM_GET_ONE_REG: { 1190 struct kvm_one_reg reg; 1191 1192 r = -ENOEXEC; 1193 if (unlikely(!kvm_vcpu_initialized(vcpu))) 1194 break; 1195 1196 r = -EFAULT; 1197 if (copy_from_user(®, argp, sizeof(reg))) 1198 break; 1199 1200 if (ioctl == KVM_SET_ONE_REG) 1201 r = kvm_arm_set_reg(vcpu, ®); 1202 else 1203 r = kvm_arm_get_reg(vcpu, ®); 1204 break; 1205 } 1206 case KVM_GET_REG_LIST: { 1207 struct kvm_reg_list __user *user_list = argp; 1208 struct kvm_reg_list reg_list; 1209 unsigned n; 1210 1211 r = -ENOEXEC; 1212 if (unlikely(!kvm_vcpu_initialized(vcpu))) 1213 break; 1214 1215 r = -EPERM; 1216 if (!kvm_arm_vcpu_is_finalized(vcpu)) 1217 break; 1218 1219 r = -EFAULT; 1220 if (copy_from_user(®_list, user_list, sizeof(reg_list))) 1221 break; 1222 n = reg_list.n; 1223 reg_list.n = kvm_arm_num_regs(vcpu); 1224 if (copy_to_user(user_list, ®_list, sizeof(reg_list))) 1225 break; 1226 r = -E2BIG; 1227 if (n < reg_list.n) 1228 break; 1229 r = kvm_arm_copy_reg_indices(vcpu, user_list->reg); 1230 break; 1231 } 1232 case KVM_SET_DEVICE_ATTR: { 1233 r = -EFAULT; 1234 if (copy_from_user(&attr, argp, sizeof(attr))) 1235 break; 1236 r = kvm_arm_vcpu_set_attr(vcpu, &attr); 1237 break; 1238 } 1239 case KVM_GET_DEVICE_ATTR: { 1240 r = -EFAULT; 1241 if (copy_from_user(&attr, argp, sizeof(attr))) 1242 break; 1243 r = kvm_arm_vcpu_get_attr(vcpu, &attr); 1244 break; 1245 } 1246 case KVM_HAS_DEVICE_ATTR: { 1247 r = -EFAULT; 1248 if (copy_from_user(&attr, argp, sizeof(attr))) 1249 break; 1250 r = kvm_arm_vcpu_has_attr(vcpu, &attr); 1251 break; 1252 } 1253 case KVM_GET_VCPU_EVENTS: { 1254 struct kvm_vcpu_events events; 1255 1256 if (kvm_arm_vcpu_get_events(vcpu, &events)) 1257 return -EINVAL; 1258 1259 if (copy_to_user(argp, &events, sizeof(events))) 1260 return -EFAULT; 1261 1262 return 0; 1263 } 1264 case KVM_SET_VCPU_EVENTS: { 1265 struct kvm_vcpu_events events; 1266 1267 if (copy_from_user(&events, argp, sizeof(events))) 1268 return -EFAULT; 1269 1270 return kvm_arm_vcpu_set_events(vcpu, &events); 1271 } 1272 case KVM_ARM_VCPU_FINALIZE: { 1273 int what; 1274 1275 if (!kvm_vcpu_initialized(vcpu)) 1276 return -ENOEXEC; 1277 1278 if (get_user(what, (const int __user *)argp)) 1279 return -EFAULT; 1280 1281 return kvm_arm_vcpu_finalize(vcpu, what); 1282 } 1283 default: 1284 r = -EINVAL; 1285 } 1286 1287 return r; 1288 } 1289 1290 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot) 1291 { 1292 1293 } 1294 1295 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 1296 const struct kvm_memory_slot *memslot) 1297 { 1298 kvm_flush_remote_tlbs(kvm); 1299 } 1300 1301 static int kvm_vm_ioctl_set_device_addr(struct kvm *kvm, 1302 struct kvm_arm_device_addr *dev_addr) 1303 { 1304 unsigned long dev_id, type; 1305 1306 dev_id = (dev_addr->id & KVM_ARM_DEVICE_ID_MASK) >> 1307 KVM_ARM_DEVICE_ID_SHIFT; 1308 type = (dev_addr->id & KVM_ARM_DEVICE_TYPE_MASK) >> 1309 KVM_ARM_DEVICE_TYPE_SHIFT; 1310 1311 switch (dev_id) { 1312 case KVM_ARM_DEVICE_VGIC_V2: 1313 if (!vgic_present) 1314 return -ENXIO; 1315 return kvm_vgic_addr(kvm, type, &dev_addr->addr, true); 1316 default: 1317 return -ENODEV; 1318 } 1319 } 1320 1321 long kvm_arch_vm_ioctl(struct file *filp, 1322 unsigned int ioctl, unsigned long arg) 1323 { 1324 struct kvm *kvm = filp->private_data; 1325 void __user *argp = (void __user *)arg; 1326 1327 switch (ioctl) { 1328 case KVM_CREATE_IRQCHIP: { 1329 int ret; 1330 if (!vgic_present) 1331 return -ENXIO; 1332 mutex_lock(&kvm->lock); 1333 ret = kvm_vgic_create(kvm, KVM_DEV_TYPE_ARM_VGIC_V2); 1334 mutex_unlock(&kvm->lock); 1335 return ret; 1336 } 1337 case KVM_ARM_SET_DEVICE_ADDR: { 1338 struct kvm_arm_device_addr dev_addr; 1339 1340 if (copy_from_user(&dev_addr, argp, sizeof(dev_addr))) 1341 return -EFAULT; 1342 return kvm_vm_ioctl_set_device_addr(kvm, &dev_addr); 1343 } 1344 case KVM_ARM_PREFERRED_TARGET: { 1345 int err; 1346 struct kvm_vcpu_init init; 1347 1348 err = kvm_vcpu_preferred_target(&init); 1349 if (err) 1350 return err; 1351 1352 if (copy_to_user(argp, &init, sizeof(init))) 1353 return -EFAULT; 1354 1355 return 0; 1356 } 1357 default: 1358 return -EINVAL; 1359 } 1360 } 1361 1362 static unsigned long nvhe_percpu_size(void) 1363 { 1364 return (unsigned long)CHOOSE_NVHE_SYM(__per_cpu_end) - 1365 (unsigned long)CHOOSE_NVHE_SYM(__per_cpu_start); 1366 } 1367 1368 static unsigned long nvhe_percpu_order(void) 1369 { 1370 unsigned long size = nvhe_percpu_size(); 1371 1372 return size ? get_order(size) : 0; 1373 } 1374 1375 /* A lookup table holding the hypervisor VA for each vector slot */ 1376 static void *hyp_spectre_vector_selector[BP_HARDEN_EL2_SLOTS]; 1377 1378 static void kvm_init_vector_slot(void *base, enum arm64_hyp_spectre_vector slot) 1379 { 1380 hyp_spectre_vector_selector[slot] = __kvm_vector_slot2addr(base, slot); 1381 } 1382 1383 static int kvm_init_vector_slots(void) 1384 { 1385 int err; 1386 void *base; 1387 1388 base = kern_hyp_va(kvm_ksym_ref(__kvm_hyp_vector)); 1389 kvm_init_vector_slot(base, HYP_VECTOR_DIRECT); 1390 1391 base = kern_hyp_va(kvm_ksym_ref(__bp_harden_hyp_vecs)); 1392 kvm_init_vector_slot(base, HYP_VECTOR_SPECTRE_DIRECT); 1393 1394 if (!cpus_have_const_cap(ARM64_SPECTRE_V3A)) 1395 return 0; 1396 1397 if (!has_vhe()) { 1398 err = create_hyp_exec_mappings(__pa_symbol(__bp_harden_hyp_vecs), 1399 __BP_HARDEN_HYP_VECS_SZ, &base); 1400 if (err) 1401 return err; 1402 } 1403 1404 kvm_init_vector_slot(base, HYP_VECTOR_INDIRECT); 1405 kvm_init_vector_slot(base, HYP_VECTOR_SPECTRE_INDIRECT); 1406 return 0; 1407 } 1408 1409 static void cpu_prepare_hyp_mode(int cpu) 1410 { 1411 struct kvm_nvhe_init_params *params = per_cpu_ptr_nvhe_sym(kvm_init_params, cpu); 1412 unsigned long tcr; 1413 1414 /* 1415 * Calculate the raw per-cpu offset without a translation from the 1416 * kernel's mapping to the linear mapping, and store it in tpidr_el2 1417 * so that we can use adr_l to access per-cpu variables in EL2. 1418 * Also drop the KASAN tag which gets in the way... 1419 */ 1420 params->tpidr_el2 = (unsigned long)kasan_reset_tag(per_cpu_ptr_nvhe_sym(__per_cpu_start, cpu)) - 1421 (unsigned long)kvm_ksym_ref(CHOOSE_NVHE_SYM(__per_cpu_start)); 1422 1423 params->mair_el2 = read_sysreg(mair_el1); 1424 1425 /* 1426 * The ID map may be configured to use an extended virtual address 1427 * range. This is only the case if system RAM is out of range for the 1428 * currently configured page size and VA_BITS, in which case we will 1429 * also need the extended virtual range for the HYP ID map, or we won't 1430 * be able to enable the EL2 MMU. 1431 * 1432 * However, at EL2, there is only one TTBR register, and we can't switch 1433 * between translation tables *and* update TCR_EL2.T0SZ at the same 1434 * time. Bottom line: we need to use the extended range with *both* our 1435 * translation tables. 1436 * 1437 * So use the same T0SZ value we use for the ID map. 1438 */ 1439 tcr = (read_sysreg(tcr_el1) & TCR_EL2_MASK) | TCR_EL2_RES1; 1440 tcr &= ~TCR_T0SZ_MASK; 1441 tcr |= (idmap_t0sz & GENMASK(TCR_TxSZ_WIDTH - 1, 0)) << TCR_T0SZ_OFFSET; 1442 params->tcr_el2 = tcr; 1443 1444 params->stack_hyp_va = kern_hyp_va(per_cpu(kvm_arm_hyp_stack_page, cpu) + PAGE_SIZE); 1445 params->pgd_pa = kvm_mmu_get_httbr(); 1446 if (is_protected_kvm_enabled()) 1447 params->hcr_el2 = HCR_HOST_NVHE_PROTECTED_FLAGS; 1448 else 1449 params->hcr_el2 = HCR_HOST_NVHE_FLAGS; 1450 params->vttbr = params->vtcr = 0; 1451 1452 /* 1453 * Flush the init params from the data cache because the struct will 1454 * be read while the MMU is off. 1455 */ 1456 kvm_flush_dcache_to_poc(params, sizeof(*params)); 1457 } 1458 1459 static void hyp_install_host_vector(void) 1460 { 1461 struct kvm_nvhe_init_params *params; 1462 struct arm_smccc_res res; 1463 1464 /* Switch from the HYP stub to our own HYP init vector */ 1465 __hyp_set_vectors(kvm_get_idmap_vector()); 1466 1467 /* 1468 * Call initialization code, and switch to the full blown HYP code. 1469 * If the cpucaps haven't been finalized yet, something has gone very 1470 * wrong, and hyp will crash and burn when it uses any 1471 * cpus_have_const_cap() wrapper. 1472 */ 1473 BUG_ON(!system_capabilities_finalized()); 1474 params = this_cpu_ptr_nvhe_sym(kvm_init_params); 1475 arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(__kvm_hyp_init), virt_to_phys(params), &res); 1476 WARN_ON(res.a0 != SMCCC_RET_SUCCESS); 1477 } 1478 1479 static void cpu_init_hyp_mode(void) 1480 { 1481 hyp_install_host_vector(); 1482 1483 /* 1484 * Disabling SSBD on a non-VHE system requires us to enable SSBS 1485 * at EL2. 1486 */ 1487 if (this_cpu_has_cap(ARM64_SSBS) && 1488 arm64_get_spectre_v4_state() == SPECTRE_VULNERABLE) { 1489 kvm_call_hyp_nvhe(__kvm_enable_ssbs); 1490 } 1491 } 1492 1493 static void cpu_hyp_reset(void) 1494 { 1495 if (!is_kernel_in_hyp_mode()) 1496 __hyp_reset_vectors(); 1497 } 1498 1499 /* 1500 * EL2 vectors can be mapped and rerouted in a number of ways, 1501 * depending on the kernel configuration and CPU present: 1502 * 1503 * - If the CPU is affected by Spectre-v2, the hardening sequence is 1504 * placed in one of the vector slots, which is executed before jumping 1505 * to the real vectors. 1506 * 1507 * - If the CPU also has the ARM64_SPECTRE_V3A cap, the slot 1508 * containing the hardening sequence is mapped next to the idmap page, 1509 * and executed before jumping to the real vectors. 1510 * 1511 * - If the CPU only has the ARM64_SPECTRE_V3A cap, then an 1512 * empty slot is selected, mapped next to the idmap page, and 1513 * executed before jumping to the real vectors. 1514 * 1515 * Note that ARM64_SPECTRE_V3A is somewhat incompatible with 1516 * VHE, as we don't have hypervisor-specific mappings. If the system 1517 * is VHE and yet selects this capability, it will be ignored. 1518 */ 1519 static void cpu_set_hyp_vector(void) 1520 { 1521 struct bp_hardening_data *data = this_cpu_ptr(&bp_hardening_data); 1522 void *vector = hyp_spectre_vector_selector[data->slot]; 1523 1524 if (!is_protected_kvm_enabled()) 1525 *this_cpu_ptr_hyp_sym(kvm_hyp_vector) = (unsigned long)vector; 1526 else 1527 kvm_call_hyp_nvhe(__pkvm_cpu_set_vector, data->slot); 1528 } 1529 1530 static void cpu_hyp_reinit(void) 1531 { 1532 kvm_init_host_cpu_context(&this_cpu_ptr_hyp_sym(kvm_host_data)->host_ctxt); 1533 1534 cpu_hyp_reset(); 1535 1536 if (is_kernel_in_hyp_mode()) 1537 kvm_timer_init_vhe(); 1538 else 1539 cpu_init_hyp_mode(); 1540 1541 cpu_set_hyp_vector(); 1542 1543 kvm_arm_init_debug(); 1544 1545 if (vgic_present) 1546 kvm_vgic_init_cpu_hardware(); 1547 } 1548 1549 static void _kvm_arch_hardware_enable(void *discard) 1550 { 1551 if (!__this_cpu_read(kvm_arm_hardware_enabled)) { 1552 cpu_hyp_reinit(); 1553 __this_cpu_write(kvm_arm_hardware_enabled, 1); 1554 } 1555 } 1556 1557 int kvm_arch_hardware_enable(void) 1558 { 1559 _kvm_arch_hardware_enable(NULL); 1560 return 0; 1561 } 1562 1563 static void _kvm_arch_hardware_disable(void *discard) 1564 { 1565 if (__this_cpu_read(kvm_arm_hardware_enabled)) { 1566 cpu_hyp_reset(); 1567 __this_cpu_write(kvm_arm_hardware_enabled, 0); 1568 } 1569 } 1570 1571 void kvm_arch_hardware_disable(void) 1572 { 1573 if (!is_protected_kvm_enabled()) 1574 _kvm_arch_hardware_disable(NULL); 1575 } 1576 1577 #ifdef CONFIG_CPU_PM 1578 static int hyp_init_cpu_pm_notifier(struct notifier_block *self, 1579 unsigned long cmd, 1580 void *v) 1581 { 1582 /* 1583 * kvm_arm_hardware_enabled is left with its old value over 1584 * PM_ENTER->PM_EXIT. It is used to indicate PM_EXIT should 1585 * re-enable hyp. 1586 */ 1587 switch (cmd) { 1588 case CPU_PM_ENTER: 1589 if (__this_cpu_read(kvm_arm_hardware_enabled)) 1590 /* 1591 * don't update kvm_arm_hardware_enabled here 1592 * so that the hardware will be re-enabled 1593 * when we resume. See below. 1594 */ 1595 cpu_hyp_reset(); 1596 1597 return NOTIFY_OK; 1598 case CPU_PM_ENTER_FAILED: 1599 case CPU_PM_EXIT: 1600 if (__this_cpu_read(kvm_arm_hardware_enabled)) 1601 /* The hardware was enabled before suspend. */ 1602 cpu_hyp_reinit(); 1603 1604 return NOTIFY_OK; 1605 1606 default: 1607 return NOTIFY_DONE; 1608 } 1609 } 1610 1611 static struct notifier_block hyp_init_cpu_pm_nb = { 1612 .notifier_call = hyp_init_cpu_pm_notifier, 1613 }; 1614 1615 static void hyp_cpu_pm_init(void) 1616 { 1617 if (!is_protected_kvm_enabled()) 1618 cpu_pm_register_notifier(&hyp_init_cpu_pm_nb); 1619 } 1620 static void hyp_cpu_pm_exit(void) 1621 { 1622 if (!is_protected_kvm_enabled()) 1623 cpu_pm_unregister_notifier(&hyp_init_cpu_pm_nb); 1624 } 1625 #else 1626 static inline void hyp_cpu_pm_init(void) 1627 { 1628 } 1629 static inline void hyp_cpu_pm_exit(void) 1630 { 1631 } 1632 #endif 1633 1634 static void init_cpu_logical_map(void) 1635 { 1636 unsigned int cpu; 1637 1638 /* 1639 * Copy the MPIDR <-> logical CPU ID mapping to hyp. 1640 * Only copy the set of online CPUs whose features have been chacked 1641 * against the finalized system capabilities. The hypervisor will not 1642 * allow any other CPUs from the `possible` set to boot. 1643 */ 1644 for_each_online_cpu(cpu) 1645 hyp_cpu_logical_map[cpu] = cpu_logical_map(cpu); 1646 } 1647 1648 #define init_psci_0_1_impl_state(config, what) \ 1649 config.psci_0_1_ ## what ## _implemented = psci_ops.what 1650 1651 static bool init_psci_relay(void) 1652 { 1653 /* 1654 * If PSCI has not been initialized, protected KVM cannot install 1655 * itself on newly booted CPUs. 1656 */ 1657 if (!psci_ops.get_version) { 1658 kvm_err("Cannot initialize protected mode without PSCI\n"); 1659 return false; 1660 } 1661 1662 kvm_host_psci_config.version = psci_ops.get_version(); 1663 1664 if (kvm_host_psci_config.version == PSCI_VERSION(0, 1)) { 1665 kvm_host_psci_config.function_ids_0_1 = get_psci_0_1_function_ids(); 1666 init_psci_0_1_impl_state(kvm_host_psci_config, cpu_suspend); 1667 init_psci_0_1_impl_state(kvm_host_psci_config, cpu_on); 1668 init_psci_0_1_impl_state(kvm_host_psci_config, cpu_off); 1669 init_psci_0_1_impl_state(kvm_host_psci_config, migrate); 1670 } 1671 return true; 1672 } 1673 1674 static int init_common_resources(void) 1675 { 1676 return kvm_set_ipa_limit(); 1677 } 1678 1679 static int init_subsystems(void) 1680 { 1681 int err = 0; 1682 1683 /* 1684 * Enable hardware so that subsystem initialisation can access EL2. 1685 */ 1686 on_each_cpu(_kvm_arch_hardware_enable, NULL, 1); 1687 1688 /* 1689 * Register CPU lower-power notifier 1690 */ 1691 hyp_cpu_pm_init(); 1692 1693 /* 1694 * Init HYP view of VGIC 1695 */ 1696 err = kvm_vgic_hyp_init(); 1697 switch (err) { 1698 case 0: 1699 vgic_present = true; 1700 break; 1701 case -ENODEV: 1702 case -ENXIO: 1703 vgic_present = false; 1704 err = 0; 1705 break; 1706 default: 1707 goto out; 1708 } 1709 1710 /* 1711 * Init HYP architected timer support 1712 */ 1713 err = kvm_timer_hyp_init(vgic_present); 1714 if (err) 1715 goto out; 1716 1717 kvm_perf_init(); 1718 kvm_sys_reg_table_init(); 1719 1720 out: 1721 if (err || !is_protected_kvm_enabled()) 1722 on_each_cpu(_kvm_arch_hardware_disable, NULL, 1); 1723 1724 return err; 1725 } 1726 1727 static void teardown_hyp_mode(void) 1728 { 1729 int cpu; 1730 1731 free_hyp_pgds(); 1732 for_each_possible_cpu(cpu) { 1733 free_page(per_cpu(kvm_arm_hyp_stack_page, cpu)); 1734 free_pages(kvm_arm_hyp_percpu_base[cpu], nvhe_percpu_order()); 1735 } 1736 } 1737 1738 static int do_pkvm_init(u32 hyp_va_bits) 1739 { 1740 void *per_cpu_base = kvm_ksym_ref(kvm_arm_hyp_percpu_base); 1741 int ret; 1742 1743 preempt_disable(); 1744 hyp_install_host_vector(); 1745 ret = kvm_call_hyp_nvhe(__pkvm_init, hyp_mem_base, hyp_mem_size, 1746 num_possible_cpus(), kern_hyp_va(per_cpu_base), 1747 hyp_va_bits); 1748 preempt_enable(); 1749 1750 return ret; 1751 } 1752 1753 static int kvm_hyp_init_protection(u32 hyp_va_bits) 1754 { 1755 void *addr = phys_to_virt(hyp_mem_base); 1756 int ret; 1757 1758 kvm_nvhe_sym(id_aa64mmfr0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); 1759 kvm_nvhe_sym(id_aa64mmfr1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1); 1760 1761 ret = create_hyp_mappings(addr, addr + hyp_mem_size, PAGE_HYP); 1762 if (ret) 1763 return ret; 1764 1765 ret = do_pkvm_init(hyp_va_bits); 1766 if (ret) 1767 return ret; 1768 1769 free_hyp_pgds(); 1770 1771 return 0; 1772 } 1773 1774 /** 1775 * Inits Hyp-mode on all online CPUs 1776 */ 1777 static int init_hyp_mode(void) 1778 { 1779 u32 hyp_va_bits; 1780 int cpu; 1781 int err = -ENOMEM; 1782 1783 /* 1784 * The protected Hyp-mode cannot be initialized if the memory pool 1785 * allocation has failed. 1786 */ 1787 if (is_protected_kvm_enabled() && !hyp_mem_base) 1788 goto out_err; 1789 1790 /* 1791 * Allocate Hyp PGD and setup Hyp identity mapping 1792 */ 1793 err = kvm_mmu_init(&hyp_va_bits); 1794 if (err) 1795 goto out_err; 1796 1797 /* 1798 * Allocate stack pages for Hypervisor-mode 1799 */ 1800 for_each_possible_cpu(cpu) { 1801 unsigned long stack_page; 1802 1803 stack_page = __get_free_page(GFP_KERNEL); 1804 if (!stack_page) { 1805 err = -ENOMEM; 1806 goto out_err; 1807 } 1808 1809 per_cpu(kvm_arm_hyp_stack_page, cpu) = stack_page; 1810 } 1811 1812 /* 1813 * Allocate and initialize pages for Hypervisor-mode percpu regions. 1814 */ 1815 for_each_possible_cpu(cpu) { 1816 struct page *page; 1817 void *page_addr; 1818 1819 page = alloc_pages(GFP_KERNEL, nvhe_percpu_order()); 1820 if (!page) { 1821 err = -ENOMEM; 1822 goto out_err; 1823 } 1824 1825 page_addr = page_address(page); 1826 memcpy(page_addr, CHOOSE_NVHE_SYM(__per_cpu_start), nvhe_percpu_size()); 1827 kvm_arm_hyp_percpu_base[cpu] = (unsigned long)page_addr; 1828 } 1829 1830 /* 1831 * Map the Hyp-code called directly from the host 1832 */ 1833 err = create_hyp_mappings(kvm_ksym_ref(__hyp_text_start), 1834 kvm_ksym_ref(__hyp_text_end), PAGE_HYP_EXEC); 1835 if (err) { 1836 kvm_err("Cannot map world-switch code\n"); 1837 goto out_err; 1838 } 1839 1840 err = create_hyp_mappings(kvm_ksym_ref(__hyp_rodata_start), 1841 kvm_ksym_ref(__hyp_rodata_end), PAGE_HYP_RO); 1842 if (err) { 1843 kvm_err("Cannot map .hyp.rodata section\n"); 1844 goto out_err; 1845 } 1846 1847 err = create_hyp_mappings(kvm_ksym_ref(__start_rodata), 1848 kvm_ksym_ref(__end_rodata), PAGE_HYP_RO); 1849 if (err) { 1850 kvm_err("Cannot map rodata section\n"); 1851 goto out_err; 1852 } 1853 1854 /* 1855 * .hyp.bss is guaranteed to be placed at the beginning of the .bss 1856 * section thanks to an assertion in the linker script. Map it RW and 1857 * the rest of .bss RO. 1858 */ 1859 err = create_hyp_mappings(kvm_ksym_ref(__hyp_bss_start), 1860 kvm_ksym_ref(__hyp_bss_end), PAGE_HYP); 1861 if (err) { 1862 kvm_err("Cannot map hyp bss section: %d\n", err); 1863 goto out_err; 1864 } 1865 1866 err = create_hyp_mappings(kvm_ksym_ref(__hyp_bss_end), 1867 kvm_ksym_ref(__bss_stop), PAGE_HYP_RO); 1868 if (err) { 1869 kvm_err("Cannot map bss section\n"); 1870 goto out_err; 1871 } 1872 1873 /* 1874 * Map the Hyp stack pages 1875 */ 1876 for_each_possible_cpu(cpu) { 1877 char *stack_page = (char *)per_cpu(kvm_arm_hyp_stack_page, cpu); 1878 err = create_hyp_mappings(stack_page, stack_page + PAGE_SIZE, 1879 PAGE_HYP); 1880 1881 if (err) { 1882 kvm_err("Cannot map hyp stack\n"); 1883 goto out_err; 1884 } 1885 } 1886 1887 for_each_possible_cpu(cpu) { 1888 char *percpu_begin = (char *)kvm_arm_hyp_percpu_base[cpu]; 1889 char *percpu_end = percpu_begin + nvhe_percpu_size(); 1890 1891 /* Map Hyp percpu pages */ 1892 err = create_hyp_mappings(percpu_begin, percpu_end, PAGE_HYP); 1893 if (err) { 1894 kvm_err("Cannot map hyp percpu region\n"); 1895 goto out_err; 1896 } 1897 1898 /* Prepare the CPU initialization parameters */ 1899 cpu_prepare_hyp_mode(cpu); 1900 } 1901 1902 if (is_protected_kvm_enabled()) { 1903 init_cpu_logical_map(); 1904 1905 if (!init_psci_relay()) { 1906 err = -ENODEV; 1907 goto out_err; 1908 } 1909 } 1910 1911 if (is_protected_kvm_enabled()) { 1912 err = kvm_hyp_init_protection(hyp_va_bits); 1913 if (err) { 1914 kvm_err("Failed to init hyp memory protection\n"); 1915 goto out_err; 1916 } 1917 } 1918 1919 return 0; 1920 1921 out_err: 1922 teardown_hyp_mode(); 1923 kvm_err("error initializing Hyp mode: %d\n", err); 1924 return err; 1925 } 1926 1927 static void _kvm_host_prot_finalize(void *discard) 1928 { 1929 WARN_ON(kvm_call_hyp_nvhe(__pkvm_prot_finalize)); 1930 } 1931 1932 static inline int pkvm_mark_hyp(phys_addr_t start, phys_addr_t end) 1933 { 1934 return kvm_call_hyp_nvhe(__pkvm_mark_hyp, start, end); 1935 } 1936 1937 #define pkvm_mark_hyp_section(__section) \ 1938 pkvm_mark_hyp(__pa_symbol(__section##_start), \ 1939 __pa_symbol(__section##_end)) 1940 1941 static int finalize_hyp_mode(void) 1942 { 1943 int cpu, ret; 1944 1945 if (!is_protected_kvm_enabled()) 1946 return 0; 1947 1948 ret = pkvm_mark_hyp_section(__hyp_idmap_text); 1949 if (ret) 1950 return ret; 1951 1952 ret = pkvm_mark_hyp_section(__hyp_text); 1953 if (ret) 1954 return ret; 1955 1956 ret = pkvm_mark_hyp_section(__hyp_rodata); 1957 if (ret) 1958 return ret; 1959 1960 ret = pkvm_mark_hyp_section(__hyp_bss); 1961 if (ret) 1962 return ret; 1963 1964 ret = pkvm_mark_hyp(hyp_mem_base, hyp_mem_base + hyp_mem_size); 1965 if (ret) 1966 return ret; 1967 1968 for_each_possible_cpu(cpu) { 1969 phys_addr_t start = virt_to_phys((void *)kvm_arm_hyp_percpu_base[cpu]); 1970 phys_addr_t end = start + (PAGE_SIZE << nvhe_percpu_order()); 1971 1972 ret = pkvm_mark_hyp(start, end); 1973 if (ret) 1974 return ret; 1975 1976 start = virt_to_phys((void *)per_cpu(kvm_arm_hyp_stack_page, cpu)); 1977 end = start + PAGE_SIZE; 1978 ret = pkvm_mark_hyp(start, end); 1979 if (ret) 1980 return ret; 1981 } 1982 1983 /* 1984 * Flip the static key upfront as that may no longer be possible 1985 * once the host stage 2 is installed. 1986 */ 1987 static_branch_enable(&kvm_protected_mode_initialized); 1988 on_each_cpu(_kvm_host_prot_finalize, NULL, 1); 1989 1990 return 0; 1991 } 1992 1993 static void check_kvm_target_cpu(void *ret) 1994 { 1995 *(int *)ret = kvm_target_cpu(); 1996 } 1997 1998 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr) 1999 { 2000 struct kvm_vcpu *vcpu; 2001 int i; 2002 2003 mpidr &= MPIDR_HWID_BITMASK; 2004 kvm_for_each_vcpu(i, vcpu, kvm) { 2005 if (mpidr == kvm_vcpu_get_mpidr_aff(vcpu)) 2006 return vcpu; 2007 } 2008 return NULL; 2009 } 2010 2011 bool kvm_arch_has_irq_bypass(void) 2012 { 2013 return true; 2014 } 2015 2016 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons, 2017 struct irq_bypass_producer *prod) 2018 { 2019 struct kvm_kernel_irqfd *irqfd = 2020 container_of(cons, struct kvm_kernel_irqfd, consumer); 2021 2022 return kvm_vgic_v4_set_forwarding(irqfd->kvm, prod->irq, 2023 &irqfd->irq_entry); 2024 } 2025 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons, 2026 struct irq_bypass_producer *prod) 2027 { 2028 struct kvm_kernel_irqfd *irqfd = 2029 container_of(cons, struct kvm_kernel_irqfd, consumer); 2030 2031 kvm_vgic_v4_unset_forwarding(irqfd->kvm, prod->irq, 2032 &irqfd->irq_entry); 2033 } 2034 2035 void kvm_arch_irq_bypass_stop(struct irq_bypass_consumer *cons) 2036 { 2037 struct kvm_kernel_irqfd *irqfd = 2038 container_of(cons, struct kvm_kernel_irqfd, consumer); 2039 2040 kvm_arm_halt_guest(irqfd->kvm); 2041 } 2042 2043 void kvm_arch_irq_bypass_start(struct irq_bypass_consumer *cons) 2044 { 2045 struct kvm_kernel_irqfd *irqfd = 2046 container_of(cons, struct kvm_kernel_irqfd, consumer); 2047 2048 kvm_arm_resume_guest(irqfd->kvm); 2049 } 2050 2051 /** 2052 * Initialize Hyp-mode and memory mappings on all CPUs. 2053 */ 2054 int kvm_arch_init(void *opaque) 2055 { 2056 int err; 2057 int ret, cpu; 2058 bool in_hyp_mode; 2059 2060 if (!is_hyp_mode_available()) { 2061 kvm_info("HYP mode not available\n"); 2062 return -ENODEV; 2063 } 2064 2065 in_hyp_mode = is_kernel_in_hyp_mode(); 2066 2067 if (cpus_have_final_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) || 2068 cpus_have_final_cap(ARM64_WORKAROUND_1508412)) 2069 kvm_info("Guests without required CPU erratum workarounds can deadlock system!\n" \ 2070 "Only trusted guests should be used on this system.\n"); 2071 2072 for_each_online_cpu(cpu) { 2073 smp_call_function_single(cpu, check_kvm_target_cpu, &ret, 1); 2074 if (ret < 0) { 2075 kvm_err("Error, CPU %d not supported!\n", cpu); 2076 return -ENODEV; 2077 } 2078 } 2079 2080 err = init_common_resources(); 2081 if (err) 2082 return err; 2083 2084 err = kvm_arm_init_sve(); 2085 if (err) 2086 return err; 2087 2088 if (!in_hyp_mode) { 2089 err = init_hyp_mode(); 2090 if (err) 2091 goto out_err; 2092 } 2093 2094 err = kvm_init_vector_slots(); 2095 if (err) { 2096 kvm_err("Cannot initialise vector slots\n"); 2097 goto out_err; 2098 } 2099 2100 err = init_subsystems(); 2101 if (err) 2102 goto out_hyp; 2103 2104 if (!in_hyp_mode) { 2105 err = finalize_hyp_mode(); 2106 if (err) { 2107 kvm_err("Failed to finalize Hyp protection\n"); 2108 goto out_hyp; 2109 } 2110 } 2111 2112 if (is_protected_kvm_enabled()) { 2113 kvm_info("Protected nVHE mode initialized successfully\n"); 2114 } else if (in_hyp_mode) { 2115 kvm_info("VHE mode initialized successfully\n"); 2116 } else { 2117 kvm_info("Hyp mode initialized successfully\n"); 2118 } 2119 2120 return 0; 2121 2122 out_hyp: 2123 hyp_cpu_pm_exit(); 2124 if (!in_hyp_mode) 2125 teardown_hyp_mode(); 2126 out_err: 2127 return err; 2128 } 2129 2130 /* NOP: Compiling as a module not supported */ 2131 void kvm_arch_exit(void) 2132 { 2133 kvm_perf_teardown(); 2134 } 2135 2136 static int __init early_kvm_mode_cfg(char *arg) 2137 { 2138 if (!arg) 2139 return -EINVAL; 2140 2141 if (strcmp(arg, "protected") == 0) { 2142 kvm_mode = KVM_MODE_PROTECTED; 2143 return 0; 2144 } 2145 2146 if (strcmp(arg, "nvhe") == 0 && !WARN_ON(is_kernel_in_hyp_mode())) 2147 return 0; 2148 2149 return -EINVAL; 2150 } 2151 early_param("kvm-arm.mode", early_kvm_mode_cfg); 2152 2153 enum kvm_mode kvm_get_mode(void) 2154 { 2155 return kvm_mode; 2156 } 2157 2158 static int arm_init(void) 2159 { 2160 int rc = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); 2161 return rc; 2162 } 2163 2164 module_init(arm_init); 2165