1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 - Virtual Open Systems and Columbia University 4 * Author: Christoffer Dall <c.dall@virtualopensystems.com> 5 */ 6 7 #include <linux/bug.h> 8 #include <linux/cpu_pm.h> 9 #include <linux/entry-kvm.h> 10 #include <linux/errno.h> 11 #include <linux/err.h> 12 #include <linux/kvm_host.h> 13 #include <linux/list.h> 14 #include <linux/module.h> 15 #include <linux/vmalloc.h> 16 #include <linux/fs.h> 17 #include <linux/mman.h> 18 #include <linux/sched.h> 19 #include <linux/kmemleak.h> 20 #include <linux/kvm.h> 21 #include <linux/kvm_irqfd.h> 22 #include <linux/irqbypass.h> 23 #include <linux/sched/stat.h> 24 #include <linux/psci.h> 25 #include <trace/events/kvm.h> 26 27 #define CREATE_TRACE_POINTS 28 #include "trace_arm.h" 29 30 #include <linux/uaccess.h> 31 #include <asm/ptrace.h> 32 #include <asm/mman.h> 33 #include <asm/tlbflush.h> 34 #include <asm/cacheflush.h> 35 #include <asm/cpufeature.h> 36 #include <asm/virt.h> 37 #include <asm/kvm_arm.h> 38 #include <asm/kvm_asm.h> 39 #include <asm/kvm_mmu.h> 40 #include <asm/kvm_emulate.h> 41 #include <asm/sections.h> 42 43 #include <kvm/arm_hypercalls.h> 44 #include <kvm/arm_pmu.h> 45 #include <kvm/arm_psci.h> 46 47 static enum kvm_mode kvm_mode = KVM_MODE_DEFAULT; 48 DEFINE_STATIC_KEY_FALSE(kvm_protected_mode_initialized); 49 50 DECLARE_KVM_HYP_PER_CPU(unsigned long, kvm_hyp_vector); 51 52 static DEFINE_PER_CPU(unsigned long, kvm_arm_hyp_stack_page); 53 unsigned long kvm_arm_hyp_percpu_base[NR_CPUS]; 54 DECLARE_KVM_NVHE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params); 55 56 /* The VMID used in the VTTBR */ 57 static atomic64_t kvm_vmid_gen = ATOMIC64_INIT(1); 58 static u32 kvm_next_vmid; 59 static DEFINE_SPINLOCK(kvm_vmid_lock); 60 61 static bool vgic_present; 62 63 static DEFINE_PER_CPU(unsigned char, kvm_arm_hardware_enabled); 64 DEFINE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 65 66 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu) 67 { 68 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE; 69 } 70 71 int kvm_arch_hardware_setup(void *opaque) 72 { 73 return 0; 74 } 75 76 int kvm_arch_check_processor_compat(void *opaque) 77 { 78 return 0; 79 } 80 81 int kvm_vm_ioctl_enable_cap(struct kvm *kvm, 82 struct kvm_enable_cap *cap) 83 { 84 int r; 85 86 if (cap->flags) 87 return -EINVAL; 88 89 switch (cap->cap) { 90 case KVM_CAP_ARM_NISV_TO_USER: 91 r = 0; 92 kvm->arch.return_nisv_io_abort_to_user = true; 93 break; 94 case KVM_CAP_ARM_MTE: 95 mutex_lock(&kvm->lock); 96 if (!system_supports_mte() || kvm->created_vcpus) { 97 r = -EINVAL; 98 } else { 99 r = 0; 100 kvm->arch.mte_enabled = true; 101 } 102 mutex_unlock(&kvm->lock); 103 break; 104 default: 105 r = -EINVAL; 106 break; 107 } 108 109 return r; 110 } 111 112 static int kvm_arm_default_max_vcpus(void) 113 { 114 return vgic_present ? kvm_vgic_get_max_vcpus() : KVM_MAX_VCPUS; 115 } 116 117 static void set_default_spectre(struct kvm *kvm) 118 { 119 /* 120 * The default is to expose CSV2 == 1 if the HW isn't affected. 121 * Although this is a per-CPU feature, we make it global because 122 * asymmetric systems are just a nuisance. 123 * 124 * Userspace can override this as long as it doesn't promise 125 * the impossible. 126 */ 127 if (arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED) 128 kvm->arch.pfr0_csv2 = 1; 129 if (arm64_get_meltdown_state() == SPECTRE_UNAFFECTED) 130 kvm->arch.pfr0_csv3 = 1; 131 } 132 133 /** 134 * kvm_arch_init_vm - initializes a VM data structure 135 * @kvm: pointer to the KVM struct 136 */ 137 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) 138 { 139 int ret; 140 141 ret = kvm_arm_setup_stage2(kvm, type); 142 if (ret) 143 return ret; 144 145 ret = kvm_init_stage2_mmu(kvm, &kvm->arch.mmu); 146 if (ret) 147 return ret; 148 149 ret = create_hyp_mappings(kvm, kvm + 1, PAGE_HYP); 150 if (ret) 151 goto out_free_stage2_pgd; 152 153 kvm_vgic_early_init(kvm); 154 155 /* The maximum number of VCPUs is limited by the host's GIC model */ 156 kvm->arch.max_vcpus = kvm_arm_default_max_vcpus(); 157 158 set_default_spectre(kvm); 159 160 return ret; 161 out_free_stage2_pgd: 162 kvm_free_stage2_pgd(&kvm->arch.mmu); 163 return ret; 164 } 165 166 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf) 167 { 168 return VM_FAULT_SIGBUS; 169 } 170 171 172 /** 173 * kvm_arch_destroy_vm - destroy the VM data structure 174 * @kvm: pointer to the KVM struct 175 */ 176 void kvm_arch_destroy_vm(struct kvm *kvm) 177 { 178 int i; 179 180 bitmap_free(kvm->arch.pmu_filter); 181 182 kvm_vgic_destroy(kvm); 183 184 for (i = 0; i < KVM_MAX_VCPUS; ++i) { 185 if (kvm->vcpus[i]) { 186 kvm_vcpu_destroy(kvm->vcpus[i]); 187 kvm->vcpus[i] = NULL; 188 } 189 } 190 atomic_set(&kvm->online_vcpus, 0); 191 } 192 193 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) 194 { 195 int r; 196 switch (ext) { 197 case KVM_CAP_IRQCHIP: 198 r = vgic_present; 199 break; 200 case KVM_CAP_IOEVENTFD: 201 case KVM_CAP_DEVICE_CTRL: 202 case KVM_CAP_USER_MEMORY: 203 case KVM_CAP_SYNC_MMU: 204 case KVM_CAP_DESTROY_MEMORY_REGION_WORKS: 205 case KVM_CAP_ONE_REG: 206 case KVM_CAP_ARM_PSCI: 207 case KVM_CAP_ARM_PSCI_0_2: 208 case KVM_CAP_READONLY_MEM: 209 case KVM_CAP_MP_STATE: 210 case KVM_CAP_IMMEDIATE_EXIT: 211 case KVM_CAP_VCPU_EVENTS: 212 case KVM_CAP_ARM_IRQ_LINE_LAYOUT_2: 213 case KVM_CAP_ARM_NISV_TO_USER: 214 case KVM_CAP_ARM_INJECT_EXT_DABT: 215 case KVM_CAP_SET_GUEST_DEBUG: 216 case KVM_CAP_VCPU_ATTRIBUTES: 217 case KVM_CAP_PTP_KVM: 218 r = 1; 219 break; 220 case KVM_CAP_SET_GUEST_DEBUG2: 221 return KVM_GUESTDBG_VALID_MASK; 222 case KVM_CAP_ARM_SET_DEVICE_ADDR: 223 r = 1; 224 break; 225 case KVM_CAP_NR_VCPUS: 226 r = num_online_cpus(); 227 break; 228 case KVM_CAP_MAX_VCPUS: 229 case KVM_CAP_MAX_VCPU_ID: 230 if (kvm) 231 r = kvm->arch.max_vcpus; 232 else 233 r = kvm_arm_default_max_vcpus(); 234 break; 235 case KVM_CAP_MSI_DEVID: 236 if (!kvm) 237 r = -EINVAL; 238 else 239 r = kvm->arch.vgic.msis_require_devid; 240 break; 241 case KVM_CAP_ARM_USER_IRQ: 242 /* 243 * 1: EL1_VTIMER, EL1_PTIMER, and PMU. 244 * (bump this number if adding more devices) 245 */ 246 r = 1; 247 break; 248 case KVM_CAP_ARM_MTE: 249 r = system_supports_mte(); 250 break; 251 case KVM_CAP_STEAL_TIME: 252 r = kvm_arm_pvtime_supported(); 253 break; 254 case KVM_CAP_ARM_EL1_32BIT: 255 r = cpus_have_const_cap(ARM64_HAS_32BIT_EL1); 256 break; 257 case KVM_CAP_GUEST_DEBUG_HW_BPS: 258 r = get_num_brps(); 259 break; 260 case KVM_CAP_GUEST_DEBUG_HW_WPS: 261 r = get_num_wrps(); 262 break; 263 case KVM_CAP_ARM_PMU_V3: 264 r = kvm_arm_support_pmu_v3(); 265 break; 266 case KVM_CAP_ARM_INJECT_SERROR_ESR: 267 r = cpus_have_const_cap(ARM64_HAS_RAS_EXTN); 268 break; 269 case KVM_CAP_ARM_VM_IPA_SIZE: 270 r = get_kvm_ipa_limit(); 271 break; 272 case KVM_CAP_ARM_SVE: 273 r = system_supports_sve(); 274 break; 275 case KVM_CAP_ARM_PTRAUTH_ADDRESS: 276 case KVM_CAP_ARM_PTRAUTH_GENERIC: 277 r = system_has_full_ptr_auth(); 278 break; 279 default: 280 r = 0; 281 } 282 283 return r; 284 } 285 286 long kvm_arch_dev_ioctl(struct file *filp, 287 unsigned int ioctl, unsigned long arg) 288 { 289 return -EINVAL; 290 } 291 292 struct kvm *kvm_arch_alloc_vm(void) 293 { 294 size_t sz = sizeof(struct kvm); 295 296 if (!has_vhe()) 297 return kzalloc(sz, GFP_KERNEL_ACCOUNT); 298 299 return __vmalloc(sz, GFP_KERNEL_ACCOUNT | __GFP_HIGHMEM | __GFP_ZERO); 300 } 301 302 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id) 303 { 304 if (irqchip_in_kernel(kvm) && vgic_initialized(kvm)) 305 return -EBUSY; 306 307 if (id >= kvm->arch.max_vcpus) 308 return -EINVAL; 309 310 return 0; 311 } 312 313 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) 314 { 315 int err; 316 317 /* Force users to call KVM_ARM_VCPU_INIT */ 318 vcpu->arch.target = -1; 319 bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES); 320 321 vcpu->arch.mmu_page_cache.gfp_zero = __GFP_ZERO; 322 323 /* Set up the timer */ 324 kvm_timer_vcpu_init(vcpu); 325 326 kvm_pmu_vcpu_init(vcpu); 327 328 kvm_arm_reset_debug_ptr(vcpu); 329 330 kvm_arm_pvtime_vcpu_init(&vcpu->arch); 331 332 vcpu->arch.hw_mmu = &vcpu->kvm->arch.mmu; 333 334 err = kvm_vgic_vcpu_init(vcpu); 335 if (err) 336 return err; 337 338 return create_hyp_mappings(vcpu, vcpu + 1, PAGE_HYP); 339 } 340 341 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu) 342 { 343 } 344 345 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) 346 { 347 if (vcpu->arch.has_run_once && unlikely(!irqchip_in_kernel(vcpu->kvm))) 348 static_branch_dec(&userspace_irqchip_in_use); 349 350 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_cache); 351 kvm_timer_vcpu_terminate(vcpu); 352 kvm_pmu_vcpu_destroy(vcpu); 353 354 kvm_arm_vcpu_destroy(vcpu); 355 } 356 357 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu) 358 { 359 return kvm_timer_is_pending(vcpu); 360 } 361 362 void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 363 { 364 /* 365 * If we're about to block (most likely because we've just hit a 366 * WFI), we need to sync back the state of the GIC CPU interface 367 * so that we have the latest PMR and group enables. This ensures 368 * that kvm_arch_vcpu_runnable has up-to-date data to decide 369 * whether we have pending interrupts. 370 * 371 * For the same reason, we want to tell GICv4 that we need 372 * doorbells to be signalled, should an interrupt become pending. 373 */ 374 preempt_disable(); 375 kvm_vgic_vmcr_sync(vcpu); 376 vgic_v4_put(vcpu, true); 377 preempt_enable(); 378 } 379 380 void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 381 { 382 preempt_disable(); 383 vgic_v4_load(vcpu); 384 preempt_enable(); 385 } 386 387 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 388 { 389 struct kvm_s2_mmu *mmu; 390 int *last_ran; 391 392 mmu = vcpu->arch.hw_mmu; 393 last_ran = this_cpu_ptr(mmu->last_vcpu_ran); 394 395 /* 396 * We guarantee that both TLBs and I-cache are private to each 397 * vcpu. If detecting that a vcpu from the same VM has 398 * previously run on the same physical CPU, call into the 399 * hypervisor code to nuke the relevant contexts. 400 * 401 * We might get preempted before the vCPU actually runs, but 402 * over-invalidation doesn't affect correctness. 403 */ 404 if (*last_ran != vcpu->vcpu_id) { 405 kvm_call_hyp(__kvm_flush_cpu_context, mmu); 406 *last_ran = vcpu->vcpu_id; 407 } 408 409 vcpu->cpu = cpu; 410 411 kvm_vgic_load(vcpu); 412 kvm_timer_vcpu_load(vcpu); 413 if (has_vhe()) 414 kvm_vcpu_load_sysregs_vhe(vcpu); 415 kvm_arch_vcpu_load_fp(vcpu); 416 kvm_vcpu_pmu_restore_guest(vcpu); 417 if (kvm_arm_is_pvtime_enabled(&vcpu->arch)) 418 kvm_make_request(KVM_REQ_RECORD_STEAL, vcpu); 419 420 if (single_task_running()) 421 vcpu_clear_wfx_traps(vcpu); 422 else 423 vcpu_set_wfx_traps(vcpu); 424 425 if (vcpu_has_ptrauth(vcpu)) 426 vcpu_ptrauth_disable(vcpu); 427 kvm_arch_vcpu_load_debug_state_flags(vcpu); 428 } 429 430 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) 431 { 432 kvm_arch_vcpu_put_debug_state_flags(vcpu); 433 kvm_arch_vcpu_put_fp(vcpu); 434 if (has_vhe()) 435 kvm_vcpu_put_sysregs_vhe(vcpu); 436 kvm_timer_vcpu_put(vcpu); 437 kvm_vgic_put(vcpu); 438 kvm_vcpu_pmu_restore_host(vcpu); 439 440 vcpu->cpu = -1; 441 } 442 443 static void vcpu_power_off(struct kvm_vcpu *vcpu) 444 { 445 vcpu->arch.power_off = true; 446 kvm_make_request(KVM_REQ_SLEEP, vcpu); 447 kvm_vcpu_kick(vcpu); 448 } 449 450 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, 451 struct kvm_mp_state *mp_state) 452 { 453 if (vcpu->arch.power_off) 454 mp_state->mp_state = KVM_MP_STATE_STOPPED; 455 else 456 mp_state->mp_state = KVM_MP_STATE_RUNNABLE; 457 458 return 0; 459 } 460 461 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu, 462 struct kvm_mp_state *mp_state) 463 { 464 int ret = 0; 465 466 switch (mp_state->mp_state) { 467 case KVM_MP_STATE_RUNNABLE: 468 vcpu->arch.power_off = false; 469 break; 470 case KVM_MP_STATE_STOPPED: 471 vcpu_power_off(vcpu); 472 break; 473 default: 474 ret = -EINVAL; 475 } 476 477 return ret; 478 } 479 480 /** 481 * kvm_arch_vcpu_runnable - determine if the vcpu can be scheduled 482 * @v: The VCPU pointer 483 * 484 * If the guest CPU is not waiting for interrupts or an interrupt line is 485 * asserted, the CPU is by definition runnable. 486 */ 487 int kvm_arch_vcpu_runnable(struct kvm_vcpu *v) 488 { 489 bool irq_lines = *vcpu_hcr(v) & (HCR_VI | HCR_VF); 490 return ((irq_lines || kvm_vgic_vcpu_pending_irq(v)) 491 && !v->arch.power_off && !v->arch.pause); 492 } 493 494 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu) 495 { 496 return vcpu_mode_priv(vcpu); 497 } 498 499 /* Just ensure a guest exit from a particular CPU */ 500 static void exit_vm_noop(void *info) 501 { 502 } 503 504 void force_vm_exit(const cpumask_t *mask) 505 { 506 preempt_disable(); 507 smp_call_function_many(mask, exit_vm_noop, NULL, true); 508 preempt_enable(); 509 } 510 511 /** 512 * need_new_vmid_gen - check that the VMID is still valid 513 * @vmid: The VMID to check 514 * 515 * return true if there is a new generation of VMIDs being used 516 * 517 * The hardware supports a limited set of values with the value zero reserved 518 * for the host, so we check if an assigned value belongs to a previous 519 * generation, which requires us to assign a new value. If we're the first to 520 * use a VMID for the new generation, we must flush necessary caches and TLBs 521 * on all CPUs. 522 */ 523 static bool need_new_vmid_gen(struct kvm_vmid *vmid) 524 { 525 u64 current_vmid_gen = atomic64_read(&kvm_vmid_gen); 526 smp_rmb(); /* Orders read of kvm_vmid_gen and kvm->arch.vmid */ 527 return unlikely(READ_ONCE(vmid->vmid_gen) != current_vmid_gen); 528 } 529 530 /** 531 * update_vmid - Update the vmid with a valid VMID for the current generation 532 * @vmid: The stage-2 VMID information struct 533 */ 534 static void update_vmid(struct kvm_vmid *vmid) 535 { 536 if (!need_new_vmid_gen(vmid)) 537 return; 538 539 spin_lock(&kvm_vmid_lock); 540 541 /* 542 * We need to re-check the vmid_gen here to ensure that if another vcpu 543 * already allocated a valid vmid for this vm, then this vcpu should 544 * use the same vmid. 545 */ 546 if (!need_new_vmid_gen(vmid)) { 547 spin_unlock(&kvm_vmid_lock); 548 return; 549 } 550 551 /* First user of a new VMID generation? */ 552 if (unlikely(kvm_next_vmid == 0)) { 553 atomic64_inc(&kvm_vmid_gen); 554 kvm_next_vmid = 1; 555 556 /* 557 * On SMP we know no other CPUs can use this CPU's or each 558 * other's VMID after force_vm_exit returns since the 559 * kvm_vmid_lock blocks them from reentry to the guest. 560 */ 561 force_vm_exit(cpu_all_mask); 562 /* 563 * Now broadcast TLB + ICACHE invalidation over the inner 564 * shareable domain to make sure all data structures are 565 * clean. 566 */ 567 kvm_call_hyp(__kvm_flush_vm_context); 568 } 569 570 WRITE_ONCE(vmid->vmid, kvm_next_vmid); 571 kvm_next_vmid++; 572 kvm_next_vmid &= (1 << kvm_get_vmid_bits()) - 1; 573 574 smp_wmb(); 575 WRITE_ONCE(vmid->vmid_gen, atomic64_read(&kvm_vmid_gen)); 576 577 spin_unlock(&kvm_vmid_lock); 578 } 579 580 static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu) 581 { 582 struct kvm *kvm = vcpu->kvm; 583 int ret = 0; 584 585 if (likely(vcpu->arch.has_run_once)) 586 return 0; 587 588 if (!kvm_arm_vcpu_is_finalized(vcpu)) 589 return -EPERM; 590 591 vcpu->arch.has_run_once = true; 592 593 kvm_arm_vcpu_init_debug(vcpu); 594 595 if (likely(irqchip_in_kernel(kvm))) { 596 /* 597 * Map the VGIC hardware resources before running a vcpu the 598 * first time on this VM. 599 */ 600 ret = kvm_vgic_map_resources(kvm); 601 if (ret) 602 return ret; 603 } else { 604 /* 605 * Tell the rest of the code that there are userspace irqchip 606 * VMs in the wild. 607 */ 608 static_branch_inc(&userspace_irqchip_in_use); 609 } 610 611 ret = kvm_timer_enable(vcpu); 612 if (ret) 613 return ret; 614 615 ret = kvm_arm_pmu_v3_enable(vcpu); 616 617 /* 618 * Initialize traps for protected VMs. 619 * NOTE: Move to run in EL2 directly, rather than via a hypercall, once 620 * the code is in place for first run initialization at EL2. 621 */ 622 if (kvm_vm_is_protected(kvm)) 623 kvm_call_hyp_nvhe(__pkvm_vcpu_init_traps, vcpu); 624 625 return ret; 626 } 627 628 bool kvm_arch_intc_initialized(struct kvm *kvm) 629 { 630 return vgic_initialized(kvm); 631 } 632 633 void kvm_arm_halt_guest(struct kvm *kvm) 634 { 635 int i; 636 struct kvm_vcpu *vcpu; 637 638 kvm_for_each_vcpu(i, vcpu, kvm) 639 vcpu->arch.pause = true; 640 kvm_make_all_cpus_request(kvm, KVM_REQ_SLEEP); 641 } 642 643 void kvm_arm_resume_guest(struct kvm *kvm) 644 { 645 int i; 646 struct kvm_vcpu *vcpu; 647 648 kvm_for_each_vcpu(i, vcpu, kvm) { 649 vcpu->arch.pause = false; 650 rcuwait_wake_up(kvm_arch_vcpu_get_wait(vcpu)); 651 } 652 } 653 654 static void vcpu_req_sleep(struct kvm_vcpu *vcpu) 655 { 656 struct rcuwait *wait = kvm_arch_vcpu_get_wait(vcpu); 657 658 rcuwait_wait_event(wait, 659 (!vcpu->arch.power_off) &&(!vcpu->arch.pause), 660 TASK_INTERRUPTIBLE); 661 662 if (vcpu->arch.power_off || vcpu->arch.pause) { 663 /* Awaken to handle a signal, request we sleep again later. */ 664 kvm_make_request(KVM_REQ_SLEEP, vcpu); 665 } 666 667 /* 668 * Make sure we will observe a potential reset request if we've 669 * observed a change to the power state. Pairs with the smp_wmb() in 670 * kvm_psci_vcpu_on(). 671 */ 672 smp_rmb(); 673 } 674 675 static int kvm_vcpu_initialized(struct kvm_vcpu *vcpu) 676 { 677 return vcpu->arch.target >= 0; 678 } 679 680 static void check_vcpu_requests(struct kvm_vcpu *vcpu) 681 { 682 if (kvm_request_pending(vcpu)) { 683 if (kvm_check_request(KVM_REQ_SLEEP, vcpu)) 684 vcpu_req_sleep(vcpu); 685 686 if (kvm_check_request(KVM_REQ_VCPU_RESET, vcpu)) 687 kvm_reset_vcpu(vcpu); 688 689 /* 690 * Clear IRQ_PENDING requests that were made to guarantee 691 * that a VCPU sees new virtual interrupts. 692 */ 693 kvm_check_request(KVM_REQ_IRQ_PENDING, vcpu); 694 695 if (kvm_check_request(KVM_REQ_RECORD_STEAL, vcpu)) 696 kvm_update_stolen_time(vcpu); 697 698 if (kvm_check_request(KVM_REQ_RELOAD_GICv4, vcpu)) { 699 /* The distributor enable bits were changed */ 700 preempt_disable(); 701 vgic_v4_put(vcpu, false); 702 vgic_v4_load(vcpu); 703 preempt_enable(); 704 } 705 706 if (kvm_check_request(KVM_REQ_RELOAD_PMU, vcpu)) 707 kvm_pmu_handle_pmcr(vcpu, 708 __vcpu_sys_reg(vcpu, PMCR_EL0)); 709 } 710 } 711 712 static bool vcpu_mode_is_bad_32bit(struct kvm_vcpu *vcpu) 713 { 714 if (likely(!vcpu_mode_is_32bit(vcpu))) 715 return false; 716 717 return !system_supports_32bit_el0() || 718 static_branch_unlikely(&arm64_mismatched_32bit_el0); 719 } 720 721 /** 722 * kvm_vcpu_exit_request - returns true if the VCPU should *not* enter the guest 723 * @vcpu: The VCPU pointer 724 * @ret: Pointer to write optional return code 725 * 726 * Returns: true if the VCPU needs to return to a preemptible + interruptible 727 * and skip guest entry. 728 * 729 * This function disambiguates between two different types of exits: exits to a 730 * preemptible + interruptible kernel context and exits to userspace. For an 731 * exit to userspace, this function will write the return code to ret and return 732 * true. For an exit to preemptible + interruptible kernel context (i.e. check 733 * for pending work and re-enter), return true without writing to ret. 734 */ 735 static bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu, int *ret) 736 { 737 struct kvm_run *run = vcpu->run; 738 739 /* 740 * If we're using a userspace irqchip, then check if we need 741 * to tell a userspace irqchip about timer or PMU level 742 * changes and if so, exit to userspace (the actual level 743 * state gets updated in kvm_timer_update_run and 744 * kvm_pmu_update_run below). 745 */ 746 if (static_branch_unlikely(&userspace_irqchip_in_use)) { 747 if (kvm_timer_should_notify_user(vcpu) || 748 kvm_pmu_should_notify_user(vcpu)) { 749 *ret = -EINTR; 750 run->exit_reason = KVM_EXIT_INTR; 751 return true; 752 } 753 } 754 755 return kvm_request_pending(vcpu) || 756 need_new_vmid_gen(&vcpu->arch.hw_mmu->vmid) || 757 xfer_to_guest_mode_work_pending(); 758 } 759 760 /** 761 * kvm_arch_vcpu_ioctl_run - the main VCPU run function to execute guest code 762 * @vcpu: The VCPU pointer 763 * 764 * This function is called through the VCPU_RUN ioctl called from user space. It 765 * will execute VM code in a loop until the time slice for the process is used 766 * or some emulation is needed from user space in which case the function will 767 * return with return value 0 and with the kvm_run structure filled in with the 768 * required data for the requested emulation. 769 */ 770 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) 771 { 772 struct kvm_run *run = vcpu->run; 773 int ret; 774 775 if (unlikely(!kvm_vcpu_initialized(vcpu))) 776 return -ENOEXEC; 777 778 ret = kvm_vcpu_first_run_init(vcpu); 779 if (ret) 780 return ret; 781 782 if (run->exit_reason == KVM_EXIT_MMIO) { 783 ret = kvm_handle_mmio_return(vcpu); 784 if (ret) 785 return ret; 786 } 787 788 vcpu_load(vcpu); 789 790 if (run->immediate_exit) { 791 ret = -EINTR; 792 goto out; 793 } 794 795 kvm_sigset_activate(vcpu); 796 797 ret = 1; 798 run->exit_reason = KVM_EXIT_UNKNOWN; 799 while (ret > 0) { 800 /* 801 * Check conditions before entering the guest 802 */ 803 ret = xfer_to_guest_mode_handle_work(vcpu); 804 if (!ret) 805 ret = 1; 806 807 update_vmid(&vcpu->arch.hw_mmu->vmid); 808 809 check_vcpu_requests(vcpu); 810 811 /* 812 * Preparing the interrupts to be injected also 813 * involves poking the GIC, which must be done in a 814 * non-preemptible context. 815 */ 816 preempt_disable(); 817 818 kvm_pmu_flush_hwstate(vcpu); 819 820 local_irq_disable(); 821 822 kvm_vgic_flush_hwstate(vcpu); 823 824 /* 825 * Ensure we set mode to IN_GUEST_MODE after we disable 826 * interrupts and before the final VCPU requests check. 827 * See the comment in kvm_vcpu_exiting_guest_mode() and 828 * Documentation/virt/kvm/vcpu-requests.rst 829 */ 830 smp_store_mb(vcpu->mode, IN_GUEST_MODE); 831 832 if (ret <= 0 || kvm_vcpu_exit_request(vcpu, &ret)) { 833 vcpu->mode = OUTSIDE_GUEST_MODE; 834 isb(); /* Ensure work in x_flush_hwstate is committed */ 835 kvm_pmu_sync_hwstate(vcpu); 836 if (static_branch_unlikely(&userspace_irqchip_in_use)) 837 kvm_timer_sync_user(vcpu); 838 kvm_vgic_sync_hwstate(vcpu); 839 local_irq_enable(); 840 preempt_enable(); 841 continue; 842 } 843 844 kvm_arm_setup_debug(vcpu); 845 846 /************************************************************** 847 * Enter the guest 848 */ 849 trace_kvm_entry(*vcpu_pc(vcpu)); 850 guest_enter_irqoff(); 851 852 ret = kvm_call_hyp_ret(__kvm_vcpu_run, vcpu); 853 854 vcpu->mode = OUTSIDE_GUEST_MODE; 855 vcpu->stat.exits++; 856 /* 857 * Back from guest 858 *************************************************************/ 859 860 kvm_arm_clear_debug(vcpu); 861 862 /* 863 * We must sync the PMU state before the vgic state so 864 * that the vgic can properly sample the updated state of the 865 * interrupt line. 866 */ 867 kvm_pmu_sync_hwstate(vcpu); 868 869 /* 870 * Sync the vgic state before syncing the timer state because 871 * the timer code needs to know if the virtual timer 872 * interrupts are active. 873 */ 874 kvm_vgic_sync_hwstate(vcpu); 875 876 /* 877 * Sync the timer hardware state before enabling interrupts as 878 * we don't want vtimer interrupts to race with syncing the 879 * timer virtual interrupt state. 880 */ 881 if (static_branch_unlikely(&userspace_irqchip_in_use)) 882 kvm_timer_sync_user(vcpu); 883 884 kvm_arch_vcpu_ctxsync_fp(vcpu); 885 886 /* 887 * We may have taken a host interrupt in HYP mode (ie 888 * while executing the guest). This interrupt is still 889 * pending, as we haven't serviced it yet! 890 * 891 * We're now back in SVC mode, with interrupts 892 * disabled. Enabling the interrupts now will have 893 * the effect of taking the interrupt again, in SVC 894 * mode this time. 895 */ 896 local_irq_enable(); 897 898 /* 899 * We do local_irq_enable() before calling guest_exit() so 900 * that if a timer interrupt hits while running the guest we 901 * account that tick as being spent in the guest. We enable 902 * preemption after calling guest_exit() so that if we get 903 * preempted we make sure ticks after that is not counted as 904 * guest time. 905 */ 906 guest_exit(); 907 trace_kvm_exit(ret, kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu)); 908 909 /* Exit types that need handling before we can be preempted */ 910 handle_exit_early(vcpu, ret); 911 912 preempt_enable(); 913 914 /* 915 * The ARMv8 architecture doesn't give the hypervisor 916 * a mechanism to prevent a guest from dropping to AArch32 EL0 917 * if implemented by the CPU. If we spot the guest in such 918 * state and that we decided it wasn't supposed to do so (like 919 * with the asymmetric AArch32 case), return to userspace with 920 * a fatal error. 921 */ 922 if (vcpu_mode_is_bad_32bit(vcpu)) { 923 /* 924 * As we have caught the guest red-handed, decide that 925 * it isn't fit for purpose anymore by making the vcpu 926 * invalid. The VMM can try and fix it by issuing a 927 * KVM_ARM_VCPU_INIT if it really wants to. 928 */ 929 vcpu->arch.target = -1; 930 ret = ARM_EXCEPTION_IL; 931 } 932 933 ret = handle_exit(vcpu, ret); 934 } 935 936 /* Tell userspace about in-kernel device output levels */ 937 if (unlikely(!irqchip_in_kernel(vcpu->kvm))) { 938 kvm_timer_update_run(vcpu); 939 kvm_pmu_update_run(vcpu); 940 } 941 942 kvm_sigset_deactivate(vcpu); 943 944 out: 945 /* 946 * In the unlikely event that we are returning to userspace 947 * with pending exceptions or PC adjustment, commit these 948 * adjustments in order to give userspace a consistent view of 949 * the vcpu state. Note that this relies on __kvm_adjust_pc() 950 * being preempt-safe on VHE. 951 */ 952 if (unlikely(vcpu->arch.flags & (KVM_ARM64_PENDING_EXCEPTION | 953 KVM_ARM64_INCREMENT_PC))) 954 kvm_call_hyp(__kvm_adjust_pc, vcpu); 955 956 vcpu_put(vcpu); 957 return ret; 958 } 959 960 static int vcpu_interrupt_line(struct kvm_vcpu *vcpu, int number, bool level) 961 { 962 int bit_index; 963 bool set; 964 unsigned long *hcr; 965 966 if (number == KVM_ARM_IRQ_CPU_IRQ) 967 bit_index = __ffs(HCR_VI); 968 else /* KVM_ARM_IRQ_CPU_FIQ */ 969 bit_index = __ffs(HCR_VF); 970 971 hcr = vcpu_hcr(vcpu); 972 if (level) 973 set = test_and_set_bit(bit_index, hcr); 974 else 975 set = test_and_clear_bit(bit_index, hcr); 976 977 /* 978 * If we didn't change anything, no need to wake up or kick other CPUs 979 */ 980 if (set == level) 981 return 0; 982 983 /* 984 * The vcpu irq_lines field was updated, wake up sleeping VCPUs and 985 * trigger a world-switch round on the running physical CPU to set the 986 * virtual IRQ/FIQ fields in the HCR appropriately. 987 */ 988 kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); 989 kvm_vcpu_kick(vcpu); 990 991 return 0; 992 } 993 994 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_level, 995 bool line_status) 996 { 997 u32 irq = irq_level->irq; 998 unsigned int irq_type, vcpu_idx, irq_num; 999 int nrcpus = atomic_read(&kvm->online_vcpus); 1000 struct kvm_vcpu *vcpu = NULL; 1001 bool level = irq_level->level; 1002 1003 irq_type = (irq >> KVM_ARM_IRQ_TYPE_SHIFT) & KVM_ARM_IRQ_TYPE_MASK; 1004 vcpu_idx = (irq >> KVM_ARM_IRQ_VCPU_SHIFT) & KVM_ARM_IRQ_VCPU_MASK; 1005 vcpu_idx += ((irq >> KVM_ARM_IRQ_VCPU2_SHIFT) & KVM_ARM_IRQ_VCPU2_MASK) * (KVM_ARM_IRQ_VCPU_MASK + 1); 1006 irq_num = (irq >> KVM_ARM_IRQ_NUM_SHIFT) & KVM_ARM_IRQ_NUM_MASK; 1007 1008 trace_kvm_irq_line(irq_type, vcpu_idx, irq_num, irq_level->level); 1009 1010 switch (irq_type) { 1011 case KVM_ARM_IRQ_TYPE_CPU: 1012 if (irqchip_in_kernel(kvm)) 1013 return -ENXIO; 1014 1015 if (vcpu_idx >= nrcpus) 1016 return -EINVAL; 1017 1018 vcpu = kvm_get_vcpu(kvm, vcpu_idx); 1019 if (!vcpu) 1020 return -EINVAL; 1021 1022 if (irq_num > KVM_ARM_IRQ_CPU_FIQ) 1023 return -EINVAL; 1024 1025 return vcpu_interrupt_line(vcpu, irq_num, level); 1026 case KVM_ARM_IRQ_TYPE_PPI: 1027 if (!irqchip_in_kernel(kvm)) 1028 return -ENXIO; 1029 1030 if (vcpu_idx >= nrcpus) 1031 return -EINVAL; 1032 1033 vcpu = kvm_get_vcpu(kvm, vcpu_idx); 1034 if (!vcpu) 1035 return -EINVAL; 1036 1037 if (irq_num < VGIC_NR_SGIS || irq_num >= VGIC_NR_PRIVATE_IRQS) 1038 return -EINVAL; 1039 1040 return kvm_vgic_inject_irq(kvm, vcpu->vcpu_id, irq_num, level, NULL); 1041 case KVM_ARM_IRQ_TYPE_SPI: 1042 if (!irqchip_in_kernel(kvm)) 1043 return -ENXIO; 1044 1045 if (irq_num < VGIC_NR_PRIVATE_IRQS) 1046 return -EINVAL; 1047 1048 return kvm_vgic_inject_irq(kvm, 0, irq_num, level, NULL); 1049 } 1050 1051 return -EINVAL; 1052 } 1053 1054 static int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, 1055 const struct kvm_vcpu_init *init) 1056 { 1057 unsigned int i, ret; 1058 u32 phys_target = kvm_target_cpu(); 1059 1060 if (init->target != phys_target) 1061 return -EINVAL; 1062 1063 /* 1064 * Secondary and subsequent calls to KVM_ARM_VCPU_INIT must 1065 * use the same target. 1066 */ 1067 if (vcpu->arch.target != -1 && vcpu->arch.target != init->target) 1068 return -EINVAL; 1069 1070 /* -ENOENT for unknown features, -EINVAL for invalid combinations. */ 1071 for (i = 0; i < sizeof(init->features) * 8; i++) { 1072 bool set = (init->features[i / 32] & (1 << (i % 32))); 1073 1074 if (set && i >= KVM_VCPU_MAX_FEATURES) 1075 return -ENOENT; 1076 1077 /* 1078 * Secondary and subsequent calls to KVM_ARM_VCPU_INIT must 1079 * use the same feature set. 1080 */ 1081 if (vcpu->arch.target != -1 && i < KVM_VCPU_MAX_FEATURES && 1082 test_bit(i, vcpu->arch.features) != set) 1083 return -EINVAL; 1084 1085 if (set) 1086 set_bit(i, vcpu->arch.features); 1087 } 1088 1089 vcpu->arch.target = phys_target; 1090 1091 /* Now we know what it is, we can reset it. */ 1092 ret = kvm_reset_vcpu(vcpu); 1093 if (ret) { 1094 vcpu->arch.target = -1; 1095 bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES); 1096 } 1097 1098 return ret; 1099 } 1100 1101 static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu, 1102 struct kvm_vcpu_init *init) 1103 { 1104 int ret; 1105 1106 ret = kvm_vcpu_set_target(vcpu, init); 1107 if (ret) 1108 return ret; 1109 1110 /* 1111 * Ensure a rebooted VM will fault in RAM pages and detect if the 1112 * guest MMU is turned off and flush the caches as needed. 1113 * 1114 * S2FWB enforces all memory accesses to RAM being cacheable, 1115 * ensuring that the data side is always coherent. We still 1116 * need to invalidate the I-cache though, as FWB does *not* 1117 * imply CTR_EL0.DIC. 1118 */ 1119 if (vcpu->arch.has_run_once) { 1120 if (!cpus_have_final_cap(ARM64_HAS_STAGE2_FWB)) 1121 stage2_unmap_vm(vcpu->kvm); 1122 else 1123 icache_inval_all_pou(); 1124 } 1125 1126 vcpu_reset_hcr(vcpu); 1127 vcpu->arch.cptr_el2 = CPTR_EL2_DEFAULT; 1128 1129 /* 1130 * Handle the "start in power-off" case. 1131 */ 1132 if (test_bit(KVM_ARM_VCPU_POWER_OFF, vcpu->arch.features)) 1133 vcpu_power_off(vcpu); 1134 else 1135 vcpu->arch.power_off = false; 1136 1137 return 0; 1138 } 1139 1140 static int kvm_arm_vcpu_set_attr(struct kvm_vcpu *vcpu, 1141 struct kvm_device_attr *attr) 1142 { 1143 int ret = -ENXIO; 1144 1145 switch (attr->group) { 1146 default: 1147 ret = kvm_arm_vcpu_arch_set_attr(vcpu, attr); 1148 break; 1149 } 1150 1151 return ret; 1152 } 1153 1154 static int kvm_arm_vcpu_get_attr(struct kvm_vcpu *vcpu, 1155 struct kvm_device_attr *attr) 1156 { 1157 int ret = -ENXIO; 1158 1159 switch (attr->group) { 1160 default: 1161 ret = kvm_arm_vcpu_arch_get_attr(vcpu, attr); 1162 break; 1163 } 1164 1165 return ret; 1166 } 1167 1168 static int kvm_arm_vcpu_has_attr(struct kvm_vcpu *vcpu, 1169 struct kvm_device_attr *attr) 1170 { 1171 int ret = -ENXIO; 1172 1173 switch (attr->group) { 1174 default: 1175 ret = kvm_arm_vcpu_arch_has_attr(vcpu, attr); 1176 break; 1177 } 1178 1179 return ret; 1180 } 1181 1182 static int kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, 1183 struct kvm_vcpu_events *events) 1184 { 1185 memset(events, 0, sizeof(*events)); 1186 1187 return __kvm_arm_vcpu_get_events(vcpu, events); 1188 } 1189 1190 static int kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, 1191 struct kvm_vcpu_events *events) 1192 { 1193 int i; 1194 1195 /* check whether the reserved field is zero */ 1196 for (i = 0; i < ARRAY_SIZE(events->reserved); i++) 1197 if (events->reserved[i]) 1198 return -EINVAL; 1199 1200 /* check whether the pad field is zero */ 1201 for (i = 0; i < ARRAY_SIZE(events->exception.pad); i++) 1202 if (events->exception.pad[i]) 1203 return -EINVAL; 1204 1205 return __kvm_arm_vcpu_set_events(vcpu, events); 1206 } 1207 1208 long kvm_arch_vcpu_ioctl(struct file *filp, 1209 unsigned int ioctl, unsigned long arg) 1210 { 1211 struct kvm_vcpu *vcpu = filp->private_data; 1212 void __user *argp = (void __user *)arg; 1213 struct kvm_device_attr attr; 1214 long r; 1215 1216 switch (ioctl) { 1217 case KVM_ARM_VCPU_INIT: { 1218 struct kvm_vcpu_init init; 1219 1220 r = -EFAULT; 1221 if (copy_from_user(&init, argp, sizeof(init))) 1222 break; 1223 1224 r = kvm_arch_vcpu_ioctl_vcpu_init(vcpu, &init); 1225 break; 1226 } 1227 case KVM_SET_ONE_REG: 1228 case KVM_GET_ONE_REG: { 1229 struct kvm_one_reg reg; 1230 1231 r = -ENOEXEC; 1232 if (unlikely(!kvm_vcpu_initialized(vcpu))) 1233 break; 1234 1235 r = -EFAULT; 1236 if (copy_from_user(®, argp, sizeof(reg))) 1237 break; 1238 1239 /* 1240 * We could owe a reset due to PSCI. Handle the pending reset 1241 * here to ensure userspace register accesses are ordered after 1242 * the reset. 1243 */ 1244 if (kvm_check_request(KVM_REQ_VCPU_RESET, vcpu)) 1245 kvm_reset_vcpu(vcpu); 1246 1247 if (ioctl == KVM_SET_ONE_REG) 1248 r = kvm_arm_set_reg(vcpu, ®); 1249 else 1250 r = kvm_arm_get_reg(vcpu, ®); 1251 break; 1252 } 1253 case KVM_GET_REG_LIST: { 1254 struct kvm_reg_list __user *user_list = argp; 1255 struct kvm_reg_list reg_list; 1256 unsigned n; 1257 1258 r = -ENOEXEC; 1259 if (unlikely(!kvm_vcpu_initialized(vcpu))) 1260 break; 1261 1262 r = -EPERM; 1263 if (!kvm_arm_vcpu_is_finalized(vcpu)) 1264 break; 1265 1266 r = -EFAULT; 1267 if (copy_from_user(®_list, user_list, sizeof(reg_list))) 1268 break; 1269 n = reg_list.n; 1270 reg_list.n = kvm_arm_num_regs(vcpu); 1271 if (copy_to_user(user_list, ®_list, sizeof(reg_list))) 1272 break; 1273 r = -E2BIG; 1274 if (n < reg_list.n) 1275 break; 1276 r = kvm_arm_copy_reg_indices(vcpu, user_list->reg); 1277 break; 1278 } 1279 case KVM_SET_DEVICE_ATTR: { 1280 r = -EFAULT; 1281 if (copy_from_user(&attr, argp, sizeof(attr))) 1282 break; 1283 r = kvm_arm_vcpu_set_attr(vcpu, &attr); 1284 break; 1285 } 1286 case KVM_GET_DEVICE_ATTR: { 1287 r = -EFAULT; 1288 if (copy_from_user(&attr, argp, sizeof(attr))) 1289 break; 1290 r = kvm_arm_vcpu_get_attr(vcpu, &attr); 1291 break; 1292 } 1293 case KVM_HAS_DEVICE_ATTR: { 1294 r = -EFAULT; 1295 if (copy_from_user(&attr, argp, sizeof(attr))) 1296 break; 1297 r = kvm_arm_vcpu_has_attr(vcpu, &attr); 1298 break; 1299 } 1300 case KVM_GET_VCPU_EVENTS: { 1301 struct kvm_vcpu_events events; 1302 1303 if (kvm_arm_vcpu_get_events(vcpu, &events)) 1304 return -EINVAL; 1305 1306 if (copy_to_user(argp, &events, sizeof(events))) 1307 return -EFAULT; 1308 1309 return 0; 1310 } 1311 case KVM_SET_VCPU_EVENTS: { 1312 struct kvm_vcpu_events events; 1313 1314 if (copy_from_user(&events, argp, sizeof(events))) 1315 return -EFAULT; 1316 1317 return kvm_arm_vcpu_set_events(vcpu, &events); 1318 } 1319 case KVM_ARM_VCPU_FINALIZE: { 1320 int what; 1321 1322 if (!kvm_vcpu_initialized(vcpu)) 1323 return -ENOEXEC; 1324 1325 if (get_user(what, (const int __user *)argp)) 1326 return -EFAULT; 1327 1328 return kvm_arm_vcpu_finalize(vcpu, what); 1329 } 1330 default: 1331 r = -EINVAL; 1332 } 1333 1334 return r; 1335 } 1336 1337 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot) 1338 { 1339 1340 } 1341 1342 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 1343 const struct kvm_memory_slot *memslot) 1344 { 1345 kvm_flush_remote_tlbs(kvm); 1346 } 1347 1348 static int kvm_vm_ioctl_set_device_addr(struct kvm *kvm, 1349 struct kvm_arm_device_addr *dev_addr) 1350 { 1351 unsigned long dev_id, type; 1352 1353 dev_id = (dev_addr->id & KVM_ARM_DEVICE_ID_MASK) >> 1354 KVM_ARM_DEVICE_ID_SHIFT; 1355 type = (dev_addr->id & KVM_ARM_DEVICE_TYPE_MASK) >> 1356 KVM_ARM_DEVICE_TYPE_SHIFT; 1357 1358 switch (dev_id) { 1359 case KVM_ARM_DEVICE_VGIC_V2: 1360 if (!vgic_present) 1361 return -ENXIO; 1362 return kvm_vgic_addr(kvm, type, &dev_addr->addr, true); 1363 default: 1364 return -ENODEV; 1365 } 1366 } 1367 1368 long kvm_arch_vm_ioctl(struct file *filp, 1369 unsigned int ioctl, unsigned long arg) 1370 { 1371 struct kvm *kvm = filp->private_data; 1372 void __user *argp = (void __user *)arg; 1373 1374 switch (ioctl) { 1375 case KVM_CREATE_IRQCHIP: { 1376 int ret; 1377 if (!vgic_present) 1378 return -ENXIO; 1379 mutex_lock(&kvm->lock); 1380 ret = kvm_vgic_create(kvm, KVM_DEV_TYPE_ARM_VGIC_V2); 1381 mutex_unlock(&kvm->lock); 1382 return ret; 1383 } 1384 case KVM_ARM_SET_DEVICE_ADDR: { 1385 struct kvm_arm_device_addr dev_addr; 1386 1387 if (copy_from_user(&dev_addr, argp, sizeof(dev_addr))) 1388 return -EFAULT; 1389 return kvm_vm_ioctl_set_device_addr(kvm, &dev_addr); 1390 } 1391 case KVM_ARM_PREFERRED_TARGET: { 1392 struct kvm_vcpu_init init; 1393 1394 kvm_vcpu_preferred_target(&init); 1395 1396 if (copy_to_user(argp, &init, sizeof(init))) 1397 return -EFAULT; 1398 1399 return 0; 1400 } 1401 case KVM_ARM_MTE_COPY_TAGS: { 1402 struct kvm_arm_copy_mte_tags copy_tags; 1403 1404 if (copy_from_user(©_tags, argp, sizeof(copy_tags))) 1405 return -EFAULT; 1406 return kvm_vm_ioctl_mte_copy_tags(kvm, ©_tags); 1407 } 1408 default: 1409 return -EINVAL; 1410 } 1411 } 1412 1413 static unsigned long nvhe_percpu_size(void) 1414 { 1415 return (unsigned long)CHOOSE_NVHE_SYM(__per_cpu_end) - 1416 (unsigned long)CHOOSE_NVHE_SYM(__per_cpu_start); 1417 } 1418 1419 static unsigned long nvhe_percpu_order(void) 1420 { 1421 unsigned long size = nvhe_percpu_size(); 1422 1423 return size ? get_order(size) : 0; 1424 } 1425 1426 /* A lookup table holding the hypervisor VA for each vector slot */ 1427 static void *hyp_spectre_vector_selector[BP_HARDEN_EL2_SLOTS]; 1428 1429 static void kvm_init_vector_slot(void *base, enum arm64_hyp_spectre_vector slot) 1430 { 1431 hyp_spectre_vector_selector[slot] = __kvm_vector_slot2addr(base, slot); 1432 } 1433 1434 static int kvm_init_vector_slots(void) 1435 { 1436 int err; 1437 void *base; 1438 1439 base = kern_hyp_va(kvm_ksym_ref(__kvm_hyp_vector)); 1440 kvm_init_vector_slot(base, HYP_VECTOR_DIRECT); 1441 1442 base = kern_hyp_va(kvm_ksym_ref(__bp_harden_hyp_vecs)); 1443 kvm_init_vector_slot(base, HYP_VECTOR_SPECTRE_DIRECT); 1444 1445 if (!cpus_have_const_cap(ARM64_SPECTRE_V3A)) 1446 return 0; 1447 1448 if (!has_vhe()) { 1449 err = create_hyp_exec_mappings(__pa_symbol(__bp_harden_hyp_vecs), 1450 __BP_HARDEN_HYP_VECS_SZ, &base); 1451 if (err) 1452 return err; 1453 } 1454 1455 kvm_init_vector_slot(base, HYP_VECTOR_INDIRECT); 1456 kvm_init_vector_slot(base, HYP_VECTOR_SPECTRE_INDIRECT); 1457 return 0; 1458 } 1459 1460 static void cpu_prepare_hyp_mode(int cpu) 1461 { 1462 struct kvm_nvhe_init_params *params = per_cpu_ptr_nvhe_sym(kvm_init_params, cpu); 1463 unsigned long tcr; 1464 1465 /* 1466 * Calculate the raw per-cpu offset without a translation from the 1467 * kernel's mapping to the linear mapping, and store it in tpidr_el2 1468 * so that we can use adr_l to access per-cpu variables in EL2. 1469 * Also drop the KASAN tag which gets in the way... 1470 */ 1471 params->tpidr_el2 = (unsigned long)kasan_reset_tag(per_cpu_ptr_nvhe_sym(__per_cpu_start, cpu)) - 1472 (unsigned long)kvm_ksym_ref(CHOOSE_NVHE_SYM(__per_cpu_start)); 1473 1474 params->mair_el2 = read_sysreg(mair_el1); 1475 1476 /* 1477 * The ID map may be configured to use an extended virtual address 1478 * range. This is only the case if system RAM is out of range for the 1479 * currently configured page size and VA_BITS, in which case we will 1480 * also need the extended virtual range for the HYP ID map, or we won't 1481 * be able to enable the EL2 MMU. 1482 * 1483 * However, at EL2, there is only one TTBR register, and we can't switch 1484 * between translation tables *and* update TCR_EL2.T0SZ at the same 1485 * time. Bottom line: we need to use the extended range with *both* our 1486 * translation tables. 1487 * 1488 * So use the same T0SZ value we use for the ID map. 1489 */ 1490 tcr = (read_sysreg(tcr_el1) & TCR_EL2_MASK) | TCR_EL2_RES1; 1491 tcr &= ~TCR_T0SZ_MASK; 1492 tcr |= (idmap_t0sz & GENMASK(TCR_TxSZ_WIDTH - 1, 0)) << TCR_T0SZ_OFFSET; 1493 params->tcr_el2 = tcr; 1494 1495 params->stack_hyp_va = kern_hyp_va(per_cpu(kvm_arm_hyp_stack_page, cpu) + PAGE_SIZE); 1496 params->pgd_pa = kvm_mmu_get_httbr(); 1497 if (is_protected_kvm_enabled()) 1498 params->hcr_el2 = HCR_HOST_NVHE_PROTECTED_FLAGS; 1499 else 1500 params->hcr_el2 = HCR_HOST_NVHE_FLAGS; 1501 params->vttbr = params->vtcr = 0; 1502 1503 /* 1504 * Flush the init params from the data cache because the struct will 1505 * be read while the MMU is off. 1506 */ 1507 kvm_flush_dcache_to_poc(params, sizeof(*params)); 1508 } 1509 1510 static void hyp_install_host_vector(void) 1511 { 1512 struct kvm_nvhe_init_params *params; 1513 struct arm_smccc_res res; 1514 1515 /* Switch from the HYP stub to our own HYP init vector */ 1516 __hyp_set_vectors(kvm_get_idmap_vector()); 1517 1518 /* 1519 * Call initialization code, and switch to the full blown HYP code. 1520 * If the cpucaps haven't been finalized yet, something has gone very 1521 * wrong, and hyp will crash and burn when it uses any 1522 * cpus_have_const_cap() wrapper. 1523 */ 1524 BUG_ON(!system_capabilities_finalized()); 1525 params = this_cpu_ptr_nvhe_sym(kvm_init_params); 1526 arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(__kvm_hyp_init), virt_to_phys(params), &res); 1527 WARN_ON(res.a0 != SMCCC_RET_SUCCESS); 1528 } 1529 1530 static void cpu_init_hyp_mode(void) 1531 { 1532 hyp_install_host_vector(); 1533 1534 /* 1535 * Disabling SSBD on a non-VHE system requires us to enable SSBS 1536 * at EL2. 1537 */ 1538 if (this_cpu_has_cap(ARM64_SSBS) && 1539 arm64_get_spectre_v4_state() == SPECTRE_VULNERABLE) { 1540 kvm_call_hyp_nvhe(__kvm_enable_ssbs); 1541 } 1542 } 1543 1544 static void cpu_hyp_reset(void) 1545 { 1546 if (!is_kernel_in_hyp_mode()) 1547 __hyp_reset_vectors(); 1548 } 1549 1550 /* 1551 * EL2 vectors can be mapped and rerouted in a number of ways, 1552 * depending on the kernel configuration and CPU present: 1553 * 1554 * - If the CPU is affected by Spectre-v2, the hardening sequence is 1555 * placed in one of the vector slots, which is executed before jumping 1556 * to the real vectors. 1557 * 1558 * - If the CPU also has the ARM64_SPECTRE_V3A cap, the slot 1559 * containing the hardening sequence is mapped next to the idmap page, 1560 * and executed before jumping to the real vectors. 1561 * 1562 * - If the CPU only has the ARM64_SPECTRE_V3A cap, then an 1563 * empty slot is selected, mapped next to the idmap page, and 1564 * executed before jumping to the real vectors. 1565 * 1566 * Note that ARM64_SPECTRE_V3A is somewhat incompatible with 1567 * VHE, as we don't have hypervisor-specific mappings. If the system 1568 * is VHE and yet selects this capability, it will be ignored. 1569 */ 1570 static void cpu_set_hyp_vector(void) 1571 { 1572 struct bp_hardening_data *data = this_cpu_ptr(&bp_hardening_data); 1573 void *vector = hyp_spectre_vector_selector[data->slot]; 1574 1575 if (!is_protected_kvm_enabled()) 1576 *this_cpu_ptr_hyp_sym(kvm_hyp_vector) = (unsigned long)vector; 1577 else 1578 kvm_call_hyp_nvhe(__pkvm_cpu_set_vector, data->slot); 1579 } 1580 1581 static void cpu_hyp_init_context(void) 1582 { 1583 kvm_init_host_cpu_context(&this_cpu_ptr_hyp_sym(kvm_host_data)->host_ctxt); 1584 1585 if (!is_kernel_in_hyp_mode()) 1586 cpu_init_hyp_mode(); 1587 } 1588 1589 static void cpu_hyp_init_features(void) 1590 { 1591 cpu_set_hyp_vector(); 1592 kvm_arm_init_debug(); 1593 1594 if (is_kernel_in_hyp_mode()) 1595 kvm_timer_init_vhe(); 1596 1597 if (vgic_present) 1598 kvm_vgic_init_cpu_hardware(); 1599 } 1600 1601 static void cpu_hyp_reinit(void) 1602 { 1603 cpu_hyp_reset(); 1604 cpu_hyp_init_context(); 1605 cpu_hyp_init_features(); 1606 } 1607 1608 static void _kvm_arch_hardware_enable(void *discard) 1609 { 1610 if (!__this_cpu_read(kvm_arm_hardware_enabled)) { 1611 cpu_hyp_reinit(); 1612 __this_cpu_write(kvm_arm_hardware_enabled, 1); 1613 } 1614 } 1615 1616 int kvm_arch_hardware_enable(void) 1617 { 1618 _kvm_arch_hardware_enable(NULL); 1619 return 0; 1620 } 1621 1622 static void _kvm_arch_hardware_disable(void *discard) 1623 { 1624 if (__this_cpu_read(kvm_arm_hardware_enabled)) { 1625 cpu_hyp_reset(); 1626 __this_cpu_write(kvm_arm_hardware_enabled, 0); 1627 } 1628 } 1629 1630 void kvm_arch_hardware_disable(void) 1631 { 1632 if (!is_protected_kvm_enabled()) 1633 _kvm_arch_hardware_disable(NULL); 1634 } 1635 1636 #ifdef CONFIG_CPU_PM 1637 static int hyp_init_cpu_pm_notifier(struct notifier_block *self, 1638 unsigned long cmd, 1639 void *v) 1640 { 1641 /* 1642 * kvm_arm_hardware_enabled is left with its old value over 1643 * PM_ENTER->PM_EXIT. It is used to indicate PM_EXIT should 1644 * re-enable hyp. 1645 */ 1646 switch (cmd) { 1647 case CPU_PM_ENTER: 1648 if (__this_cpu_read(kvm_arm_hardware_enabled)) 1649 /* 1650 * don't update kvm_arm_hardware_enabled here 1651 * so that the hardware will be re-enabled 1652 * when we resume. See below. 1653 */ 1654 cpu_hyp_reset(); 1655 1656 return NOTIFY_OK; 1657 case CPU_PM_ENTER_FAILED: 1658 case CPU_PM_EXIT: 1659 if (__this_cpu_read(kvm_arm_hardware_enabled)) 1660 /* The hardware was enabled before suspend. */ 1661 cpu_hyp_reinit(); 1662 1663 return NOTIFY_OK; 1664 1665 default: 1666 return NOTIFY_DONE; 1667 } 1668 } 1669 1670 static struct notifier_block hyp_init_cpu_pm_nb = { 1671 .notifier_call = hyp_init_cpu_pm_notifier, 1672 }; 1673 1674 static void hyp_cpu_pm_init(void) 1675 { 1676 if (!is_protected_kvm_enabled()) 1677 cpu_pm_register_notifier(&hyp_init_cpu_pm_nb); 1678 } 1679 static void hyp_cpu_pm_exit(void) 1680 { 1681 if (!is_protected_kvm_enabled()) 1682 cpu_pm_unregister_notifier(&hyp_init_cpu_pm_nb); 1683 } 1684 #else 1685 static inline void hyp_cpu_pm_init(void) 1686 { 1687 } 1688 static inline void hyp_cpu_pm_exit(void) 1689 { 1690 } 1691 #endif 1692 1693 static void init_cpu_logical_map(void) 1694 { 1695 unsigned int cpu; 1696 1697 /* 1698 * Copy the MPIDR <-> logical CPU ID mapping to hyp. 1699 * Only copy the set of online CPUs whose features have been chacked 1700 * against the finalized system capabilities. The hypervisor will not 1701 * allow any other CPUs from the `possible` set to boot. 1702 */ 1703 for_each_online_cpu(cpu) 1704 hyp_cpu_logical_map[cpu] = cpu_logical_map(cpu); 1705 } 1706 1707 #define init_psci_0_1_impl_state(config, what) \ 1708 config.psci_0_1_ ## what ## _implemented = psci_ops.what 1709 1710 static bool init_psci_relay(void) 1711 { 1712 /* 1713 * If PSCI has not been initialized, protected KVM cannot install 1714 * itself on newly booted CPUs. 1715 */ 1716 if (!psci_ops.get_version) { 1717 kvm_err("Cannot initialize protected mode without PSCI\n"); 1718 return false; 1719 } 1720 1721 kvm_host_psci_config.version = psci_ops.get_version(); 1722 1723 if (kvm_host_psci_config.version == PSCI_VERSION(0, 1)) { 1724 kvm_host_psci_config.function_ids_0_1 = get_psci_0_1_function_ids(); 1725 init_psci_0_1_impl_state(kvm_host_psci_config, cpu_suspend); 1726 init_psci_0_1_impl_state(kvm_host_psci_config, cpu_on); 1727 init_psci_0_1_impl_state(kvm_host_psci_config, cpu_off); 1728 init_psci_0_1_impl_state(kvm_host_psci_config, migrate); 1729 } 1730 return true; 1731 } 1732 1733 static int init_subsystems(void) 1734 { 1735 int err = 0; 1736 1737 /* 1738 * Enable hardware so that subsystem initialisation can access EL2. 1739 */ 1740 on_each_cpu(_kvm_arch_hardware_enable, NULL, 1); 1741 1742 /* 1743 * Register CPU lower-power notifier 1744 */ 1745 hyp_cpu_pm_init(); 1746 1747 /* 1748 * Init HYP view of VGIC 1749 */ 1750 err = kvm_vgic_hyp_init(); 1751 switch (err) { 1752 case 0: 1753 vgic_present = true; 1754 break; 1755 case -ENODEV: 1756 case -ENXIO: 1757 vgic_present = false; 1758 err = 0; 1759 break; 1760 default: 1761 goto out; 1762 } 1763 1764 /* 1765 * Init HYP architected timer support 1766 */ 1767 err = kvm_timer_hyp_init(vgic_present); 1768 if (err) 1769 goto out; 1770 1771 kvm_perf_init(); 1772 kvm_sys_reg_table_init(); 1773 1774 out: 1775 if (err || !is_protected_kvm_enabled()) 1776 on_each_cpu(_kvm_arch_hardware_disable, NULL, 1); 1777 1778 return err; 1779 } 1780 1781 static void teardown_hyp_mode(void) 1782 { 1783 int cpu; 1784 1785 free_hyp_pgds(); 1786 for_each_possible_cpu(cpu) { 1787 free_page(per_cpu(kvm_arm_hyp_stack_page, cpu)); 1788 free_pages(kvm_arm_hyp_percpu_base[cpu], nvhe_percpu_order()); 1789 } 1790 } 1791 1792 static int do_pkvm_init(u32 hyp_va_bits) 1793 { 1794 void *per_cpu_base = kvm_ksym_ref(kvm_arm_hyp_percpu_base); 1795 int ret; 1796 1797 preempt_disable(); 1798 cpu_hyp_init_context(); 1799 ret = kvm_call_hyp_nvhe(__pkvm_init, hyp_mem_base, hyp_mem_size, 1800 num_possible_cpus(), kern_hyp_va(per_cpu_base), 1801 hyp_va_bits); 1802 cpu_hyp_init_features(); 1803 1804 /* 1805 * The stub hypercalls are now disabled, so set our local flag to 1806 * prevent a later re-init attempt in kvm_arch_hardware_enable(). 1807 */ 1808 __this_cpu_write(kvm_arm_hardware_enabled, 1); 1809 preempt_enable(); 1810 1811 return ret; 1812 } 1813 1814 static int kvm_hyp_init_protection(u32 hyp_va_bits) 1815 { 1816 void *addr = phys_to_virt(hyp_mem_base); 1817 int ret; 1818 1819 kvm_nvhe_sym(id_aa64pfr0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1); 1820 kvm_nvhe_sym(id_aa64pfr1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1); 1821 kvm_nvhe_sym(id_aa64isar0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64ISAR0_EL1); 1822 kvm_nvhe_sym(id_aa64isar1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64ISAR1_EL1); 1823 kvm_nvhe_sym(id_aa64mmfr0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); 1824 kvm_nvhe_sym(id_aa64mmfr1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1); 1825 kvm_nvhe_sym(id_aa64mmfr2_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR2_EL1); 1826 1827 ret = create_hyp_mappings(addr, addr + hyp_mem_size, PAGE_HYP); 1828 if (ret) 1829 return ret; 1830 1831 ret = do_pkvm_init(hyp_va_bits); 1832 if (ret) 1833 return ret; 1834 1835 free_hyp_pgds(); 1836 1837 return 0; 1838 } 1839 1840 /** 1841 * Inits Hyp-mode on all online CPUs 1842 */ 1843 static int init_hyp_mode(void) 1844 { 1845 u32 hyp_va_bits; 1846 int cpu; 1847 int err = -ENOMEM; 1848 1849 /* 1850 * The protected Hyp-mode cannot be initialized if the memory pool 1851 * allocation has failed. 1852 */ 1853 if (is_protected_kvm_enabled() && !hyp_mem_base) 1854 goto out_err; 1855 1856 /* 1857 * Allocate Hyp PGD and setup Hyp identity mapping 1858 */ 1859 err = kvm_mmu_init(&hyp_va_bits); 1860 if (err) 1861 goto out_err; 1862 1863 /* 1864 * Allocate stack pages for Hypervisor-mode 1865 */ 1866 for_each_possible_cpu(cpu) { 1867 unsigned long stack_page; 1868 1869 stack_page = __get_free_page(GFP_KERNEL); 1870 if (!stack_page) { 1871 err = -ENOMEM; 1872 goto out_err; 1873 } 1874 1875 per_cpu(kvm_arm_hyp_stack_page, cpu) = stack_page; 1876 } 1877 1878 /* 1879 * Allocate and initialize pages for Hypervisor-mode percpu regions. 1880 */ 1881 for_each_possible_cpu(cpu) { 1882 struct page *page; 1883 void *page_addr; 1884 1885 page = alloc_pages(GFP_KERNEL, nvhe_percpu_order()); 1886 if (!page) { 1887 err = -ENOMEM; 1888 goto out_err; 1889 } 1890 1891 page_addr = page_address(page); 1892 memcpy(page_addr, CHOOSE_NVHE_SYM(__per_cpu_start), nvhe_percpu_size()); 1893 kvm_arm_hyp_percpu_base[cpu] = (unsigned long)page_addr; 1894 } 1895 1896 /* 1897 * Map the Hyp-code called directly from the host 1898 */ 1899 err = create_hyp_mappings(kvm_ksym_ref(__hyp_text_start), 1900 kvm_ksym_ref(__hyp_text_end), PAGE_HYP_EXEC); 1901 if (err) { 1902 kvm_err("Cannot map world-switch code\n"); 1903 goto out_err; 1904 } 1905 1906 err = create_hyp_mappings(kvm_ksym_ref(__hyp_rodata_start), 1907 kvm_ksym_ref(__hyp_rodata_end), PAGE_HYP_RO); 1908 if (err) { 1909 kvm_err("Cannot map .hyp.rodata section\n"); 1910 goto out_err; 1911 } 1912 1913 err = create_hyp_mappings(kvm_ksym_ref(__start_rodata), 1914 kvm_ksym_ref(__end_rodata), PAGE_HYP_RO); 1915 if (err) { 1916 kvm_err("Cannot map rodata section\n"); 1917 goto out_err; 1918 } 1919 1920 /* 1921 * .hyp.bss is guaranteed to be placed at the beginning of the .bss 1922 * section thanks to an assertion in the linker script. Map it RW and 1923 * the rest of .bss RO. 1924 */ 1925 err = create_hyp_mappings(kvm_ksym_ref(__hyp_bss_start), 1926 kvm_ksym_ref(__hyp_bss_end), PAGE_HYP); 1927 if (err) { 1928 kvm_err("Cannot map hyp bss section: %d\n", err); 1929 goto out_err; 1930 } 1931 1932 err = create_hyp_mappings(kvm_ksym_ref(__hyp_bss_end), 1933 kvm_ksym_ref(__bss_stop), PAGE_HYP_RO); 1934 if (err) { 1935 kvm_err("Cannot map bss section\n"); 1936 goto out_err; 1937 } 1938 1939 /* 1940 * Map the Hyp stack pages 1941 */ 1942 for_each_possible_cpu(cpu) { 1943 char *stack_page = (char *)per_cpu(kvm_arm_hyp_stack_page, cpu); 1944 err = create_hyp_mappings(stack_page, stack_page + PAGE_SIZE, 1945 PAGE_HYP); 1946 1947 if (err) { 1948 kvm_err("Cannot map hyp stack\n"); 1949 goto out_err; 1950 } 1951 } 1952 1953 for_each_possible_cpu(cpu) { 1954 char *percpu_begin = (char *)kvm_arm_hyp_percpu_base[cpu]; 1955 char *percpu_end = percpu_begin + nvhe_percpu_size(); 1956 1957 /* Map Hyp percpu pages */ 1958 err = create_hyp_mappings(percpu_begin, percpu_end, PAGE_HYP); 1959 if (err) { 1960 kvm_err("Cannot map hyp percpu region\n"); 1961 goto out_err; 1962 } 1963 1964 /* Prepare the CPU initialization parameters */ 1965 cpu_prepare_hyp_mode(cpu); 1966 } 1967 1968 if (is_protected_kvm_enabled()) { 1969 init_cpu_logical_map(); 1970 1971 if (!init_psci_relay()) { 1972 err = -ENODEV; 1973 goto out_err; 1974 } 1975 } 1976 1977 if (is_protected_kvm_enabled()) { 1978 err = kvm_hyp_init_protection(hyp_va_bits); 1979 if (err) { 1980 kvm_err("Failed to init hyp memory protection\n"); 1981 goto out_err; 1982 } 1983 } 1984 1985 return 0; 1986 1987 out_err: 1988 teardown_hyp_mode(); 1989 kvm_err("error initializing Hyp mode: %d\n", err); 1990 return err; 1991 } 1992 1993 static void _kvm_host_prot_finalize(void *arg) 1994 { 1995 int *err = arg; 1996 1997 if (WARN_ON(kvm_call_hyp_nvhe(__pkvm_prot_finalize))) 1998 WRITE_ONCE(*err, -EINVAL); 1999 } 2000 2001 static int pkvm_drop_host_privileges(void) 2002 { 2003 int ret = 0; 2004 2005 /* 2006 * Flip the static key upfront as that may no longer be possible 2007 * once the host stage 2 is installed. 2008 */ 2009 static_branch_enable(&kvm_protected_mode_initialized); 2010 on_each_cpu(_kvm_host_prot_finalize, &ret, 1); 2011 return ret; 2012 } 2013 2014 static int finalize_hyp_mode(void) 2015 { 2016 if (!is_protected_kvm_enabled()) 2017 return 0; 2018 2019 /* 2020 * Exclude HYP BSS from kmemleak so that it doesn't get peeked 2021 * at, which would end badly once the section is inaccessible. 2022 * None of other sections should ever be introspected. 2023 */ 2024 kmemleak_free_part(__hyp_bss_start, __hyp_bss_end - __hyp_bss_start); 2025 return pkvm_drop_host_privileges(); 2026 } 2027 2028 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr) 2029 { 2030 struct kvm_vcpu *vcpu; 2031 int i; 2032 2033 mpidr &= MPIDR_HWID_BITMASK; 2034 kvm_for_each_vcpu(i, vcpu, kvm) { 2035 if (mpidr == kvm_vcpu_get_mpidr_aff(vcpu)) 2036 return vcpu; 2037 } 2038 return NULL; 2039 } 2040 2041 bool kvm_arch_has_irq_bypass(void) 2042 { 2043 return true; 2044 } 2045 2046 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons, 2047 struct irq_bypass_producer *prod) 2048 { 2049 struct kvm_kernel_irqfd *irqfd = 2050 container_of(cons, struct kvm_kernel_irqfd, consumer); 2051 2052 return kvm_vgic_v4_set_forwarding(irqfd->kvm, prod->irq, 2053 &irqfd->irq_entry); 2054 } 2055 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons, 2056 struct irq_bypass_producer *prod) 2057 { 2058 struct kvm_kernel_irqfd *irqfd = 2059 container_of(cons, struct kvm_kernel_irqfd, consumer); 2060 2061 kvm_vgic_v4_unset_forwarding(irqfd->kvm, prod->irq, 2062 &irqfd->irq_entry); 2063 } 2064 2065 void kvm_arch_irq_bypass_stop(struct irq_bypass_consumer *cons) 2066 { 2067 struct kvm_kernel_irqfd *irqfd = 2068 container_of(cons, struct kvm_kernel_irqfd, consumer); 2069 2070 kvm_arm_halt_guest(irqfd->kvm); 2071 } 2072 2073 void kvm_arch_irq_bypass_start(struct irq_bypass_consumer *cons) 2074 { 2075 struct kvm_kernel_irqfd *irqfd = 2076 container_of(cons, struct kvm_kernel_irqfd, consumer); 2077 2078 kvm_arm_resume_guest(irqfd->kvm); 2079 } 2080 2081 /** 2082 * Initialize Hyp-mode and memory mappings on all CPUs. 2083 */ 2084 int kvm_arch_init(void *opaque) 2085 { 2086 int err; 2087 bool in_hyp_mode; 2088 2089 if (!is_hyp_mode_available()) { 2090 kvm_info("HYP mode not available\n"); 2091 return -ENODEV; 2092 } 2093 2094 if (kvm_get_mode() == KVM_MODE_NONE) { 2095 kvm_info("KVM disabled from command line\n"); 2096 return -ENODEV; 2097 } 2098 2099 in_hyp_mode = is_kernel_in_hyp_mode(); 2100 2101 if (cpus_have_final_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) || 2102 cpus_have_final_cap(ARM64_WORKAROUND_1508412)) 2103 kvm_info("Guests without required CPU erratum workarounds can deadlock system!\n" \ 2104 "Only trusted guests should be used on this system.\n"); 2105 2106 err = kvm_set_ipa_limit(); 2107 if (err) 2108 return err; 2109 2110 err = kvm_arm_init_sve(); 2111 if (err) 2112 return err; 2113 2114 if (!in_hyp_mode) { 2115 err = init_hyp_mode(); 2116 if (err) 2117 goto out_err; 2118 } 2119 2120 err = kvm_init_vector_slots(); 2121 if (err) { 2122 kvm_err("Cannot initialise vector slots\n"); 2123 goto out_err; 2124 } 2125 2126 err = init_subsystems(); 2127 if (err) 2128 goto out_hyp; 2129 2130 if (!in_hyp_mode) { 2131 err = finalize_hyp_mode(); 2132 if (err) { 2133 kvm_err("Failed to finalize Hyp protection\n"); 2134 goto out_hyp; 2135 } 2136 } 2137 2138 if (is_protected_kvm_enabled()) { 2139 kvm_info("Protected nVHE mode initialized successfully\n"); 2140 } else if (in_hyp_mode) { 2141 kvm_info("VHE mode initialized successfully\n"); 2142 } else { 2143 kvm_info("Hyp mode initialized successfully\n"); 2144 } 2145 2146 return 0; 2147 2148 out_hyp: 2149 hyp_cpu_pm_exit(); 2150 if (!in_hyp_mode) 2151 teardown_hyp_mode(); 2152 out_err: 2153 return err; 2154 } 2155 2156 /* NOP: Compiling as a module not supported */ 2157 void kvm_arch_exit(void) 2158 { 2159 kvm_perf_teardown(); 2160 } 2161 2162 static int __init early_kvm_mode_cfg(char *arg) 2163 { 2164 if (!arg) 2165 return -EINVAL; 2166 2167 if (strcmp(arg, "protected") == 0) { 2168 kvm_mode = KVM_MODE_PROTECTED; 2169 return 0; 2170 } 2171 2172 if (strcmp(arg, "nvhe") == 0 && !WARN_ON(is_kernel_in_hyp_mode())) { 2173 kvm_mode = KVM_MODE_DEFAULT; 2174 return 0; 2175 } 2176 2177 if (strcmp(arg, "none") == 0) { 2178 kvm_mode = KVM_MODE_NONE; 2179 return 0; 2180 } 2181 2182 return -EINVAL; 2183 } 2184 early_param("kvm-arm.mode", early_kvm_mode_cfg); 2185 2186 enum kvm_mode kvm_get_mode(void) 2187 { 2188 return kvm_mode; 2189 } 2190 2191 static int arm_init(void) 2192 { 2193 int rc = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); 2194 return rc; 2195 } 2196 2197 module_init(arm_init); 2198