1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 - Virtual Open Systems and Columbia University 4 * Author: Christoffer Dall <c.dall@virtualopensystems.com> 5 */ 6 7 #include <linux/bug.h> 8 #include <linux/cpu_pm.h> 9 #include <linux/errno.h> 10 #include <linux/err.h> 11 #include <linux/kvm_host.h> 12 #include <linux/list.h> 13 #include <linux/module.h> 14 #include <linux/vmalloc.h> 15 #include <linux/fs.h> 16 #include <linux/mman.h> 17 #include <linux/sched.h> 18 #include <linux/kvm.h> 19 #include <linux/kvm_irqfd.h> 20 #include <linux/irqbypass.h> 21 #include <linux/sched/stat.h> 22 #include <linux/psci.h> 23 #include <trace/events/kvm.h> 24 25 #define CREATE_TRACE_POINTS 26 #include "trace_arm.h" 27 28 #include <linux/uaccess.h> 29 #include <asm/ptrace.h> 30 #include <asm/mman.h> 31 #include <asm/tlbflush.h> 32 #include <asm/cacheflush.h> 33 #include <asm/cpufeature.h> 34 #include <asm/virt.h> 35 #include <asm/kvm_arm.h> 36 #include <asm/kvm_asm.h> 37 #include <asm/kvm_mmu.h> 38 #include <asm/kvm_emulate.h> 39 #include <asm/sections.h> 40 41 #include <kvm/arm_hypercalls.h> 42 #include <kvm/arm_pmu.h> 43 #include <kvm/arm_psci.h> 44 45 #ifdef REQUIRES_VIRT 46 __asm__(".arch_extension virt"); 47 #endif 48 49 static enum kvm_mode kvm_mode = KVM_MODE_DEFAULT; 50 DEFINE_STATIC_KEY_FALSE(kvm_protected_mode_initialized); 51 52 DECLARE_KVM_HYP_PER_CPU(unsigned long, kvm_hyp_vector); 53 54 static DEFINE_PER_CPU(unsigned long, kvm_arm_hyp_stack_page); 55 unsigned long kvm_arm_hyp_percpu_base[NR_CPUS]; 56 DECLARE_KVM_NVHE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params); 57 58 /* The VMID used in the VTTBR */ 59 static atomic64_t kvm_vmid_gen = ATOMIC64_INIT(1); 60 static u32 kvm_next_vmid; 61 static DEFINE_SPINLOCK(kvm_vmid_lock); 62 63 static bool vgic_present; 64 65 static DEFINE_PER_CPU(unsigned char, kvm_arm_hardware_enabled); 66 DEFINE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 67 68 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu) 69 { 70 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE; 71 } 72 73 int kvm_arch_hardware_setup(void *opaque) 74 { 75 return 0; 76 } 77 78 int kvm_arch_check_processor_compat(void *opaque) 79 { 80 return 0; 81 } 82 83 int kvm_vm_ioctl_enable_cap(struct kvm *kvm, 84 struct kvm_enable_cap *cap) 85 { 86 int r; 87 88 if (cap->flags) 89 return -EINVAL; 90 91 switch (cap->cap) { 92 case KVM_CAP_ARM_NISV_TO_USER: 93 r = 0; 94 kvm->arch.return_nisv_io_abort_to_user = true; 95 break; 96 default: 97 r = -EINVAL; 98 break; 99 } 100 101 return r; 102 } 103 104 static int kvm_arm_default_max_vcpus(void) 105 { 106 return vgic_present ? kvm_vgic_get_max_vcpus() : KVM_MAX_VCPUS; 107 } 108 109 static void set_default_spectre(struct kvm *kvm) 110 { 111 /* 112 * The default is to expose CSV2 == 1 if the HW isn't affected. 113 * Although this is a per-CPU feature, we make it global because 114 * asymmetric systems are just a nuisance. 115 * 116 * Userspace can override this as long as it doesn't promise 117 * the impossible. 118 */ 119 if (arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED) 120 kvm->arch.pfr0_csv2 = 1; 121 if (arm64_get_meltdown_state() == SPECTRE_UNAFFECTED) 122 kvm->arch.pfr0_csv3 = 1; 123 } 124 125 /** 126 * kvm_arch_init_vm - initializes a VM data structure 127 * @kvm: pointer to the KVM struct 128 */ 129 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) 130 { 131 int ret; 132 133 ret = kvm_arm_setup_stage2(kvm, type); 134 if (ret) 135 return ret; 136 137 ret = kvm_init_stage2_mmu(kvm, &kvm->arch.mmu); 138 if (ret) 139 return ret; 140 141 ret = create_hyp_mappings(kvm, kvm + 1, PAGE_HYP); 142 if (ret) 143 goto out_free_stage2_pgd; 144 145 kvm_vgic_early_init(kvm); 146 147 /* The maximum number of VCPUs is limited by the host's GIC model */ 148 kvm->arch.max_vcpus = kvm_arm_default_max_vcpus(); 149 150 set_default_spectre(kvm); 151 152 return ret; 153 out_free_stage2_pgd: 154 kvm_free_stage2_pgd(&kvm->arch.mmu); 155 return ret; 156 } 157 158 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf) 159 { 160 return VM_FAULT_SIGBUS; 161 } 162 163 164 /** 165 * kvm_arch_destroy_vm - destroy the VM data structure 166 * @kvm: pointer to the KVM struct 167 */ 168 void kvm_arch_destroy_vm(struct kvm *kvm) 169 { 170 int i; 171 172 bitmap_free(kvm->arch.pmu_filter); 173 174 kvm_vgic_destroy(kvm); 175 176 for (i = 0; i < KVM_MAX_VCPUS; ++i) { 177 if (kvm->vcpus[i]) { 178 kvm_vcpu_destroy(kvm->vcpus[i]); 179 kvm->vcpus[i] = NULL; 180 } 181 } 182 atomic_set(&kvm->online_vcpus, 0); 183 } 184 185 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) 186 { 187 int r; 188 switch (ext) { 189 case KVM_CAP_IRQCHIP: 190 r = vgic_present; 191 break; 192 case KVM_CAP_IOEVENTFD: 193 case KVM_CAP_DEVICE_CTRL: 194 case KVM_CAP_USER_MEMORY: 195 case KVM_CAP_SYNC_MMU: 196 case KVM_CAP_DESTROY_MEMORY_REGION_WORKS: 197 case KVM_CAP_ONE_REG: 198 case KVM_CAP_ARM_PSCI: 199 case KVM_CAP_ARM_PSCI_0_2: 200 case KVM_CAP_READONLY_MEM: 201 case KVM_CAP_MP_STATE: 202 case KVM_CAP_IMMEDIATE_EXIT: 203 case KVM_CAP_VCPU_EVENTS: 204 case KVM_CAP_ARM_IRQ_LINE_LAYOUT_2: 205 case KVM_CAP_ARM_NISV_TO_USER: 206 case KVM_CAP_ARM_INJECT_EXT_DABT: 207 case KVM_CAP_SET_GUEST_DEBUG: 208 case KVM_CAP_VCPU_ATTRIBUTES: 209 case KVM_CAP_PTP_KVM: 210 r = 1; 211 break; 212 case KVM_CAP_SET_GUEST_DEBUG2: 213 return KVM_GUESTDBG_VALID_MASK; 214 case KVM_CAP_ARM_SET_DEVICE_ADDR: 215 r = 1; 216 break; 217 case KVM_CAP_NR_VCPUS: 218 r = num_online_cpus(); 219 break; 220 case KVM_CAP_MAX_VCPUS: 221 case KVM_CAP_MAX_VCPU_ID: 222 if (kvm) 223 r = kvm->arch.max_vcpus; 224 else 225 r = kvm_arm_default_max_vcpus(); 226 break; 227 case KVM_CAP_MSI_DEVID: 228 if (!kvm) 229 r = -EINVAL; 230 else 231 r = kvm->arch.vgic.msis_require_devid; 232 break; 233 case KVM_CAP_ARM_USER_IRQ: 234 /* 235 * 1: EL1_VTIMER, EL1_PTIMER, and PMU. 236 * (bump this number if adding more devices) 237 */ 238 r = 1; 239 break; 240 case KVM_CAP_STEAL_TIME: 241 r = kvm_arm_pvtime_supported(); 242 break; 243 case KVM_CAP_ARM_EL1_32BIT: 244 r = cpus_have_const_cap(ARM64_HAS_32BIT_EL1); 245 break; 246 case KVM_CAP_GUEST_DEBUG_HW_BPS: 247 r = get_num_brps(); 248 break; 249 case KVM_CAP_GUEST_DEBUG_HW_WPS: 250 r = get_num_wrps(); 251 break; 252 case KVM_CAP_ARM_PMU_V3: 253 r = kvm_arm_support_pmu_v3(); 254 break; 255 case KVM_CAP_ARM_INJECT_SERROR_ESR: 256 r = cpus_have_const_cap(ARM64_HAS_RAS_EXTN); 257 break; 258 case KVM_CAP_ARM_VM_IPA_SIZE: 259 r = get_kvm_ipa_limit(); 260 break; 261 case KVM_CAP_ARM_SVE: 262 r = system_supports_sve(); 263 break; 264 case KVM_CAP_ARM_PTRAUTH_ADDRESS: 265 case KVM_CAP_ARM_PTRAUTH_GENERIC: 266 r = system_has_full_ptr_auth(); 267 break; 268 default: 269 r = 0; 270 } 271 272 return r; 273 } 274 275 long kvm_arch_dev_ioctl(struct file *filp, 276 unsigned int ioctl, unsigned long arg) 277 { 278 return -EINVAL; 279 } 280 281 struct kvm *kvm_arch_alloc_vm(void) 282 { 283 if (!has_vhe()) 284 return kzalloc(sizeof(struct kvm), GFP_KERNEL); 285 286 return vzalloc(sizeof(struct kvm)); 287 } 288 289 void kvm_arch_free_vm(struct kvm *kvm) 290 { 291 if (!has_vhe()) 292 kfree(kvm); 293 else 294 vfree(kvm); 295 } 296 297 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id) 298 { 299 if (irqchip_in_kernel(kvm) && vgic_initialized(kvm)) 300 return -EBUSY; 301 302 if (id >= kvm->arch.max_vcpus) 303 return -EINVAL; 304 305 return 0; 306 } 307 308 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) 309 { 310 int err; 311 312 /* Force users to call KVM_ARM_VCPU_INIT */ 313 vcpu->arch.target = -1; 314 bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES); 315 316 vcpu->arch.mmu_page_cache.gfp_zero = __GFP_ZERO; 317 318 /* Set up the timer */ 319 kvm_timer_vcpu_init(vcpu); 320 321 kvm_pmu_vcpu_init(vcpu); 322 323 kvm_arm_reset_debug_ptr(vcpu); 324 325 kvm_arm_pvtime_vcpu_init(&vcpu->arch); 326 327 vcpu->arch.hw_mmu = &vcpu->kvm->arch.mmu; 328 329 err = kvm_vgic_vcpu_init(vcpu); 330 if (err) 331 return err; 332 333 return create_hyp_mappings(vcpu, vcpu + 1, PAGE_HYP); 334 } 335 336 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu) 337 { 338 } 339 340 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) 341 { 342 if (vcpu->arch.has_run_once && unlikely(!irqchip_in_kernel(vcpu->kvm))) 343 static_branch_dec(&userspace_irqchip_in_use); 344 345 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_cache); 346 kvm_timer_vcpu_terminate(vcpu); 347 kvm_pmu_vcpu_destroy(vcpu); 348 349 kvm_arm_vcpu_destroy(vcpu); 350 } 351 352 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu) 353 { 354 return kvm_timer_is_pending(vcpu); 355 } 356 357 void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 358 { 359 /* 360 * If we're about to block (most likely because we've just hit a 361 * WFI), we need to sync back the state of the GIC CPU interface 362 * so that we have the latest PMR and group enables. This ensures 363 * that kvm_arch_vcpu_runnable has up-to-date data to decide 364 * whether we have pending interrupts. 365 * 366 * For the same reason, we want to tell GICv4 that we need 367 * doorbells to be signalled, should an interrupt become pending. 368 */ 369 preempt_disable(); 370 kvm_vgic_vmcr_sync(vcpu); 371 vgic_v4_put(vcpu, true); 372 preempt_enable(); 373 } 374 375 void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 376 { 377 preempt_disable(); 378 vgic_v4_load(vcpu); 379 preempt_enable(); 380 } 381 382 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 383 { 384 struct kvm_s2_mmu *mmu; 385 int *last_ran; 386 387 mmu = vcpu->arch.hw_mmu; 388 last_ran = this_cpu_ptr(mmu->last_vcpu_ran); 389 390 /* 391 * We guarantee that both TLBs and I-cache are private to each 392 * vcpu. If detecting that a vcpu from the same VM has 393 * previously run on the same physical CPU, call into the 394 * hypervisor code to nuke the relevant contexts. 395 * 396 * We might get preempted before the vCPU actually runs, but 397 * over-invalidation doesn't affect correctness. 398 */ 399 if (*last_ran != vcpu->vcpu_id) { 400 kvm_call_hyp(__kvm_flush_cpu_context, mmu); 401 *last_ran = vcpu->vcpu_id; 402 } 403 404 vcpu->cpu = cpu; 405 406 kvm_vgic_load(vcpu); 407 kvm_timer_vcpu_load(vcpu); 408 if (has_vhe()) 409 kvm_vcpu_load_sysregs_vhe(vcpu); 410 kvm_arch_vcpu_load_fp(vcpu); 411 kvm_vcpu_pmu_restore_guest(vcpu); 412 if (kvm_arm_is_pvtime_enabled(&vcpu->arch)) 413 kvm_make_request(KVM_REQ_RECORD_STEAL, vcpu); 414 415 if (single_task_running()) 416 vcpu_clear_wfx_traps(vcpu); 417 else 418 vcpu_set_wfx_traps(vcpu); 419 420 if (vcpu_has_ptrauth(vcpu)) 421 vcpu_ptrauth_disable(vcpu); 422 kvm_arch_vcpu_load_debug_state_flags(vcpu); 423 } 424 425 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) 426 { 427 kvm_arch_vcpu_put_debug_state_flags(vcpu); 428 kvm_arch_vcpu_put_fp(vcpu); 429 if (has_vhe()) 430 kvm_vcpu_put_sysregs_vhe(vcpu); 431 kvm_timer_vcpu_put(vcpu); 432 kvm_vgic_put(vcpu); 433 kvm_vcpu_pmu_restore_host(vcpu); 434 435 vcpu->cpu = -1; 436 } 437 438 static void vcpu_power_off(struct kvm_vcpu *vcpu) 439 { 440 vcpu->arch.power_off = true; 441 kvm_make_request(KVM_REQ_SLEEP, vcpu); 442 kvm_vcpu_kick(vcpu); 443 } 444 445 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, 446 struct kvm_mp_state *mp_state) 447 { 448 if (vcpu->arch.power_off) 449 mp_state->mp_state = KVM_MP_STATE_STOPPED; 450 else 451 mp_state->mp_state = KVM_MP_STATE_RUNNABLE; 452 453 return 0; 454 } 455 456 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu, 457 struct kvm_mp_state *mp_state) 458 { 459 int ret = 0; 460 461 switch (mp_state->mp_state) { 462 case KVM_MP_STATE_RUNNABLE: 463 vcpu->arch.power_off = false; 464 break; 465 case KVM_MP_STATE_STOPPED: 466 vcpu_power_off(vcpu); 467 break; 468 default: 469 ret = -EINVAL; 470 } 471 472 return ret; 473 } 474 475 /** 476 * kvm_arch_vcpu_runnable - determine if the vcpu can be scheduled 477 * @v: The VCPU pointer 478 * 479 * If the guest CPU is not waiting for interrupts or an interrupt line is 480 * asserted, the CPU is by definition runnable. 481 */ 482 int kvm_arch_vcpu_runnable(struct kvm_vcpu *v) 483 { 484 bool irq_lines = *vcpu_hcr(v) & (HCR_VI | HCR_VF); 485 return ((irq_lines || kvm_vgic_vcpu_pending_irq(v)) 486 && !v->arch.power_off && !v->arch.pause); 487 } 488 489 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu) 490 { 491 return vcpu_mode_priv(vcpu); 492 } 493 494 /* Just ensure a guest exit from a particular CPU */ 495 static void exit_vm_noop(void *info) 496 { 497 } 498 499 void force_vm_exit(const cpumask_t *mask) 500 { 501 preempt_disable(); 502 smp_call_function_many(mask, exit_vm_noop, NULL, true); 503 preempt_enable(); 504 } 505 506 /** 507 * need_new_vmid_gen - check that the VMID is still valid 508 * @vmid: The VMID to check 509 * 510 * return true if there is a new generation of VMIDs being used 511 * 512 * The hardware supports a limited set of values with the value zero reserved 513 * for the host, so we check if an assigned value belongs to a previous 514 * generation, which requires us to assign a new value. If we're the first to 515 * use a VMID for the new generation, we must flush necessary caches and TLBs 516 * on all CPUs. 517 */ 518 static bool need_new_vmid_gen(struct kvm_vmid *vmid) 519 { 520 u64 current_vmid_gen = atomic64_read(&kvm_vmid_gen); 521 smp_rmb(); /* Orders read of kvm_vmid_gen and kvm->arch.vmid */ 522 return unlikely(READ_ONCE(vmid->vmid_gen) != current_vmid_gen); 523 } 524 525 /** 526 * update_vmid - Update the vmid with a valid VMID for the current generation 527 * @vmid: The stage-2 VMID information struct 528 */ 529 static void update_vmid(struct kvm_vmid *vmid) 530 { 531 if (!need_new_vmid_gen(vmid)) 532 return; 533 534 spin_lock(&kvm_vmid_lock); 535 536 /* 537 * We need to re-check the vmid_gen here to ensure that if another vcpu 538 * already allocated a valid vmid for this vm, then this vcpu should 539 * use the same vmid. 540 */ 541 if (!need_new_vmid_gen(vmid)) { 542 spin_unlock(&kvm_vmid_lock); 543 return; 544 } 545 546 /* First user of a new VMID generation? */ 547 if (unlikely(kvm_next_vmid == 0)) { 548 atomic64_inc(&kvm_vmid_gen); 549 kvm_next_vmid = 1; 550 551 /* 552 * On SMP we know no other CPUs can use this CPU's or each 553 * other's VMID after force_vm_exit returns since the 554 * kvm_vmid_lock blocks them from reentry to the guest. 555 */ 556 force_vm_exit(cpu_all_mask); 557 /* 558 * Now broadcast TLB + ICACHE invalidation over the inner 559 * shareable domain to make sure all data structures are 560 * clean. 561 */ 562 kvm_call_hyp(__kvm_flush_vm_context); 563 } 564 565 vmid->vmid = kvm_next_vmid; 566 kvm_next_vmid++; 567 kvm_next_vmid &= (1 << kvm_get_vmid_bits()) - 1; 568 569 smp_wmb(); 570 WRITE_ONCE(vmid->vmid_gen, atomic64_read(&kvm_vmid_gen)); 571 572 spin_unlock(&kvm_vmid_lock); 573 } 574 575 static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu) 576 { 577 struct kvm *kvm = vcpu->kvm; 578 int ret = 0; 579 580 if (likely(vcpu->arch.has_run_once)) 581 return 0; 582 583 if (!kvm_arm_vcpu_is_finalized(vcpu)) 584 return -EPERM; 585 586 vcpu->arch.has_run_once = true; 587 588 kvm_arm_vcpu_init_debug(vcpu); 589 590 if (likely(irqchip_in_kernel(kvm))) { 591 /* 592 * Map the VGIC hardware resources before running a vcpu the 593 * first time on this VM. 594 */ 595 ret = kvm_vgic_map_resources(kvm); 596 if (ret) 597 return ret; 598 } else { 599 /* 600 * Tell the rest of the code that there are userspace irqchip 601 * VMs in the wild. 602 */ 603 static_branch_inc(&userspace_irqchip_in_use); 604 } 605 606 ret = kvm_timer_enable(vcpu); 607 if (ret) 608 return ret; 609 610 ret = kvm_arm_pmu_v3_enable(vcpu); 611 612 return ret; 613 } 614 615 bool kvm_arch_intc_initialized(struct kvm *kvm) 616 { 617 return vgic_initialized(kvm); 618 } 619 620 void kvm_arm_halt_guest(struct kvm *kvm) 621 { 622 int i; 623 struct kvm_vcpu *vcpu; 624 625 kvm_for_each_vcpu(i, vcpu, kvm) 626 vcpu->arch.pause = true; 627 kvm_make_all_cpus_request(kvm, KVM_REQ_SLEEP); 628 } 629 630 void kvm_arm_resume_guest(struct kvm *kvm) 631 { 632 int i; 633 struct kvm_vcpu *vcpu; 634 635 kvm_for_each_vcpu(i, vcpu, kvm) { 636 vcpu->arch.pause = false; 637 rcuwait_wake_up(kvm_arch_vcpu_get_wait(vcpu)); 638 } 639 } 640 641 static void vcpu_req_sleep(struct kvm_vcpu *vcpu) 642 { 643 struct rcuwait *wait = kvm_arch_vcpu_get_wait(vcpu); 644 645 rcuwait_wait_event(wait, 646 (!vcpu->arch.power_off) &&(!vcpu->arch.pause), 647 TASK_INTERRUPTIBLE); 648 649 if (vcpu->arch.power_off || vcpu->arch.pause) { 650 /* Awaken to handle a signal, request we sleep again later. */ 651 kvm_make_request(KVM_REQ_SLEEP, vcpu); 652 } 653 654 /* 655 * Make sure we will observe a potential reset request if we've 656 * observed a change to the power state. Pairs with the smp_wmb() in 657 * kvm_psci_vcpu_on(). 658 */ 659 smp_rmb(); 660 } 661 662 static int kvm_vcpu_initialized(struct kvm_vcpu *vcpu) 663 { 664 return vcpu->arch.target >= 0; 665 } 666 667 static void check_vcpu_requests(struct kvm_vcpu *vcpu) 668 { 669 if (kvm_request_pending(vcpu)) { 670 if (kvm_check_request(KVM_REQ_SLEEP, vcpu)) 671 vcpu_req_sleep(vcpu); 672 673 if (kvm_check_request(KVM_REQ_VCPU_RESET, vcpu)) 674 kvm_reset_vcpu(vcpu); 675 676 /* 677 * Clear IRQ_PENDING requests that were made to guarantee 678 * that a VCPU sees new virtual interrupts. 679 */ 680 kvm_check_request(KVM_REQ_IRQ_PENDING, vcpu); 681 682 if (kvm_check_request(KVM_REQ_RECORD_STEAL, vcpu)) 683 kvm_update_stolen_time(vcpu); 684 685 if (kvm_check_request(KVM_REQ_RELOAD_GICv4, vcpu)) { 686 /* The distributor enable bits were changed */ 687 preempt_disable(); 688 vgic_v4_put(vcpu, false); 689 vgic_v4_load(vcpu); 690 preempt_enable(); 691 } 692 } 693 } 694 695 /** 696 * kvm_arch_vcpu_ioctl_run - the main VCPU run function to execute guest code 697 * @vcpu: The VCPU pointer 698 * 699 * This function is called through the VCPU_RUN ioctl called from user space. It 700 * will execute VM code in a loop until the time slice for the process is used 701 * or some emulation is needed from user space in which case the function will 702 * return with return value 0 and with the kvm_run structure filled in with the 703 * required data for the requested emulation. 704 */ 705 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) 706 { 707 struct kvm_run *run = vcpu->run; 708 int ret; 709 710 if (unlikely(!kvm_vcpu_initialized(vcpu))) 711 return -ENOEXEC; 712 713 ret = kvm_vcpu_first_run_init(vcpu); 714 if (ret) 715 return ret; 716 717 if (run->exit_reason == KVM_EXIT_MMIO) { 718 ret = kvm_handle_mmio_return(vcpu); 719 if (ret) 720 return ret; 721 } 722 723 vcpu_load(vcpu); 724 725 if (run->immediate_exit) { 726 ret = -EINTR; 727 goto out; 728 } 729 730 kvm_sigset_activate(vcpu); 731 732 ret = 1; 733 run->exit_reason = KVM_EXIT_UNKNOWN; 734 while (ret > 0) { 735 /* 736 * Check conditions before entering the guest 737 */ 738 cond_resched(); 739 740 update_vmid(&vcpu->arch.hw_mmu->vmid); 741 742 check_vcpu_requests(vcpu); 743 744 /* 745 * Preparing the interrupts to be injected also 746 * involves poking the GIC, which must be done in a 747 * non-preemptible context. 748 */ 749 preempt_disable(); 750 751 kvm_pmu_flush_hwstate(vcpu); 752 753 local_irq_disable(); 754 755 kvm_vgic_flush_hwstate(vcpu); 756 757 /* 758 * Exit if we have a signal pending so that we can deliver the 759 * signal to user space. 760 */ 761 if (signal_pending(current)) { 762 ret = -EINTR; 763 run->exit_reason = KVM_EXIT_INTR; 764 } 765 766 /* 767 * If we're using a userspace irqchip, then check if we need 768 * to tell a userspace irqchip about timer or PMU level 769 * changes and if so, exit to userspace (the actual level 770 * state gets updated in kvm_timer_update_run and 771 * kvm_pmu_update_run below). 772 */ 773 if (static_branch_unlikely(&userspace_irqchip_in_use)) { 774 if (kvm_timer_should_notify_user(vcpu) || 775 kvm_pmu_should_notify_user(vcpu)) { 776 ret = -EINTR; 777 run->exit_reason = KVM_EXIT_INTR; 778 } 779 } 780 781 /* 782 * Ensure we set mode to IN_GUEST_MODE after we disable 783 * interrupts and before the final VCPU requests check. 784 * See the comment in kvm_vcpu_exiting_guest_mode() and 785 * Documentation/virt/kvm/vcpu-requests.rst 786 */ 787 smp_store_mb(vcpu->mode, IN_GUEST_MODE); 788 789 if (ret <= 0 || need_new_vmid_gen(&vcpu->arch.hw_mmu->vmid) || 790 kvm_request_pending(vcpu)) { 791 vcpu->mode = OUTSIDE_GUEST_MODE; 792 isb(); /* Ensure work in x_flush_hwstate is committed */ 793 kvm_pmu_sync_hwstate(vcpu); 794 if (static_branch_unlikely(&userspace_irqchip_in_use)) 795 kvm_timer_sync_user(vcpu); 796 kvm_vgic_sync_hwstate(vcpu); 797 local_irq_enable(); 798 preempt_enable(); 799 continue; 800 } 801 802 kvm_arm_setup_debug(vcpu); 803 804 /************************************************************** 805 * Enter the guest 806 */ 807 trace_kvm_entry(*vcpu_pc(vcpu)); 808 guest_enter_irqoff(); 809 810 ret = kvm_call_hyp_ret(__kvm_vcpu_run, vcpu); 811 812 vcpu->mode = OUTSIDE_GUEST_MODE; 813 vcpu->stat.exits++; 814 /* 815 * Back from guest 816 *************************************************************/ 817 818 kvm_arm_clear_debug(vcpu); 819 820 /* 821 * We must sync the PMU state before the vgic state so 822 * that the vgic can properly sample the updated state of the 823 * interrupt line. 824 */ 825 kvm_pmu_sync_hwstate(vcpu); 826 827 /* 828 * Sync the vgic state before syncing the timer state because 829 * the timer code needs to know if the virtual timer 830 * interrupts are active. 831 */ 832 kvm_vgic_sync_hwstate(vcpu); 833 834 /* 835 * Sync the timer hardware state before enabling interrupts as 836 * we don't want vtimer interrupts to race with syncing the 837 * timer virtual interrupt state. 838 */ 839 if (static_branch_unlikely(&userspace_irqchip_in_use)) 840 kvm_timer_sync_user(vcpu); 841 842 kvm_arch_vcpu_ctxsync_fp(vcpu); 843 844 /* 845 * We may have taken a host interrupt in HYP mode (ie 846 * while executing the guest). This interrupt is still 847 * pending, as we haven't serviced it yet! 848 * 849 * We're now back in SVC mode, with interrupts 850 * disabled. Enabling the interrupts now will have 851 * the effect of taking the interrupt again, in SVC 852 * mode this time. 853 */ 854 local_irq_enable(); 855 856 /* 857 * We do local_irq_enable() before calling guest_exit() so 858 * that if a timer interrupt hits while running the guest we 859 * account that tick as being spent in the guest. We enable 860 * preemption after calling guest_exit() so that if we get 861 * preempted we make sure ticks after that is not counted as 862 * guest time. 863 */ 864 guest_exit(); 865 trace_kvm_exit(ret, kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu)); 866 867 /* Exit types that need handling before we can be preempted */ 868 handle_exit_early(vcpu, ret); 869 870 preempt_enable(); 871 872 /* 873 * The ARMv8 architecture doesn't give the hypervisor 874 * a mechanism to prevent a guest from dropping to AArch32 EL0 875 * if implemented by the CPU. If we spot the guest in such 876 * state and that we decided it wasn't supposed to do so (like 877 * with the asymmetric AArch32 case), return to userspace with 878 * a fatal error. 879 */ 880 if (!system_supports_32bit_el0() && vcpu_mode_is_32bit(vcpu)) { 881 /* 882 * As we have caught the guest red-handed, decide that 883 * it isn't fit for purpose anymore by making the vcpu 884 * invalid. The VMM can try and fix it by issuing a 885 * KVM_ARM_VCPU_INIT if it really wants to. 886 */ 887 vcpu->arch.target = -1; 888 ret = ARM_EXCEPTION_IL; 889 } 890 891 ret = handle_exit(vcpu, ret); 892 } 893 894 /* Tell userspace about in-kernel device output levels */ 895 if (unlikely(!irqchip_in_kernel(vcpu->kvm))) { 896 kvm_timer_update_run(vcpu); 897 kvm_pmu_update_run(vcpu); 898 } 899 900 kvm_sigset_deactivate(vcpu); 901 902 out: 903 /* 904 * In the unlikely event that we are returning to userspace 905 * with pending exceptions or PC adjustment, commit these 906 * adjustments in order to give userspace a consistent view of 907 * the vcpu state. Note that this relies on __kvm_adjust_pc() 908 * being preempt-safe on VHE. 909 */ 910 if (unlikely(vcpu->arch.flags & (KVM_ARM64_PENDING_EXCEPTION | 911 KVM_ARM64_INCREMENT_PC))) 912 kvm_call_hyp(__kvm_adjust_pc, vcpu); 913 914 vcpu_put(vcpu); 915 return ret; 916 } 917 918 static int vcpu_interrupt_line(struct kvm_vcpu *vcpu, int number, bool level) 919 { 920 int bit_index; 921 bool set; 922 unsigned long *hcr; 923 924 if (number == KVM_ARM_IRQ_CPU_IRQ) 925 bit_index = __ffs(HCR_VI); 926 else /* KVM_ARM_IRQ_CPU_FIQ */ 927 bit_index = __ffs(HCR_VF); 928 929 hcr = vcpu_hcr(vcpu); 930 if (level) 931 set = test_and_set_bit(bit_index, hcr); 932 else 933 set = test_and_clear_bit(bit_index, hcr); 934 935 /* 936 * If we didn't change anything, no need to wake up or kick other CPUs 937 */ 938 if (set == level) 939 return 0; 940 941 /* 942 * The vcpu irq_lines field was updated, wake up sleeping VCPUs and 943 * trigger a world-switch round on the running physical CPU to set the 944 * virtual IRQ/FIQ fields in the HCR appropriately. 945 */ 946 kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); 947 kvm_vcpu_kick(vcpu); 948 949 return 0; 950 } 951 952 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_level, 953 bool line_status) 954 { 955 u32 irq = irq_level->irq; 956 unsigned int irq_type, vcpu_idx, irq_num; 957 int nrcpus = atomic_read(&kvm->online_vcpus); 958 struct kvm_vcpu *vcpu = NULL; 959 bool level = irq_level->level; 960 961 irq_type = (irq >> KVM_ARM_IRQ_TYPE_SHIFT) & KVM_ARM_IRQ_TYPE_MASK; 962 vcpu_idx = (irq >> KVM_ARM_IRQ_VCPU_SHIFT) & KVM_ARM_IRQ_VCPU_MASK; 963 vcpu_idx += ((irq >> KVM_ARM_IRQ_VCPU2_SHIFT) & KVM_ARM_IRQ_VCPU2_MASK) * (KVM_ARM_IRQ_VCPU_MASK + 1); 964 irq_num = (irq >> KVM_ARM_IRQ_NUM_SHIFT) & KVM_ARM_IRQ_NUM_MASK; 965 966 trace_kvm_irq_line(irq_type, vcpu_idx, irq_num, irq_level->level); 967 968 switch (irq_type) { 969 case KVM_ARM_IRQ_TYPE_CPU: 970 if (irqchip_in_kernel(kvm)) 971 return -ENXIO; 972 973 if (vcpu_idx >= nrcpus) 974 return -EINVAL; 975 976 vcpu = kvm_get_vcpu(kvm, vcpu_idx); 977 if (!vcpu) 978 return -EINVAL; 979 980 if (irq_num > KVM_ARM_IRQ_CPU_FIQ) 981 return -EINVAL; 982 983 return vcpu_interrupt_line(vcpu, irq_num, level); 984 case KVM_ARM_IRQ_TYPE_PPI: 985 if (!irqchip_in_kernel(kvm)) 986 return -ENXIO; 987 988 if (vcpu_idx >= nrcpus) 989 return -EINVAL; 990 991 vcpu = kvm_get_vcpu(kvm, vcpu_idx); 992 if (!vcpu) 993 return -EINVAL; 994 995 if (irq_num < VGIC_NR_SGIS || irq_num >= VGIC_NR_PRIVATE_IRQS) 996 return -EINVAL; 997 998 return kvm_vgic_inject_irq(kvm, vcpu->vcpu_id, irq_num, level, NULL); 999 case KVM_ARM_IRQ_TYPE_SPI: 1000 if (!irqchip_in_kernel(kvm)) 1001 return -ENXIO; 1002 1003 if (irq_num < VGIC_NR_PRIVATE_IRQS) 1004 return -EINVAL; 1005 1006 return kvm_vgic_inject_irq(kvm, 0, irq_num, level, NULL); 1007 } 1008 1009 return -EINVAL; 1010 } 1011 1012 static int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, 1013 const struct kvm_vcpu_init *init) 1014 { 1015 unsigned int i, ret; 1016 int phys_target = kvm_target_cpu(); 1017 1018 if (init->target != phys_target) 1019 return -EINVAL; 1020 1021 /* 1022 * Secondary and subsequent calls to KVM_ARM_VCPU_INIT must 1023 * use the same target. 1024 */ 1025 if (vcpu->arch.target != -1 && vcpu->arch.target != init->target) 1026 return -EINVAL; 1027 1028 /* -ENOENT for unknown features, -EINVAL for invalid combinations. */ 1029 for (i = 0; i < sizeof(init->features) * 8; i++) { 1030 bool set = (init->features[i / 32] & (1 << (i % 32))); 1031 1032 if (set && i >= KVM_VCPU_MAX_FEATURES) 1033 return -ENOENT; 1034 1035 /* 1036 * Secondary and subsequent calls to KVM_ARM_VCPU_INIT must 1037 * use the same feature set. 1038 */ 1039 if (vcpu->arch.target != -1 && i < KVM_VCPU_MAX_FEATURES && 1040 test_bit(i, vcpu->arch.features) != set) 1041 return -EINVAL; 1042 1043 if (set) 1044 set_bit(i, vcpu->arch.features); 1045 } 1046 1047 vcpu->arch.target = phys_target; 1048 1049 /* Now we know what it is, we can reset it. */ 1050 ret = kvm_reset_vcpu(vcpu); 1051 if (ret) { 1052 vcpu->arch.target = -1; 1053 bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES); 1054 } 1055 1056 return ret; 1057 } 1058 1059 static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu, 1060 struct kvm_vcpu_init *init) 1061 { 1062 int ret; 1063 1064 ret = kvm_vcpu_set_target(vcpu, init); 1065 if (ret) 1066 return ret; 1067 1068 /* 1069 * Ensure a rebooted VM will fault in RAM pages and detect if the 1070 * guest MMU is turned off and flush the caches as needed. 1071 * 1072 * S2FWB enforces all memory accesses to RAM being cacheable, 1073 * ensuring that the data side is always coherent. We still 1074 * need to invalidate the I-cache though, as FWB does *not* 1075 * imply CTR_EL0.DIC. 1076 */ 1077 if (vcpu->arch.has_run_once) { 1078 if (!cpus_have_final_cap(ARM64_HAS_STAGE2_FWB)) 1079 stage2_unmap_vm(vcpu->kvm); 1080 else 1081 __flush_icache_all(); 1082 } 1083 1084 vcpu_reset_hcr(vcpu); 1085 1086 /* 1087 * Handle the "start in power-off" case. 1088 */ 1089 if (test_bit(KVM_ARM_VCPU_POWER_OFF, vcpu->arch.features)) 1090 vcpu_power_off(vcpu); 1091 else 1092 vcpu->arch.power_off = false; 1093 1094 return 0; 1095 } 1096 1097 static int kvm_arm_vcpu_set_attr(struct kvm_vcpu *vcpu, 1098 struct kvm_device_attr *attr) 1099 { 1100 int ret = -ENXIO; 1101 1102 switch (attr->group) { 1103 default: 1104 ret = kvm_arm_vcpu_arch_set_attr(vcpu, attr); 1105 break; 1106 } 1107 1108 return ret; 1109 } 1110 1111 static int kvm_arm_vcpu_get_attr(struct kvm_vcpu *vcpu, 1112 struct kvm_device_attr *attr) 1113 { 1114 int ret = -ENXIO; 1115 1116 switch (attr->group) { 1117 default: 1118 ret = kvm_arm_vcpu_arch_get_attr(vcpu, attr); 1119 break; 1120 } 1121 1122 return ret; 1123 } 1124 1125 static int kvm_arm_vcpu_has_attr(struct kvm_vcpu *vcpu, 1126 struct kvm_device_attr *attr) 1127 { 1128 int ret = -ENXIO; 1129 1130 switch (attr->group) { 1131 default: 1132 ret = kvm_arm_vcpu_arch_has_attr(vcpu, attr); 1133 break; 1134 } 1135 1136 return ret; 1137 } 1138 1139 static int kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, 1140 struct kvm_vcpu_events *events) 1141 { 1142 memset(events, 0, sizeof(*events)); 1143 1144 return __kvm_arm_vcpu_get_events(vcpu, events); 1145 } 1146 1147 static int kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, 1148 struct kvm_vcpu_events *events) 1149 { 1150 int i; 1151 1152 /* check whether the reserved field is zero */ 1153 for (i = 0; i < ARRAY_SIZE(events->reserved); i++) 1154 if (events->reserved[i]) 1155 return -EINVAL; 1156 1157 /* check whether the pad field is zero */ 1158 for (i = 0; i < ARRAY_SIZE(events->exception.pad); i++) 1159 if (events->exception.pad[i]) 1160 return -EINVAL; 1161 1162 return __kvm_arm_vcpu_set_events(vcpu, events); 1163 } 1164 1165 long kvm_arch_vcpu_ioctl(struct file *filp, 1166 unsigned int ioctl, unsigned long arg) 1167 { 1168 struct kvm_vcpu *vcpu = filp->private_data; 1169 void __user *argp = (void __user *)arg; 1170 struct kvm_device_attr attr; 1171 long r; 1172 1173 switch (ioctl) { 1174 case KVM_ARM_VCPU_INIT: { 1175 struct kvm_vcpu_init init; 1176 1177 r = -EFAULT; 1178 if (copy_from_user(&init, argp, sizeof(init))) 1179 break; 1180 1181 r = kvm_arch_vcpu_ioctl_vcpu_init(vcpu, &init); 1182 break; 1183 } 1184 case KVM_SET_ONE_REG: 1185 case KVM_GET_ONE_REG: { 1186 struct kvm_one_reg reg; 1187 1188 r = -ENOEXEC; 1189 if (unlikely(!kvm_vcpu_initialized(vcpu))) 1190 break; 1191 1192 r = -EFAULT; 1193 if (copy_from_user(®, argp, sizeof(reg))) 1194 break; 1195 1196 if (ioctl == KVM_SET_ONE_REG) 1197 r = kvm_arm_set_reg(vcpu, ®); 1198 else 1199 r = kvm_arm_get_reg(vcpu, ®); 1200 break; 1201 } 1202 case KVM_GET_REG_LIST: { 1203 struct kvm_reg_list __user *user_list = argp; 1204 struct kvm_reg_list reg_list; 1205 unsigned n; 1206 1207 r = -ENOEXEC; 1208 if (unlikely(!kvm_vcpu_initialized(vcpu))) 1209 break; 1210 1211 r = -EPERM; 1212 if (!kvm_arm_vcpu_is_finalized(vcpu)) 1213 break; 1214 1215 r = -EFAULT; 1216 if (copy_from_user(®_list, user_list, sizeof(reg_list))) 1217 break; 1218 n = reg_list.n; 1219 reg_list.n = kvm_arm_num_regs(vcpu); 1220 if (copy_to_user(user_list, ®_list, sizeof(reg_list))) 1221 break; 1222 r = -E2BIG; 1223 if (n < reg_list.n) 1224 break; 1225 r = kvm_arm_copy_reg_indices(vcpu, user_list->reg); 1226 break; 1227 } 1228 case KVM_SET_DEVICE_ATTR: { 1229 r = -EFAULT; 1230 if (copy_from_user(&attr, argp, sizeof(attr))) 1231 break; 1232 r = kvm_arm_vcpu_set_attr(vcpu, &attr); 1233 break; 1234 } 1235 case KVM_GET_DEVICE_ATTR: { 1236 r = -EFAULT; 1237 if (copy_from_user(&attr, argp, sizeof(attr))) 1238 break; 1239 r = kvm_arm_vcpu_get_attr(vcpu, &attr); 1240 break; 1241 } 1242 case KVM_HAS_DEVICE_ATTR: { 1243 r = -EFAULT; 1244 if (copy_from_user(&attr, argp, sizeof(attr))) 1245 break; 1246 r = kvm_arm_vcpu_has_attr(vcpu, &attr); 1247 break; 1248 } 1249 case KVM_GET_VCPU_EVENTS: { 1250 struct kvm_vcpu_events events; 1251 1252 if (kvm_arm_vcpu_get_events(vcpu, &events)) 1253 return -EINVAL; 1254 1255 if (copy_to_user(argp, &events, sizeof(events))) 1256 return -EFAULT; 1257 1258 return 0; 1259 } 1260 case KVM_SET_VCPU_EVENTS: { 1261 struct kvm_vcpu_events events; 1262 1263 if (copy_from_user(&events, argp, sizeof(events))) 1264 return -EFAULT; 1265 1266 return kvm_arm_vcpu_set_events(vcpu, &events); 1267 } 1268 case KVM_ARM_VCPU_FINALIZE: { 1269 int what; 1270 1271 if (!kvm_vcpu_initialized(vcpu)) 1272 return -ENOEXEC; 1273 1274 if (get_user(what, (const int __user *)argp)) 1275 return -EFAULT; 1276 1277 return kvm_arm_vcpu_finalize(vcpu, what); 1278 } 1279 default: 1280 r = -EINVAL; 1281 } 1282 1283 return r; 1284 } 1285 1286 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot) 1287 { 1288 1289 } 1290 1291 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, 1292 const struct kvm_memory_slot *memslot) 1293 { 1294 kvm_flush_remote_tlbs(kvm); 1295 } 1296 1297 static int kvm_vm_ioctl_set_device_addr(struct kvm *kvm, 1298 struct kvm_arm_device_addr *dev_addr) 1299 { 1300 unsigned long dev_id, type; 1301 1302 dev_id = (dev_addr->id & KVM_ARM_DEVICE_ID_MASK) >> 1303 KVM_ARM_DEVICE_ID_SHIFT; 1304 type = (dev_addr->id & KVM_ARM_DEVICE_TYPE_MASK) >> 1305 KVM_ARM_DEVICE_TYPE_SHIFT; 1306 1307 switch (dev_id) { 1308 case KVM_ARM_DEVICE_VGIC_V2: 1309 if (!vgic_present) 1310 return -ENXIO; 1311 return kvm_vgic_addr(kvm, type, &dev_addr->addr, true); 1312 default: 1313 return -ENODEV; 1314 } 1315 } 1316 1317 long kvm_arch_vm_ioctl(struct file *filp, 1318 unsigned int ioctl, unsigned long arg) 1319 { 1320 struct kvm *kvm = filp->private_data; 1321 void __user *argp = (void __user *)arg; 1322 1323 switch (ioctl) { 1324 case KVM_CREATE_IRQCHIP: { 1325 int ret; 1326 if (!vgic_present) 1327 return -ENXIO; 1328 mutex_lock(&kvm->lock); 1329 ret = kvm_vgic_create(kvm, KVM_DEV_TYPE_ARM_VGIC_V2); 1330 mutex_unlock(&kvm->lock); 1331 return ret; 1332 } 1333 case KVM_ARM_SET_DEVICE_ADDR: { 1334 struct kvm_arm_device_addr dev_addr; 1335 1336 if (copy_from_user(&dev_addr, argp, sizeof(dev_addr))) 1337 return -EFAULT; 1338 return kvm_vm_ioctl_set_device_addr(kvm, &dev_addr); 1339 } 1340 case KVM_ARM_PREFERRED_TARGET: { 1341 int err; 1342 struct kvm_vcpu_init init; 1343 1344 err = kvm_vcpu_preferred_target(&init); 1345 if (err) 1346 return err; 1347 1348 if (copy_to_user(argp, &init, sizeof(init))) 1349 return -EFAULT; 1350 1351 return 0; 1352 } 1353 default: 1354 return -EINVAL; 1355 } 1356 } 1357 1358 static unsigned long nvhe_percpu_size(void) 1359 { 1360 return (unsigned long)CHOOSE_NVHE_SYM(__per_cpu_end) - 1361 (unsigned long)CHOOSE_NVHE_SYM(__per_cpu_start); 1362 } 1363 1364 static unsigned long nvhe_percpu_order(void) 1365 { 1366 unsigned long size = nvhe_percpu_size(); 1367 1368 return size ? get_order(size) : 0; 1369 } 1370 1371 /* A lookup table holding the hypervisor VA for each vector slot */ 1372 static void *hyp_spectre_vector_selector[BP_HARDEN_EL2_SLOTS]; 1373 1374 static void kvm_init_vector_slot(void *base, enum arm64_hyp_spectre_vector slot) 1375 { 1376 hyp_spectre_vector_selector[slot] = __kvm_vector_slot2addr(base, slot); 1377 } 1378 1379 static int kvm_init_vector_slots(void) 1380 { 1381 int err; 1382 void *base; 1383 1384 base = kern_hyp_va(kvm_ksym_ref(__kvm_hyp_vector)); 1385 kvm_init_vector_slot(base, HYP_VECTOR_DIRECT); 1386 1387 base = kern_hyp_va(kvm_ksym_ref(__bp_harden_hyp_vecs)); 1388 kvm_init_vector_slot(base, HYP_VECTOR_SPECTRE_DIRECT); 1389 1390 if (!cpus_have_const_cap(ARM64_SPECTRE_V3A)) 1391 return 0; 1392 1393 if (!has_vhe()) { 1394 err = create_hyp_exec_mappings(__pa_symbol(__bp_harden_hyp_vecs), 1395 __BP_HARDEN_HYP_VECS_SZ, &base); 1396 if (err) 1397 return err; 1398 } 1399 1400 kvm_init_vector_slot(base, HYP_VECTOR_INDIRECT); 1401 kvm_init_vector_slot(base, HYP_VECTOR_SPECTRE_INDIRECT); 1402 return 0; 1403 } 1404 1405 static void cpu_prepare_hyp_mode(int cpu) 1406 { 1407 struct kvm_nvhe_init_params *params = per_cpu_ptr_nvhe_sym(kvm_init_params, cpu); 1408 unsigned long tcr; 1409 1410 /* 1411 * Calculate the raw per-cpu offset without a translation from the 1412 * kernel's mapping to the linear mapping, and store it in tpidr_el2 1413 * so that we can use adr_l to access per-cpu variables in EL2. 1414 * Also drop the KASAN tag which gets in the way... 1415 */ 1416 params->tpidr_el2 = (unsigned long)kasan_reset_tag(per_cpu_ptr_nvhe_sym(__per_cpu_start, cpu)) - 1417 (unsigned long)kvm_ksym_ref(CHOOSE_NVHE_SYM(__per_cpu_start)); 1418 1419 params->mair_el2 = read_sysreg(mair_el1); 1420 1421 /* 1422 * The ID map may be configured to use an extended virtual address 1423 * range. This is only the case if system RAM is out of range for the 1424 * currently configured page size and VA_BITS, in which case we will 1425 * also need the extended virtual range for the HYP ID map, or we won't 1426 * be able to enable the EL2 MMU. 1427 * 1428 * However, at EL2, there is only one TTBR register, and we can't switch 1429 * between translation tables *and* update TCR_EL2.T0SZ at the same 1430 * time. Bottom line: we need to use the extended range with *both* our 1431 * translation tables. 1432 * 1433 * So use the same T0SZ value we use for the ID map. 1434 */ 1435 tcr = (read_sysreg(tcr_el1) & TCR_EL2_MASK) | TCR_EL2_RES1; 1436 tcr &= ~TCR_T0SZ_MASK; 1437 tcr |= (idmap_t0sz & GENMASK(TCR_TxSZ_WIDTH - 1, 0)) << TCR_T0SZ_OFFSET; 1438 params->tcr_el2 = tcr; 1439 1440 params->stack_hyp_va = kern_hyp_va(per_cpu(kvm_arm_hyp_stack_page, cpu) + PAGE_SIZE); 1441 params->pgd_pa = kvm_mmu_get_httbr(); 1442 if (is_protected_kvm_enabled()) 1443 params->hcr_el2 = HCR_HOST_NVHE_PROTECTED_FLAGS; 1444 else 1445 params->hcr_el2 = HCR_HOST_NVHE_FLAGS; 1446 params->vttbr = params->vtcr = 0; 1447 1448 /* 1449 * Flush the init params from the data cache because the struct will 1450 * be read while the MMU is off. 1451 */ 1452 kvm_flush_dcache_to_poc(params, sizeof(*params)); 1453 } 1454 1455 static void hyp_install_host_vector(void) 1456 { 1457 struct kvm_nvhe_init_params *params; 1458 struct arm_smccc_res res; 1459 1460 /* Switch from the HYP stub to our own HYP init vector */ 1461 __hyp_set_vectors(kvm_get_idmap_vector()); 1462 1463 /* 1464 * Call initialization code, and switch to the full blown HYP code. 1465 * If the cpucaps haven't been finalized yet, something has gone very 1466 * wrong, and hyp will crash and burn when it uses any 1467 * cpus_have_const_cap() wrapper. 1468 */ 1469 BUG_ON(!system_capabilities_finalized()); 1470 params = this_cpu_ptr_nvhe_sym(kvm_init_params); 1471 arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(__kvm_hyp_init), virt_to_phys(params), &res); 1472 WARN_ON(res.a0 != SMCCC_RET_SUCCESS); 1473 } 1474 1475 static void cpu_init_hyp_mode(void) 1476 { 1477 hyp_install_host_vector(); 1478 1479 /* 1480 * Disabling SSBD on a non-VHE system requires us to enable SSBS 1481 * at EL2. 1482 */ 1483 if (this_cpu_has_cap(ARM64_SSBS) && 1484 arm64_get_spectre_v4_state() == SPECTRE_VULNERABLE) { 1485 kvm_call_hyp_nvhe(__kvm_enable_ssbs); 1486 } 1487 } 1488 1489 static void cpu_hyp_reset(void) 1490 { 1491 if (!is_kernel_in_hyp_mode()) 1492 __hyp_reset_vectors(); 1493 } 1494 1495 /* 1496 * EL2 vectors can be mapped and rerouted in a number of ways, 1497 * depending on the kernel configuration and CPU present: 1498 * 1499 * - If the CPU is affected by Spectre-v2, the hardening sequence is 1500 * placed in one of the vector slots, which is executed before jumping 1501 * to the real vectors. 1502 * 1503 * - If the CPU also has the ARM64_SPECTRE_V3A cap, the slot 1504 * containing the hardening sequence is mapped next to the idmap page, 1505 * and executed before jumping to the real vectors. 1506 * 1507 * - If the CPU only has the ARM64_SPECTRE_V3A cap, then an 1508 * empty slot is selected, mapped next to the idmap page, and 1509 * executed before jumping to the real vectors. 1510 * 1511 * Note that ARM64_SPECTRE_V3A is somewhat incompatible with 1512 * VHE, as we don't have hypervisor-specific mappings. If the system 1513 * is VHE and yet selects this capability, it will be ignored. 1514 */ 1515 static void cpu_set_hyp_vector(void) 1516 { 1517 struct bp_hardening_data *data = this_cpu_ptr(&bp_hardening_data); 1518 void *vector = hyp_spectre_vector_selector[data->slot]; 1519 1520 if (!is_protected_kvm_enabled()) 1521 *this_cpu_ptr_hyp_sym(kvm_hyp_vector) = (unsigned long)vector; 1522 else 1523 kvm_call_hyp_nvhe(__pkvm_cpu_set_vector, data->slot); 1524 } 1525 1526 static void cpu_hyp_reinit(void) 1527 { 1528 kvm_init_host_cpu_context(&this_cpu_ptr_hyp_sym(kvm_host_data)->host_ctxt); 1529 1530 cpu_hyp_reset(); 1531 1532 if (is_kernel_in_hyp_mode()) 1533 kvm_timer_init_vhe(); 1534 else 1535 cpu_init_hyp_mode(); 1536 1537 cpu_set_hyp_vector(); 1538 1539 kvm_arm_init_debug(); 1540 1541 if (vgic_present) 1542 kvm_vgic_init_cpu_hardware(); 1543 } 1544 1545 static void _kvm_arch_hardware_enable(void *discard) 1546 { 1547 if (!__this_cpu_read(kvm_arm_hardware_enabled)) { 1548 cpu_hyp_reinit(); 1549 __this_cpu_write(kvm_arm_hardware_enabled, 1); 1550 } 1551 } 1552 1553 int kvm_arch_hardware_enable(void) 1554 { 1555 _kvm_arch_hardware_enable(NULL); 1556 return 0; 1557 } 1558 1559 static void _kvm_arch_hardware_disable(void *discard) 1560 { 1561 if (__this_cpu_read(kvm_arm_hardware_enabled)) { 1562 cpu_hyp_reset(); 1563 __this_cpu_write(kvm_arm_hardware_enabled, 0); 1564 } 1565 } 1566 1567 void kvm_arch_hardware_disable(void) 1568 { 1569 if (!is_protected_kvm_enabled()) 1570 _kvm_arch_hardware_disable(NULL); 1571 } 1572 1573 #ifdef CONFIG_CPU_PM 1574 static int hyp_init_cpu_pm_notifier(struct notifier_block *self, 1575 unsigned long cmd, 1576 void *v) 1577 { 1578 /* 1579 * kvm_arm_hardware_enabled is left with its old value over 1580 * PM_ENTER->PM_EXIT. It is used to indicate PM_EXIT should 1581 * re-enable hyp. 1582 */ 1583 switch (cmd) { 1584 case CPU_PM_ENTER: 1585 if (__this_cpu_read(kvm_arm_hardware_enabled)) 1586 /* 1587 * don't update kvm_arm_hardware_enabled here 1588 * so that the hardware will be re-enabled 1589 * when we resume. See below. 1590 */ 1591 cpu_hyp_reset(); 1592 1593 return NOTIFY_OK; 1594 case CPU_PM_ENTER_FAILED: 1595 case CPU_PM_EXIT: 1596 if (__this_cpu_read(kvm_arm_hardware_enabled)) 1597 /* The hardware was enabled before suspend. */ 1598 cpu_hyp_reinit(); 1599 1600 return NOTIFY_OK; 1601 1602 default: 1603 return NOTIFY_DONE; 1604 } 1605 } 1606 1607 static struct notifier_block hyp_init_cpu_pm_nb = { 1608 .notifier_call = hyp_init_cpu_pm_notifier, 1609 }; 1610 1611 static void hyp_cpu_pm_init(void) 1612 { 1613 if (!is_protected_kvm_enabled()) 1614 cpu_pm_register_notifier(&hyp_init_cpu_pm_nb); 1615 } 1616 static void hyp_cpu_pm_exit(void) 1617 { 1618 if (!is_protected_kvm_enabled()) 1619 cpu_pm_unregister_notifier(&hyp_init_cpu_pm_nb); 1620 } 1621 #else 1622 static inline void hyp_cpu_pm_init(void) 1623 { 1624 } 1625 static inline void hyp_cpu_pm_exit(void) 1626 { 1627 } 1628 #endif 1629 1630 static void init_cpu_logical_map(void) 1631 { 1632 unsigned int cpu; 1633 1634 /* 1635 * Copy the MPIDR <-> logical CPU ID mapping to hyp. 1636 * Only copy the set of online CPUs whose features have been chacked 1637 * against the finalized system capabilities. The hypervisor will not 1638 * allow any other CPUs from the `possible` set to boot. 1639 */ 1640 for_each_online_cpu(cpu) 1641 hyp_cpu_logical_map[cpu] = cpu_logical_map(cpu); 1642 } 1643 1644 #define init_psci_0_1_impl_state(config, what) \ 1645 config.psci_0_1_ ## what ## _implemented = psci_ops.what 1646 1647 static bool init_psci_relay(void) 1648 { 1649 /* 1650 * If PSCI has not been initialized, protected KVM cannot install 1651 * itself on newly booted CPUs. 1652 */ 1653 if (!psci_ops.get_version) { 1654 kvm_err("Cannot initialize protected mode without PSCI\n"); 1655 return false; 1656 } 1657 1658 kvm_host_psci_config.version = psci_ops.get_version(); 1659 1660 if (kvm_host_psci_config.version == PSCI_VERSION(0, 1)) { 1661 kvm_host_psci_config.function_ids_0_1 = get_psci_0_1_function_ids(); 1662 init_psci_0_1_impl_state(kvm_host_psci_config, cpu_suspend); 1663 init_psci_0_1_impl_state(kvm_host_psci_config, cpu_on); 1664 init_psci_0_1_impl_state(kvm_host_psci_config, cpu_off); 1665 init_psci_0_1_impl_state(kvm_host_psci_config, migrate); 1666 } 1667 return true; 1668 } 1669 1670 static int init_common_resources(void) 1671 { 1672 return kvm_set_ipa_limit(); 1673 } 1674 1675 static int init_subsystems(void) 1676 { 1677 int err = 0; 1678 1679 /* 1680 * Enable hardware so that subsystem initialisation can access EL2. 1681 */ 1682 on_each_cpu(_kvm_arch_hardware_enable, NULL, 1); 1683 1684 /* 1685 * Register CPU lower-power notifier 1686 */ 1687 hyp_cpu_pm_init(); 1688 1689 /* 1690 * Init HYP view of VGIC 1691 */ 1692 err = kvm_vgic_hyp_init(); 1693 switch (err) { 1694 case 0: 1695 vgic_present = true; 1696 break; 1697 case -ENODEV: 1698 case -ENXIO: 1699 vgic_present = false; 1700 err = 0; 1701 break; 1702 default: 1703 goto out; 1704 } 1705 1706 /* 1707 * Init HYP architected timer support 1708 */ 1709 err = kvm_timer_hyp_init(vgic_present); 1710 if (err) 1711 goto out; 1712 1713 kvm_perf_init(); 1714 kvm_sys_reg_table_init(); 1715 1716 out: 1717 if (err || !is_protected_kvm_enabled()) 1718 on_each_cpu(_kvm_arch_hardware_disable, NULL, 1); 1719 1720 return err; 1721 } 1722 1723 static void teardown_hyp_mode(void) 1724 { 1725 int cpu; 1726 1727 free_hyp_pgds(); 1728 for_each_possible_cpu(cpu) { 1729 free_page(per_cpu(kvm_arm_hyp_stack_page, cpu)); 1730 free_pages(kvm_arm_hyp_percpu_base[cpu], nvhe_percpu_order()); 1731 } 1732 } 1733 1734 static int do_pkvm_init(u32 hyp_va_bits) 1735 { 1736 void *per_cpu_base = kvm_ksym_ref(kvm_arm_hyp_percpu_base); 1737 int ret; 1738 1739 preempt_disable(); 1740 hyp_install_host_vector(); 1741 ret = kvm_call_hyp_nvhe(__pkvm_init, hyp_mem_base, hyp_mem_size, 1742 num_possible_cpus(), kern_hyp_va(per_cpu_base), 1743 hyp_va_bits); 1744 preempt_enable(); 1745 1746 return ret; 1747 } 1748 1749 static int kvm_hyp_init_protection(u32 hyp_va_bits) 1750 { 1751 void *addr = phys_to_virt(hyp_mem_base); 1752 int ret; 1753 1754 kvm_nvhe_sym(id_aa64mmfr0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); 1755 kvm_nvhe_sym(id_aa64mmfr1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1); 1756 1757 ret = create_hyp_mappings(addr, addr + hyp_mem_size, PAGE_HYP); 1758 if (ret) 1759 return ret; 1760 1761 ret = do_pkvm_init(hyp_va_bits); 1762 if (ret) 1763 return ret; 1764 1765 free_hyp_pgds(); 1766 1767 return 0; 1768 } 1769 1770 /** 1771 * Inits Hyp-mode on all online CPUs 1772 */ 1773 static int init_hyp_mode(void) 1774 { 1775 u32 hyp_va_bits; 1776 int cpu; 1777 int err = -ENOMEM; 1778 1779 /* 1780 * The protected Hyp-mode cannot be initialized if the memory pool 1781 * allocation has failed. 1782 */ 1783 if (is_protected_kvm_enabled() && !hyp_mem_base) 1784 goto out_err; 1785 1786 /* 1787 * Allocate Hyp PGD and setup Hyp identity mapping 1788 */ 1789 err = kvm_mmu_init(&hyp_va_bits); 1790 if (err) 1791 goto out_err; 1792 1793 /* 1794 * Allocate stack pages for Hypervisor-mode 1795 */ 1796 for_each_possible_cpu(cpu) { 1797 unsigned long stack_page; 1798 1799 stack_page = __get_free_page(GFP_KERNEL); 1800 if (!stack_page) { 1801 err = -ENOMEM; 1802 goto out_err; 1803 } 1804 1805 per_cpu(kvm_arm_hyp_stack_page, cpu) = stack_page; 1806 } 1807 1808 /* 1809 * Allocate and initialize pages for Hypervisor-mode percpu regions. 1810 */ 1811 for_each_possible_cpu(cpu) { 1812 struct page *page; 1813 void *page_addr; 1814 1815 page = alloc_pages(GFP_KERNEL, nvhe_percpu_order()); 1816 if (!page) { 1817 err = -ENOMEM; 1818 goto out_err; 1819 } 1820 1821 page_addr = page_address(page); 1822 memcpy(page_addr, CHOOSE_NVHE_SYM(__per_cpu_start), nvhe_percpu_size()); 1823 kvm_arm_hyp_percpu_base[cpu] = (unsigned long)page_addr; 1824 } 1825 1826 /* 1827 * Map the Hyp-code called directly from the host 1828 */ 1829 err = create_hyp_mappings(kvm_ksym_ref(__hyp_text_start), 1830 kvm_ksym_ref(__hyp_text_end), PAGE_HYP_EXEC); 1831 if (err) { 1832 kvm_err("Cannot map world-switch code\n"); 1833 goto out_err; 1834 } 1835 1836 err = create_hyp_mappings(kvm_ksym_ref(__hyp_rodata_start), 1837 kvm_ksym_ref(__hyp_rodata_end), PAGE_HYP_RO); 1838 if (err) { 1839 kvm_err("Cannot map .hyp.rodata section\n"); 1840 goto out_err; 1841 } 1842 1843 err = create_hyp_mappings(kvm_ksym_ref(__start_rodata), 1844 kvm_ksym_ref(__end_rodata), PAGE_HYP_RO); 1845 if (err) { 1846 kvm_err("Cannot map rodata section\n"); 1847 goto out_err; 1848 } 1849 1850 /* 1851 * .hyp.bss is guaranteed to be placed at the beginning of the .bss 1852 * section thanks to an assertion in the linker script. Map it RW and 1853 * the rest of .bss RO. 1854 */ 1855 err = create_hyp_mappings(kvm_ksym_ref(__hyp_bss_start), 1856 kvm_ksym_ref(__hyp_bss_end), PAGE_HYP); 1857 if (err) { 1858 kvm_err("Cannot map hyp bss section: %d\n", err); 1859 goto out_err; 1860 } 1861 1862 err = create_hyp_mappings(kvm_ksym_ref(__hyp_bss_end), 1863 kvm_ksym_ref(__bss_stop), PAGE_HYP_RO); 1864 if (err) { 1865 kvm_err("Cannot map bss section\n"); 1866 goto out_err; 1867 } 1868 1869 /* 1870 * Map the Hyp stack pages 1871 */ 1872 for_each_possible_cpu(cpu) { 1873 char *stack_page = (char *)per_cpu(kvm_arm_hyp_stack_page, cpu); 1874 err = create_hyp_mappings(stack_page, stack_page + PAGE_SIZE, 1875 PAGE_HYP); 1876 1877 if (err) { 1878 kvm_err("Cannot map hyp stack\n"); 1879 goto out_err; 1880 } 1881 } 1882 1883 for_each_possible_cpu(cpu) { 1884 char *percpu_begin = (char *)kvm_arm_hyp_percpu_base[cpu]; 1885 char *percpu_end = percpu_begin + nvhe_percpu_size(); 1886 1887 /* Map Hyp percpu pages */ 1888 err = create_hyp_mappings(percpu_begin, percpu_end, PAGE_HYP); 1889 if (err) { 1890 kvm_err("Cannot map hyp percpu region\n"); 1891 goto out_err; 1892 } 1893 1894 /* Prepare the CPU initialization parameters */ 1895 cpu_prepare_hyp_mode(cpu); 1896 } 1897 1898 if (is_protected_kvm_enabled()) { 1899 init_cpu_logical_map(); 1900 1901 if (!init_psci_relay()) { 1902 err = -ENODEV; 1903 goto out_err; 1904 } 1905 } 1906 1907 if (is_protected_kvm_enabled()) { 1908 err = kvm_hyp_init_protection(hyp_va_bits); 1909 if (err) { 1910 kvm_err("Failed to init hyp memory protection\n"); 1911 goto out_err; 1912 } 1913 } 1914 1915 return 0; 1916 1917 out_err: 1918 teardown_hyp_mode(); 1919 kvm_err("error initializing Hyp mode: %d\n", err); 1920 return err; 1921 } 1922 1923 static void _kvm_host_prot_finalize(void *discard) 1924 { 1925 WARN_ON(kvm_call_hyp_nvhe(__pkvm_prot_finalize)); 1926 } 1927 1928 static inline int pkvm_mark_hyp(phys_addr_t start, phys_addr_t end) 1929 { 1930 return kvm_call_hyp_nvhe(__pkvm_mark_hyp, start, end); 1931 } 1932 1933 #define pkvm_mark_hyp_section(__section) \ 1934 pkvm_mark_hyp(__pa_symbol(__section##_start), \ 1935 __pa_symbol(__section##_end)) 1936 1937 static int finalize_hyp_mode(void) 1938 { 1939 int cpu, ret; 1940 1941 if (!is_protected_kvm_enabled()) 1942 return 0; 1943 1944 ret = pkvm_mark_hyp_section(__hyp_idmap_text); 1945 if (ret) 1946 return ret; 1947 1948 ret = pkvm_mark_hyp_section(__hyp_text); 1949 if (ret) 1950 return ret; 1951 1952 ret = pkvm_mark_hyp_section(__hyp_rodata); 1953 if (ret) 1954 return ret; 1955 1956 ret = pkvm_mark_hyp_section(__hyp_bss); 1957 if (ret) 1958 return ret; 1959 1960 ret = pkvm_mark_hyp(hyp_mem_base, hyp_mem_base + hyp_mem_size); 1961 if (ret) 1962 return ret; 1963 1964 for_each_possible_cpu(cpu) { 1965 phys_addr_t start = virt_to_phys((void *)kvm_arm_hyp_percpu_base[cpu]); 1966 phys_addr_t end = start + (PAGE_SIZE << nvhe_percpu_order()); 1967 1968 ret = pkvm_mark_hyp(start, end); 1969 if (ret) 1970 return ret; 1971 1972 start = virt_to_phys((void *)per_cpu(kvm_arm_hyp_stack_page, cpu)); 1973 end = start + PAGE_SIZE; 1974 ret = pkvm_mark_hyp(start, end); 1975 if (ret) 1976 return ret; 1977 } 1978 1979 /* 1980 * Flip the static key upfront as that may no longer be possible 1981 * once the host stage 2 is installed. 1982 */ 1983 static_branch_enable(&kvm_protected_mode_initialized); 1984 on_each_cpu(_kvm_host_prot_finalize, NULL, 1); 1985 1986 return 0; 1987 } 1988 1989 static void check_kvm_target_cpu(void *ret) 1990 { 1991 *(int *)ret = kvm_target_cpu(); 1992 } 1993 1994 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr) 1995 { 1996 struct kvm_vcpu *vcpu; 1997 int i; 1998 1999 mpidr &= MPIDR_HWID_BITMASK; 2000 kvm_for_each_vcpu(i, vcpu, kvm) { 2001 if (mpidr == kvm_vcpu_get_mpidr_aff(vcpu)) 2002 return vcpu; 2003 } 2004 return NULL; 2005 } 2006 2007 bool kvm_arch_has_irq_bypass(void) 2008 { 2009 return true; 2010 } 2011 2012 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons, 2013 struct irq_bypass_producer *prod) 2014 { 2015 struct kvm_kernel_irqfd *irqfd = 2016 container_of(cons, struct kvm_kernel_irqfd, consumer); 2017 2018 return kvm_vgic_v4_set_forwarding(irqfd->kvm, prod->irq, 2019 &irqfd->irq_entry); 2020 } 2021 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons, 2022 struct irq_bypass_producer *prod) 2023 { 2024 struct kvm_kernel_irqfd *irqfd = 2025 container_of(cons, struct kvm_kernel_irqfd, consumer); 2026 2027 kvm_vgic_v4_unset_forwarding(irqfd->kvm, prod->irq, 2028 &irqfd->irq_entry); 2029 } 2030 2031 void kvm_arch_irq_bypass_stop(struct irq_bypass_consumer *cons) 2032 { 2033 struct kvm_kernel_irqfd *irqfd = 2034 container_of(cons, struct kvm_kernel_irqfd, consumer); 2035 2036 kvm_arm_halt_guest(irqfd->kvm); 2037 } 2038 2039 void kvm_arch_irq_bypass_start(struct irq_bypass_consumer *cons) 2040 { 2041 struct kvm_kernel_irqfd *irqfd = 2042 container_of(cons, struct kvm_kernel_irqfd, consumer); 2043 2044 kvm_arm_resume_guest(irqfd->kvm); 2045 } 2046 2047 /** 2048 * Initialize Hyp-mode and memory mappings on all CPUs. 2049 */ 2050 int kvm_arch_init(void *opaque) 2051 { 2052 int err; 2053 int ret, cpu; 2054 bool in_hyp_mode; 2055 2056 if (!is_hyp_mode_available()) { 2057 kvm_info("HYP mode not available\n"); 2058 return -ENODEV; 2059 } 2060 2061 in_hyp_mode = is_kernel_in_hyp_mode(); 2062 2063 if (cpus_have_final_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) || 2064 cpus_have_final_cap(ARM64_WORKAROUND_1508412)) 2065 kvm_info("Guests without required CPU erratum workarounds can deadlock system!\n" \ 2066 "Only trusted guests should be used on this system.\n"); 2067 2068 for_each_online_cpu(cpu) { 2069 smp_call_function_single(cpu, check_kvm_target_cpu, &ret, 1); 2070 if (ret < 0) { 2071 kvm_err("Error, CPU %d not supported!\n", cpu); 2072 return -ENODEV; 2073 } 2074 } 2075 2076 err = init_common_resources(); 2077 if (err) 2078 return err; 2079 2080 err = kvm_arm_init_sve(); 2081 if (err) 2082 return err; 2083 2084 if (!in_hyp_mode) { 2085 err = init_hyp_mode(); 2086 if (err) 2087 goto out_err; 2088 } 2089 2090 err = kvm_init_vector_slots(); 2091 if (err) { 2092 kvm_err("Cannot initialise vector slots\n"); 2093 goto out_err; 2094 } 2095 2096 err = init_subsystems(); 2097 if (err) 2098 goto out_hyp; 2099 2100 if (!in_hyp_mode) { 2101 err = finalize_hyp_mode(); 2102 if (err) { 2103 kvm_err("Failed to finalize Hyp protection\n"); 2104 goto out_hyp; 2105 } 2106 } 2107 2108 if (is_protected_kvm_enabled()) { 2109 kvm_info("Protected nVHE mode initialized successfully\n"); 2110 } else if (in_hyp_mode) { 2111 kvm_info("VHE mode initialized successfully\n"); 2112 } else { 2113 kvm_info("Hyp mode initialized successfully\n"); 2114 } 2115 2116 return 0; 2117 2118 out_hyp: 2119 hyp_cpu_pm_exit(); 2120 if (!in_hyp_mode) 2121 teardown_hyp_mode(); 2122 out_err: 2123 return err; 2124 } 2125 2126 /* NOP: Compiling as a module not supported */ 2127 void kvm_arch_exit(void) 2128 { 2129 kvm_perf_teardown(); 2130 } 2131 2132 static int __init early_kvm_mode_cfg(char *arg) 2133 { 2134 if (!arg) 2135 return -EINVAL; 2136 2137 if (strcmp(arg, "protected") == 0) { 2138 kvm_mode = KVM_MODE_PROTECTED; 2139 return 0; 2140 } 2141 2142 if (strcmp(arg, "nvhe") == 0 && !WARN_ON(is_kernel_in_hyp_mode())) 2143 return 0; 2144 2145 return -EINVAL; 2146 } 2147 early_param("kvm-arm.mode", early_kvm_mode_cfg); 2148 2149 enum kvm_mode kvm_get_mode(void) 2150 { 2151 return kvm_mode; 2152 } 2153 2154 static int arm_init(void) 2155 { 2156 int rc = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); 2157 return rc; 2158 } 2159 2160 module_init(arm_init); 2161