1 /* 2 * Based on arch/arm/kernel/traps.c 3 * 4 * Copyright (C) 1995-2009 Russell King 5 * Copyright (C) 2012 ARM Ltd. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include <linux/bug.h> 21 #include <linux/signal.h> 22 #include <linux/personality.h> 23 #include <linux/kallsyms.h> 24 #include <linux/spinlock.h> 25 #include <linux/uaccess.h> 26 #include <linux/hardirq.h> 27 #include <linux/kdebug.h> 28 #include <linux/module.h> 29 #include <linux/kexec.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/sched.h> 33 #include <linux/syscalls.h> 34 35 #include <asm/atomic.h> 36 #include <asm/bug.h> 37 #include <asm/debug-monitors.h> 38 #include <asm/esr.h> 39 #include <asm/insn.h> 40 #include <asm/traps.h> 41 #include <asm/stacktrace.h> 42 #include <asm/exception.h> 43 #include <asm/system_misc.h> 44 #include <asm/sysreg.h> 45 46 static const char *handler[]= { 47 "Synchronous Abort", 48 "IRQ", 49 "FIQ", 50 "Error" 51 }; 52 53 int show_unhandled_signals = 1; 54 55 /* 56 * Dump out the contents of some kernel memory nicely... 57 */ 58 static void dump_mem(const char *lvl, const char *str, unsigned long bottom, 59 unsigned long top) 60 { 61 unsigned long first; 62 mm_segment_t fs; 63 int i; 64 65 /* 66 * We need to switch to kernel mode so that we can use __get_user 67 * to safely read from kernel space. 68 */ 69 fs = get_fs(); 70 set_fs(KERNEL_DS); 71 72 printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top); 73 74 for (first = bottom & ~31; first < top; first += 32) { 75 unsigned long p; 76 char str[sizeof(" 12345678") * 8 + 1]; 77 78 memset(str, ' ', sizeof(str)); 79 str[sizeof(str) - 1] = '\0'; 80 81 for (p = first, i = 0; i < (32 / 8) 82 && p < top; i++, p += 8) { 83 if (p >= bottom && p < top) { 84 unsigned long val; 85 86 if (__get_user(val, (unsigned long *)p) == 0) 87 sprintf(str + i * 17, " %016lx", val); 88 else 89 sprintf(str + i * 17, " ????????????????"); 90 } 91 } 92 printk("%s%04lx:%s\n", lvl, first & 0xffff, str); 93 } 94 95 set_fs(fs); 96 } 97 98 static void dump_backtrace_entry(unsigned long where) 99 { 100 /* 101 * Note that 'where' can have a physical address, but it's not handled. 102 */ 103 print_ip_sym(where); 104 } 105 106 static void __dump_instr(const char *lvl, struct pt_regs *regs) 107 { 108 unsigned long addr = instruction_pointer(regs); 109 char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str; 110 int i; 111 112 for (i = -4; i < 1; i++) { 113 unsigned int val, bad; 114 115 bad = __get_user(val, &((u32 *)addr)[i]); 116 117 if (!bad) 118 p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val); 119 else { 120 p += sprintf(p, "bad PC value"); 121 break; 122 } 123 } 124 printk("%sCode: %s\n", lvl, str); 125 } 126 127 static void dump_instr(const char *lvl, struct pt_regs *regs) 128 { 129 if (!user_mode(regs)) { 130 mm_segment_t fs = get_fs(); 131 set_fs(KERNEL_DS); 132 __dump_instr(lvl, regs); 133 set_fs(fs); 134 } else { 135 __dump_instr(lvl, regs); 136 } 137 } 138 139 static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) 140 { 141 struct stackframe frame; 142 unsigned long irq_stack_ptr; 143 int skip; 144 145 pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk); 146 147 if (!tsk) 148 tsk = current; 149 150 /* 151 * Switching between stacks is valid when tracing current and in 152 * non-preemptible context. 153 */ 154 if (tsk == current && !preemptible()) 155 irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id()); 156 else 157 irq_stack_ptr = 0; 158 159 if (tsk == current) { 160 frame.fp = (unsigned long)__builtin_frame_address(0); 161 frame.sp = current_stack_pointer; 162 frame.pc = (unsigned long)dump_backtrace; 163 } else { 164 /* 165 * task blocked in __switch_to 166 */ 167 frame.fp = thread_saved_fp(tsk); 168 frame.sp = thread_saved_sp(tsk); 169 frame.pc = thread_saved_pc(tsk); 170 } 171 #ifdef CONFIG_FUNCTION_GRAPH_TRACER 172 frame.graph = tsk->curr_ret_stack; 173 #endif 174 175 skip = !!regs; 176 printk("Call trace:\n"); 177 while (1) { 178 unsigned long where = frame.pc; 179 unsigned long stack; 180 int ret; 181 182 /* skip until specified stack frame */ 183 if (!skip) { 184 dump_backtrace_entry(where); 185 } else if (frame.fp == regs->regs[29]) { 186 skip = 0; 187 /* 188 * Mostly, this is the case where this function is 189 * called in panic/abort. As exception handler's 190 * stack frame does not contain the corresponding pc 191 * at which an exception has taken place, use regs->pc 192 * instead. 193 */ 194 dump_backtrace_entry(regs->pc); 195 } 196 ret = unwind_frame(tsk, &frame); 197 if (ret < 0) 198 break; 199 stack = frame.sp; 200 if (in_exception_text(where)) { 201 /* 202 * If we switched to the irq_stack before calling this 203 * exception handler, then the pt_regs will be on the 204 * task stack. The easiest way to tell is if the large 205 * pt_regs would overlap with the end of the irq_stack. 206 */ 207 if (stack < irq_stack_ptr && 208 (stack + sizeof(struct pt_regs)) > irq_stack_ptr) 209 stack = IRQ_STACK_TO_TASK_STACK(irq_stack_ptr); 210 211 dump_mem("", "Exception stack", stack, 212 stack + sizeof(struct pt_regs)); 213 } 214 } 215 } 216 217 void show_stack(struct task_struct *tsk, unsigned long *sp) 218 { 219 dump_backtrace(NULL, tsk); 220 barrier(); 221 } 222 223 #ifdef CONFIG_PREEMPT 224 #define S_PREEMPT " PREEMPT" 225 #else 226 #define S_PREEMPT "" 227 #endif 228 #define S_SMP " SMP" 229 230 static int __die(const char *str, int err, struct thread_info *thread, 231 struct pt_regs *regs) 232 { 233 struct task_struct *tsk = thread->task; 234 static int die_counter; 235 int ret; 236 237 pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n", 238 str, err, ++die_counter); 239 240 /* trap and error numbers are mostly meaningless on ARM */ 241 ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV); 242 if (ret == NOTIFY_STOP) 243 return ret; 244 245 print_modules(); 246 __show_regs(regs); 247 pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n", 248 TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1); 249 250 if (!user_mode(regs)) { 251 dump_mem(KERN_EMERG, "Stack: ", regs->sp, 252 THREAD_SIZE + (unsigned long)task_stack_page(tsk)); 253 dump_backtrace(regs, tsk); 254 dump_instr(KERN_EMERG, regs); 255 } 256 257 return ret; 258 } 259 260 static DEFINE_RAW_SPINLOCK(die_lock); 261 262 /* 263 * This function is protected against re-entrancy. 264 */ 265 void die(const char *str, struct pt_regs *regs, int err) 266 { 267 struct thread_info *thread = current_thread_info(); 268 int ret; 269 270 oops_enter(); 271 272 raw_spin_lock_irq(&die_lock); 273 console_verbose(); 274 bust_spinlocks(1); 275 ret = __die(str, err, thread, regs); 276 277 if (regs && kexec_should_crash(thread->task)) 278 crash_kexec(regs); 279 280 bust_spinlocks(0); 281 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE); 282 raw_spin_unlock_irq(&die_lock); 283 oops_exit(); 284 285 if (in_interrupt()) 286 panic("Fatal exception in interrupt"); 287 if (panic_on_oops) 288 panic("Fatal exception"); 289 if (ret != NOTIFY_STOP) 290 do_exit(SIGSEGV); 291 } 292 293 void arm64_notify_die(const char *str, struct pt_regs *regs, 294 struct siginfo *info, int err) 295 { 296 if (user_mode(regs)) { 297 current->thread.fault_address = 0; 298 current->thread.fault_code = err; 299 force_sig_info(info->si_signo, info, current); 300 } else { 301 die(str, regs, err); 302 } 303 } 304 305 static LIST_HEAD(undef_hook); 306 static DEFINE_RAW_SPINLOCK(undef_lock); 307 308 void register_undef_hook(struct undef_hook *hook) 309 { 310 unsigned long flags; 311 312 raw_spin_lock_irqsave(&undef_lock, flags); 313 list_add(&hook->node, &undef_hook); 314 raw_spin_unlock_irqrestore(&undef_lock, flags); 315 } 316 317 void unregister_undef_hook(struct undef_hook *hook) 318 { 319 unsigned long flags; 320 321 raw_spin_lock_irqsave(&undef_lock, flags); 322 list_del(&hook->node); 323 raw_spin_unlock_irqrestore(&undef_lock, flags); 324 } 325 326 static int call_undef_hook(struct pt_regs *regs) 327 { 328 struct undef_hook *hook; 329 unsigned long flags; 330 u32 instr; 331 int (*fn)(struct pt_regs *regs, u32 instr) = NULL; 332 void __user *pc = (void __user *)instruction_pointer(regs); 333 334 if (!user_mode(regs)) 335 return 1; 336 337 if (compat_thumb_mode(regs)) { 338 /* 16-bit Thumb instruction */ 339 if (get_user(instr, (u16 __user *)pc)) 340 goto exit; 341 instr = le16_to_cpu(instr); 342 if (aarch32_insn_is_wide(instr)) { 343 u32 instr2; 344 345 if (get_user(instr2, (u16 __user *)(pc + 2))) 346 goto exit; 347 instr2 = le16_to_cpu(instr2); 348 instr = (instr << 16) | instr2; 349 } 350 } else { 351 /* 32-bit ARM instruction */ 352 if (get_user(instr, (u32 __user *)pc)) 353 goto exit; 354 instr = le32_to_cpu(instr); 355 } 356 357 raw_spin_lock_irqsave(&undef_lock, flags); 358 list_for_each_entry(hook, &undef_hook, node) 359 if ((instr & hook->instr_mask) == hook->instr_val && 360 (regs->pstate & hook->pstate_mask) == hook->pstate_val) 361 fn = hook->fn; 362 363 raw_spin_unlock_irqrestore(&undef_lock, flags); 364 exit: 365 return fn ? fn(regs, instr) : 1; 366 } 367 368 static void force_signal_inject(int signal, int code, struct pt_regs *regs, 369 unsigned long address) 370 { 371 siginfo_t info; 372 void __user *pc = (void __user *)instruction_pointer(regs); 373 const char *desc; 374 375 switch (signal) { 376 case SIGILL: 377 desc = "undefined instruction"; 378 break; 379 case SIGSEGV: 380 desc = "illegal memory access"; 381 break; 382 default: 383 desc = "bad mode"; 384 break; 385 } 386 387 if (unhandled_signal(current, signal) && 388 show_unhandled_signals_ratelimited()) { 389 pr_info("%s[%d]: %s: pc=%p\n", 390 current->comm, task_pid_nr(current), desc, pc); 391 dump_instr(KERN_INFO, regs); 392 } 393 394 info.si_signo = signal; 395 info.si_errno = 0; 396 info.si_code = code; 397 info.si_addr = pc; 398 399 arm64_notify_die(desc, regs, &info, 0); 400 } 401 402 /* 403 * Set up process info to signal segmentation fault - called on access error. 404 */ 405 void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr) 406 { 407 int code; 408 409 down_read(¤t->mm->mmap_sem); 410 if (find_vma(current->mm, addr) == NULL) 411 code = SEGV_MAPERR; 412 else 413 code = SEGV_ACCERR; 414 up_read(¤t->mm->mmap_sem); 415 416 force_signal_inject(SIGSEGV, code, regs, addr); 417 } 418 419 asmlinkage void __exception do_undefinstr(struct pt_regs *regs) 420 { 421 /* check for AArch32 breakpoint instructions */ 422 if (!aarch32_break_handler(regs)) 423 return; 424 425 if (call_undef_hook(regs) == 0) 426 return; 427 428 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0); 429 } 430 431 void cpu_enable_cache_maint_trap(void *__unused) 432 { 433 config_sctlr_el1(SCTLR_EL1_UCI, 0); 434 } 435 436 #define __user_cache_maint(insn, address, res) \ 437 asm volatile ( \ 438 "1: " insn ", %1\n" \ 439 " mov %w0, #0\n" \ 440 "2:\n" \ 441 " .pushsection .fixup,\"ax\"\n" \ 442 " .align 2\n" \ 443 "3: mov %w0, %w2\n" \ 444 " b 2b\n" \ 445 " .popsection\n" \ 446 _ASM_EXTABLE(1b, 3b) \ 447 : "=r" (res) \ 448 : "r" (address), "i" (-EFAULT) ) 449 450 static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs) 451 { 452 unsigned long address; 453 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; 454 int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT; 455 int ret = 0; 456 457 address = (rt == 31) ? 0 : regs->regs[rt]; 458 459 switch (crm) { 460 case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */ 461 __user_cache_maint("dc civac", address, ret); 462 break; 463 case ESR_ELx_SYS64_ISS_CRM_DC_CVAC: /* DC CVAC, gets promoted */ 464 __user_cache_maint("dc civac", address, ret); 465 break; 466 case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC: /* DC CIVAC */ 467 __user_cache_maint("dc civac", address, ret); 468 break; 469 case ESR_ELx_SYS64_ISS_CRM_IC_IVAU: /* IC IVAU */ 470 __user_cache_maint("ic ivau", address, ret); 471 break; 472 default: 473 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0); 474 return; 475 } 476 477 if (ret) 478 arm64_notify_segfault(regs, address); 479 else 480 regs->pc += 4; 481 } 482 483 static void ctr_read_handler(unsigned int esr, struct pt_regs *regs) 484 { 485 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; 486 487 regs->regs[rt] = arm64_ftr_reg_ctrel0.sys_val; 488 regs->pc += 4; 489 } 490 491 struct sys64_hook { 492 unsigned int esr_mask; 493 unsigned int esr_val; 494 void (*handler)(unsigned int esr, struct pt_regs *regs); 495 }; 496 497 static struct sys64_hook sys64_hooks[] = { 498 { 499 .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK, 500 .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL, 501 .handler = user_cache_maint_handler, 502 }, 503 { 504 /* Trap read access to CTR_EL0 */ 505 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK, 506 .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ, 507 .handler = ctr_read_handler, 508 }, 509 {}, 510 }; 511 512 asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs) 513 { 514 struct sys64_hook *hook; 515 516 for (hook = sys64_hooks; hook->handler; hook++) 517 if ((hook->esr_mask & esr) == hook->esr_val) { 518 hook->handler(esr, regs); 519 return; 520 } 521 522 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0); 523 } 524 525 long compat_arm_syscall(struct pt_regs *regs); 526 527 asmlinkage long do_ni_syscall(struct pt_regs *regs) 528 { 529 #ifdef CONFIG_COMPAT 530 long ret; 531 if (is_compat_task()) { 532 ret = compat_arm_syscall(regs); 533 if (ret != -ENOSYS) 534 return ret; 535 } 536 #endif 537 538 if (show_unhandled_signals_ratelimited()) { 539 pr_info("%s[%d]: syscall %d\n", current->comm, 540 task_pid_nr(current), (int)regs->syscallno); 541 dump_instr("", regs); 542 if (user_mode(regs)) 543 __show_regs(regs); 544 } 545 546 return sys_ni_syscall(); 547 } 548 549 static const char *esr_class_str[] = { 550 [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC", 551 [ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized", 552 [ESR_ELx_EC_WFx] = "WFI/WFE", 553 [ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC", 554 [ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC", 555 [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC", 556 [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC", 557 [ESR_ELx_EC_FP_ASIMD] = "ASIMD", 558 [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS", 559 [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC", 560 [ESR_ELx_EC_ILL] = "PSTATE.IL", 561 [ESR_ELx_EC_SVC32] = "SVC (AArch32)", 562 [ESR_ELx_EC_HVC32] = "HVC (AArch32)", 563 [ESR_ELx_EC_SMC32] = "SMC (AArch32)", 564 [ESR_ELx_EC_SVC64] = "SVC (AArch64)", 565 [ESR_ELx_EC_HVC64] = "HVC (AArch64)", 566 [ESR_ELx_EC_SMC64] = "SMC (AArch64)", 567 [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)", 568 [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF", 569 [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)", 570 [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)", 571 [ESR_ELx_EC_PC_ALIGN] = "PC Alignment", 572 [ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)", 573 [ESR_ELx_EC_DABT_CUR] = "DABT (current EL)", 574 [ESR_ELx_EC_SP_ALIGN] = "SP Alignment", 575 [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)", 576 [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)", 577 [ESR_ELx_EC_SERROR] = "SError", 578 [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)", 579 [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)", 580 [ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)", 581 [ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)", 582 [ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)", 583 [ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)", 584 [ESR_ELx_EC_BKPT32] = "BKPT (AArch32)", 585 [ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)", 586 [ESR_ELx_EC_BRK64] = "BRK (AArch64)", 587 }; 588 589 const char *esr_get_class_string(u32 esr) 590 { 591 return esr_class_str[ESR_ELx_EC(esr)]; 592 } 593 594 /* 595 * bad_mode handles the impossible case in the exception vector. 596 */ 597 asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr) 598 { 599 siginfo_t info; 600 void __user *pc = (void __user *)instruction_pointer(regs); 601 console_verbose(); 602 603 pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n", 604 handler[reason], smp_processor_id(), esr, 605 esr_get_class_string(esr)); 606 __show_regs(regs); 607 608 info.si_signo = SIGILL; 609 info.si_errno = 0; 610 info.si_code = ILL_ILLOPC; 611 info.si_addr = pc; 612 613 arm64_notify_die("Oops - bad mode", regs, &info, 0); 614 } 615 616 void __pte_error(const char *file, int line, unsigned long val) 617 { 618 pr_err("%s:%d: bad pte %016lx.\n", file, line, val); 619 } 620 621 void __pmd_error(const char *file, int line, unsigned long val) 622 { 623 pr_err("%s:%d: bad pmd %016lx.\n", file, line, val); 624 } 625 626 void __pud_error(const char *file, int line, unsigned long val) 627 { 628 pr_err("%s:%d: bad pud %016lx.\n", file, line, val); 629 } 630 631 void __pgd_error(const char *file, int line, unsigned long val) 632 { 633 pr_err("%s:%d: bad pgd %016lx.\n", file, line, val); 634 } 635 636 /* GENERIC_BUG traps */ 637 638 int is_valid_bugaddr(unsigned long addr) 639 { 640 /* 641 * bug_handler() only called for BRK #BUG_BRK_IMM. 642 * So the answer is trivial -- any spurious instances with no 643 * bug table entry will be rejected by report_bug() and passed 644 * back to the debug-monitors code and handled as a fatal 645 * unexpected debug exception. 646 */ 647 return 1; 648 } 649 650 static int bug_handler(struct pt_regs *regs, unsigned int esr) 651 { 652 if (user_mode(regs)) 653 return DBG_HOOK_ERROR; 654 655 switch (report_bug(regs->pc, regs)) { 656 case BUG_TRAP_TYPE_BUG: 657 die("Oops - BUG", regs, 0); 658 break; 659 660 case BUG_TRAP_TYPE_WARN: 661 /* Ideally, report_bug() should backtrace for us... but no. */ 662 dump_backtrace(regs, NULL); 663 break; 664 665 default: 666 /* unknown/unrecognised bug trap type */ 667 return DBG_HOOK_ERROR; 668 } 669 670 /* If thread survives, skip over the BUG instruction and continue: */ 671 regs->pc += AARCH64_INSN_SIZE; /* skip BRK and resume */ 672 return DBG_HOOK_HANDLED; 673 } 674 675 static struct break_hook bug_break_hook = { 676 .esr_val = 0xf2000000 | BUG_BRK_IMM, 677 .esr_mask = 0xffffffff, 678 .fn = bug_handler, 679 }; 680 681 /* 682 * Initial handler for AArch64 BRK exceptions 683 * This handler only used until debug_traps_init(). 684 */ 685 int __init early_brk64(unsigned long addr, unsigned int esr, 686 struct pt_regs *regs) 687 { 688 return bug_handler(regs, esr) != DBG_HOOK_HANDLED; 689 } 690 691 /* This registration must happen early, before debug_traps_init(). */ 692 void __init trap_init(void) 693 { 694 register_break_hook(&bug_break_hook); 695 } 696