1 /* 2 * Based on arch/arm/kernel/traps.c 3 * 4 * Copyright (C) 1995-2009 Russell King 5 * Copyright (C) 2012 ARM Ltd. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include <linux/bug.h> 21 #include <linux/signal.h> 22 #include <linux/personality.h> 23 #include <linux/kallsyms.h> 24 #include <linux/spinlock.h> 25 #include <linux/uaccess.h> 26 #include <linux/hardirq.h> 27 #include <linux/kdebug.h> 28 #include <linux/module.h> 29 #include <linux/kexec.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/sched/signal.h> 33 #include <linux/sched/debug.h> 34 #include <linux/sched/task_stack.h> 35 #include <linux/syscalls.h> 36 #include <linux/mm_types.h> 37 38 #include <asm/atomic.h> 39 #include <asm/bug.h> 40 #include <asm/debug-monitors.h> 41 #include <asm/esr.h> 42 #include <asm/insn.h> 43 #include <asm/traps.h> 44 #include <asm/stack_pointer.h> 45 #include <asm/stacktrace.h> 46 #include <asm/exception.h> 47 #include <asm/system_misc.h> 48 #include <asm/sysreg.h> 49 50 static const char *handler[]= { 51 "Synchronous Abort", 52 "IRQ", 53 "FIQ", 54 "Error" 55 }; 56 57 int show_unhandled_signals = 1; 58 59 /* 60 * Dump out the contents of some kernel memory nicely... 61 */ 62 static void dump_mem(const char *lvl, const char *str, unsigned long bottom, 63 unsigned long top) 64 { 65 unsigned long first; 66 mm_segment_t fs; 67 int i; 68 69 /* 70 * We need to switch to kernel mode so that we can use __get_user 71 * to safely read from kernel space. 72 */ 73 fs = get_fs(); 74 set_fs(KERNEL_DS); 75 76 printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top); 77 78 for (first = bottom & ~31; first < top; first += 32) { 79 unsigned long p; 80 char str[sizeof(" 12345678") * 8 + 1]; 81 82 memset(str, ' ', sizeof(str)); 83 str[sizeof(str) - 1] = '\0'; 84 85 for (p = first, i = 0; i < (32 / 8) 86 && p < top; i++, p += 8) { 87 if (p >= bottom && p < top) { 88 unsigned long val; 89 90 if (__get_user(val, (unsigned long *)p) == 0) 91 sprintf(str + i * 17, " %016lx", val); 92 else 93 sprintf(str + i * 17, " ????????????????"); 94 } 95 } 96 printk("%s%04lx:%s\n", lvl, first & 0xffff, str); 97 } 98 99 set_fs(fs); 100 } 101 102 static void dump_backtrace_entry(unsigned long where) 103 { 104 /* 105 * Note that 'where' can have a physical address, but it's not handled. 106 */ 107 print_ip_sym(where); 108 } 109 110 static void __dump_instr(const char *lvl, struct pt_regs *regs) 111 { 112 unsigned long addr = instruction_pointer(regs); 113 char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str; 114 int i; 115 116 for (i = -4; i < 1; i++) { 117 unsigned int val, bad; 118 119 bad = __get_user(val, &((u32 *)addr)[i]); 120 121 if (!bad) 122 p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val); 123 else { 124 p += sprintf(p, "bad PC value"); 125 break; 126 } 127 } 128 printk("%sCode: %s\n", lvl, str); 129 } 130 131 static void dump_instr(const char *lvl, struct pt_regs *regs) 132 { 133 if (!user_mode(regs)) { 134 mm_segment_t fs = get_fs(); 135 set_fs(KERNEL_DS); 136 __dump_instr(lvl, regs); 137 set_fs(fs); 138 } else { 139 __dump_instr(lvl, regs); 140 } 141 } 142 143 static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) 144 { 145 struct stackframe frame; 146 unsigned long irq_stack_ptr; 147 int skip; 148 149 pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk); 150 151 if (!tsk) 152 tsk = current; 153 154 if (!try_get_task_stack(tsk)) 155 return; 156 157 /* 158 * Switching between stacks is valid when tracing current and in 159 * non-preemptible context. 160 */ 161 if (tsk == current && !preemptible()) 162 irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id()); 163 else 164 irq_stack_ptr = 0; 165 166 if (tsk == current) { 167 frame.fp = (unsigned long)__builtin_frame_address(0); 168 frame.sp = current_stack_pointer; 169 frame.pc = (unsigned long)dump_backtrace; 170 } else { 171 /* 172 * task blocked in __switch_to 173 */ 174 frame.fp = thread_saved_fp(tsk); 175 frame.sp = thread_saved_sp(tsk); 176 frame.pc = thread_saved_pc(tsk); 177 } 178 #ifdef CONFIG_FUNCTION_GRAPH_TRACER 179 frame.graph = tsk->curr_ret_stack; 180 #endif 181 182 skip = !!regs; 183 printk("Call trace:\n"); 184 while (1) { 185 unsigned long where = frame.pc; 186 unsigned long stack; 187 int ret; 188 189 /* skip until specified stack frame */ 190 if (!skip) { 191 dump_backtrace_entry(where); 192 } else if (frame.fp == regs->regs[29]) { 193 skip = 0; 194 /* 195 * Mostly, this is the case where this function is 196 * called in panic/abort. As exception handler's 197 * stack frame does not contain the corresponding pc 198 * at which an exception has taken place, use regs->pc 199 * instead. 200 */ 201 dump_backtrace_entry(regs->pc); 202 } 203 ret = unwind_frame(tsk, &frame); 204 if (ret < 0) 205 break; 206 stack = frame.sp; 207 if (in_exception_text(where)) { 208 /* 209 * If we switched to the irq_stack before calling this 210 * exception handler, then the pt_regs will be on the 211 * task stack. The easiest way to tell is if the large 212 * pt_regs would overlap with the end of the irq_stack. 213 */ 214 if (stack < irq_stack_ptr && 215 (stack + sizeof(struct pt_regs)) > irq_stack_ptr) 216 stack = IRQ_STACK_TO_TASK_STACK(irq_stack_ptr); 217 218 dump_mem("", "Exception stack", stack, 219 stack + sizeof(struct pt_regs)); 220 } 221 } 222 223 put_task_stack(tsk); 224 } 225 226 void show_stack(struct task_struct *tsk, unsigned long *sp) 227 { 228 dump_backtrace(NULL, tsk); 229 barrier(); 230 } 231 232 #ifdef CONFIG_PREEMPT 233 #define S_PREEMPT " PREEMPT" 234 #else 235 #define S_PREEMPT "" 236 #endif 237 #define S_SMP " SMP" 238 239 static int __die(const char *str, int err, struct pt_regs *regs) 240 { 241 struct task_struct *tsk = current; 242 static int die_counter; 243 int ret; 244 245 pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n", 246 str, err, ++die_counter); 247 248 /* trap and error numbers are mostly meaningless on ARM */ 249 ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV); 250 if (ret == NOTIFY_STOP) 251 return ret; 252 253 print_modules(); 254 __show_regs(regs); 255 pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n", 256 TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), 257 end_of_stack(tsk)); 258 259 if (!user_mode(regs)) { 260 dump_mem(KERN_EMERG, "Stack: ", regs->sp, 261 THREAD_SIZE + (unsigned long)task_stack_page(tsk)); 262 dump_backtrace(regs, tsk); 263 dump_instr(KERN_EMERG, regs); 264 } 265 266 return ret; 267 } 268 269 static DEFINE_RAW_SPINLOCK(die_lock); 270 271 /* 272 * This function is protected against re-entrancy. 273 */ 274 void die(const char *str, struct pt_regs *regs, int err) 275 { 276 int ret; 277 278 oops_enter(); 279 280 raw_spin_lock_irq(&die_lock); 281 console_verbose(); 282 bust_spinlocks(1); 283 ret = __die(str, err, regs); 284 285 if (regs && kexec_should_crash(current)) 286 crash_kexec(regs); 287 288 bust_spinlocks(0); 289 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE); 290 raw_spin_unlock_irq(&die_lock); 291 oops_exit(); 292 293 if (in_interrupt()) 294 panic("Fatal exception in interrupt"); 295 if (panic_on_oops) 296 panic("Fatal exception"); 297 if (ret != NOTIFY_STOP) 298 do_exit(SIGSEGV); 299 } 300 301 void arm64_notify_die(const char *str, struct pt_regs *regs, 302 struct siginfo *info, int err) 303 { 304 if (user_mode(regs)) { 305 current->thread.fault_address = 0; 306 current->thread.fault_code = err; 307 force_sig_info(info->si_signo, info, current); 308 } else { 309 die(str, regs, err); 310 } 311 } 312 313 static LIST_HEAD(undef_hook); 314 static DEFINE_RAW_SPINLOCK(undef_lock); 315 316 void register_undef_hook(struct undef_hook *hook) 317 { 318 unsigned long flags; 319 320 raw_spin_lock_irqsave(&undef_lock, flags); 321 list_add(&hook->node, &undef_hook); 322 raw_spin_unlock_irqrestore(&undef_lock, flags); 323 } 324 325 void unregister_undef_hook(struct undef_hook *hook) 326 { 327 unsigned long flags; 328 329 raw_spin_lock_irqsave(&undef_lock, flags); 330 list_del(&hook->node); 331 raw_spin_unlock_irqrestore(&undef_lock, flags); 332 } 333 334 static int call_undef_hook(struct pt_regs *regs) 335 { 336 struct undef_hook *hook; 337 unsigned long flags; 338 u32 instr; 339 int (*fn)(struct pt_regs *regs, u32 instr) = NULL; 340 void __user *pc = (void __user *)instruction_pointer(regs); 341 342 if (!user_mode(regs)) 343 return 1; 344 345 if (compat_thumb_mode(regs)) { 346 /* 16-bit Thumb instruction */ 347 if (get_user(instr, (u16 __user *)pc)) 348 goto exit; 349 instr = le16_to_cpu(instr); 350 if (aarch32_insn_is_wide(instr)) { 351 u32 instr2; 352 353 if (get_user(instr2, (u16 __user *)(pc + 2))) 354 goto exit; 355 instr2 = le16_to_cpu(instr2); 356 instr = (instr << 16) | instr2; 357 } 358 } else { 359 /* 32-bit ARM instruction */ 360 if (get_user(instr, (u32 __user *)pc)) 361 goto exit; 362 instr = le32_to_cpu(instr); 363 } 364 365 raw_spin_lock_irqsave(&undef_lock, flags); 366 list_for_each_entry(hook, &undef_hook, node) 367 if ((instr & hook->instr_mask) == hook->instr_val && 368 (regs->pstate & hook->pstate_mask) == hook->pstate_val) 369 fn = hook->fn; 370 371 raw_spin_unlock_irqrestore(&undef_lock, flags); 372 exit: 373 return fn ? fn(regs, instr) : 1; 374 } 375 376 static void force_signal_inject(int signal, int code, struct pt_regs *regs, 377 unsigned long address) 378 { 379 siginfo_t info; 380 void __user *pc = (void __user *)instruction_pointer(regs); 381 const char *desc; 382 383 switch (signal) { 384 case SIGILL: 385 desc = "undefined instruction"; 386 break; 387 case SIGSEGV: 388 desc = "illegal memory access"; 389 break; 390 default: 391 desc = "bad mode"; 392 break; 393 } 394 395 if (unhandled_signal(current, signal) && 396 show_unhandled_signals_ratelimited()) { 397 pr_info("%s[%d]: %s: pc=%p\n", 398 current->comm, task_pid_nr(current), desc, pc); 399 dump_instr(KERN_INFO, regs); 400 } 401 402 info.si_signo = signal; 403 info.si_errno = 0; 404 info.si_code = code; 405 info.si_addr = pc; 406 407 arm64_notify_die(desc, regs, &info, 0); 408 } 409 410 /* 411 * Set up process info to signal segmentation fault - called on access error. 412 */ 413 void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr) 414 { 415 int code; 416 417 down_read(¤t->mm->mmap_sem); 418 if (find_vma(current->mm, addr) == NULL) 419 code = SEGV_MAPERR; 420 else 421 code = SEGV_ACCERR; 422 up_read(¤t->mm->mmap_sem); 423 424 force_signal_inject(SIGSEGV, code, regs, addr); 425 } 426 427 asmlinkage void __exception do_undefinstr(struct pt_regs *regs) 428 { 429 /* check for AArch32 breakpoint instructions */ 430 if (!aarch32_break_handler(regs)) 431 return; 432 433 if (call_undef_hook(regs) == 0) 434 return; 435 436 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0); 437 } 438 439 int cpu_enable_cache_maint_trap(void *__unused) 440 { 441 config_sctlr_el1(SCTLR_EL1_UCI, 0); 442 return 0; 443 } 444 445 #define __user_cache_maint(insn, address, res) \ 446 if (untagged_addr(address) >= user_addr_max()) { \ 447 res = -EFAULT; \ 448 } else { \ 449 uaccess_ttbr0_enable(); \ 450 asm volatile ( \ 451 "1: " insn ", %1\n" \ 452 " mov %w0, #0\n" \ 453 "2:\n" \ 454 " .pushsection .fixup,\"ax\"\n" \ 455 " .align 2\n" \ 456 "3: mov %w0, %w2\n" \ 457 " b 2b\n" \ 458 " .popsection\n" \ 459 _ASM_EXTABLE(1b, 3b) \ 460 : "=r" (res) \ 461 : "r" (address), "i" (-EFAULT)); \ 462 uaccess_ttbr0_disable(); \ 463 } 464 465 static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs) 466 { 467 unsigned long address; 468 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; 469 int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT; 470 int ret = 0; 471 472 address = pt_regs_read_reg(regs, rt); 473 474 switch (crm) { 475 case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */ 476 __user_cache_maint("dc civac", address, ret); 477 break; 478 case ESR_ELx_SYS64_ISS_CRM_DC_CVAC: /* DC CVAC, gets promoted */ 479 __user_cache_maint("dc civac", address, ret); 480 break; 481 case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC: /* DC CIVAC */ 482 __user_cache_maint("dc civac", address, ret); 483 break; 484 case ESR_ELx_SYS64_ISS_CRM_IC_IVAU: /* IC IVAU */ 485 __user_cache_maint("ic ivau", address, ret); 486 break; 487 default: 488 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0); 489 return; 490 } 491 492 if (ret) 493 arm64_notify_segfault(regs, address); 494 else 495 regs->pc += 4; 496 } 497 498 static void ctr_read_handler(unsigned int esr, struct pt_regs *regs) 499 { 500 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; 501 unsigned long val = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0); 502 503 pt_regs_write_reg(regs, rt, val); 504 505 regs->pc += 4; 506 } 507 508 struct sys64_hook { 509 unsigned int esr_mask; 510 unsigned int esr_val; 511 void (*handler)(unsigned int esr, struct pt_regs *regs); 512 }; 513 514 static struct sys64_hook sys64_hooks[] = { 515 { 516 .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK, 517 .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL, 518 .handler = user_cache_maint_handler, 519 }, 520 { 521 /* Trap read access to CTR_EL0 */ 522 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK, 523 .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ, 524 .handler = ctr_read_handler, 525 }, 526 {}, 527 }; 528 529 asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs) 530 { 531 struct sys64_hook *hook; 532 533 for (hook = sys64_hooks; hook->handler; hook++) 534 if ((hook->esr_mask & esr) == hook->esr_val) { 535 hook->handler(esr, regs); 536 return; 537 } 538 539 /* 540 * New SYS instructions may previously have been undefined at EL0. Fall 541 * back to our usual undefined instruction handler so that we handle 542 * these consistently. 543 */ 544 do_undefinstr(regs); 545 } 546 547 long compat_arm_syscall(struct pt_regs *regs); 548 549 asmlinkage long do_ni_syscall(struct pt_regs *regs) 550 { 551 #ifdef CONFIG_COMPAT 552 long ret; 553 if (is_compat_task()) { 554 ret = compat_arm_syscall(regs); 555 if (ret != -ENOSYS) 556 return ret; 557 } 558 #endif 559 560 if (show_unhandled_signals_ratelimited()) { 561 pr_info("%s[%d]: syscall %d\n", current->comm, 562 task_pid_nr(current), (int)regs->syscallno); 563 dump_instr("", regs); 564 if (user_mode(regs)) 565 __show_regs(regs); 566 } 567 568 return sys_ni_syscall(); 569 } 570 571 static const char *esr_class_str[] = { 572 [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC", 573 [ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized", 574 [ESR_ELx_EC_WFx] = "WFI/WFE", 575 [ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC", 576 [ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC", 577 [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC", 578 [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC", 579 [ESR_ELx_EC_FP_ASIMD] = "ASIMD", 580 [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS", 581 [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC", 582 [ESR_ELx_EC_ILL] = "PSTATE.IL", 583 [ESR_ELx_EC_SVC32] = "SVC (AArch32)", 584 [ESR_ELx_EC_HVC32] = "HVC (AArch32)", 585 [ESR_ELx_EC_SMC32] = "SMC (AArch32)", 586 [ESR_ELx_EC_SVC64] = "SVC (AArch64)", 587 [ESR_ELx_EC_HVC64] = "HVC (AArch64)", 588 [ESR_ELx_EC_SMC64] = "SMC (AArch64)", 589 [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)", 590 [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF", 591 [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)", 592 [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)", 593 [ESR_ELx_EC_PC_ALIGN] = "PC Alignment", 594 [ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)", 595 [ESR_ELx_EC_DABT_CUR] = "DABT (current EL)", 596 [ESR_ELx_EC_SP_ALIGN] = "SP Alignment", 597 [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)", 598 [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)", 599 [ESR_ELx_EC_SERROR] = "SError", 600 [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)", 601 [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)", 602 [ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)", 603 [ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)", 604 [ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)", 605 [ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)", 606 [ESR_ELx_EC_BKPT32] = "BKPT (AArch32)", 607 [ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)", 608 [ESR_ELx_EC_BRK64] = "BRK (AArch64)", 609 }; 610 611 const char *esr_get_class_string(u32 esr) 612 { 613 return esr_class_str[ESR_ELx_EC(esr)]; 614 } 615 616 /* 617 * bad_mode handles the impossible case in the exception vector. This is always 618 * fatal. 619 */ 620 asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr) 621 { 622 console_verbose(); 623 624 pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n", 625 handler[reason], smp_processor_id(), esr, 626 esr_get_class_string(esr)); 627 628 die("Oops - bad mode", regs, 0); 629 local_irq_disable(); 630 panic("bad mode"); 631 } 632 633 /* 634 * bad_el0_sync handles unexpected, but potentially recoverable synchronous 635 * exceptions taken from EL0. Unlike bad_mode, this returns. 636 */ 637 asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr) 638 { 639 siginfo_t info; 640 void __user *pc = (void __user *)instruction_pointer(regs); 641 console_verbose(); 642 643 pr_crit("Bad EL0 synchronous exception detected on CPU%d, code 0x%08x -- %s\n", 644 smp_processor_id(), esr, esr_get_class_string(esr)); 645 __show_regs(regs); 646 647 info.si_signo = SIGILL; 648 info.si_errno = 0; 649 info.si_code = ILL_ILLOPC; 650 info.si_addr = pc; 651 652 current->thread.fault_address = 0; 653 current->thread.fault_code = 0; 654 655 force_sig_info(info.si_signo, &info, current); 656 } 657 658 void __pte_error(const char *file, int line, unsigned long val) 659 { 660 pr_err("%s:%d: bad pte %016lx.\n", file, line, val); 661 } 662 663 void __pmd_error(const char *file, int line, unsigned long val) 664 { 665 pr_err("%s:%d: bad pmd %016lx.\n", file, line, val); 666 } 667 668 void __pud_error(const char *file, int line, unsigned long val) 669 { 670 pr_err("%s:%d: bad pud %016lx.\n", file, line, val); 671 } 672 673 void __pgd_error(const char *file, int line, unsigned long val) 674 { 675 pr_err("%s:%d: bad pgd %016lx.\n", file, line, val); 676 } 677 678 /* GENERIC_BUG traps */ 679 680 int is_valid_bugaddr(unsigned long addr) 681 { 682 /* 683 * bug_handler() only called for BRK #BUG_BRK_IMM. 684 * So the answer is trivial -- any spurious instances with no 685 * bug table entry will be rejected by report_bug() and passed 686 * back to the debug-monitors code and handled as a fatal 687 * unexpected debug exception. 688 */ 689 return 1; 690 } 691 692 static int bug_handler(struct pt_regs *regs, unsigned int esr) 693 { 694 if (user_mode(regs)) 695 return DBG_HOOK_ERROR; 696 697 switch (report_bug(regs->pc, regs)) { 698 case BUG_TRAP_TYPE_BUG: 699 die("Oops - BUG", regs, 0); 700 break; 701 702 case BUG_TRAP_TYPE_WARN: 703 /* Ideally, report_bug() should backtrace for us... but no. */ 704 dump_backtrace(regs, NULL); 705 break; 706 707 default: 708 /* unknown/unrecognised bug trap type */ 709 return DBG_HOOK_ERROR; 710 } 711 712 /* If thread survives, skip over the BUG instruction and continue: */ 713 regs->pc += AARCH64_INSN_SIZE; /* skip BRK and resume */ 714 return DBG_HOOK_HANDLED; 715 } 716 717 static struct break_hook bug_break_hook = { 718 .esr_val = 0xf2000000 | BUG_BRK_IMM, 719 .esr_mask = 0xffffffff, 720 .fn = bug_handler, 721 }; 722 723 /* 724 * Initial handler for AArch64 BRK exceptions 725 * This handler only used until debug_traps_init(). 726 */ 727 int __init early_brk64(unsigned long addr, unsigned int esr, 728 struct pt_regs *regs) 729 { 730 return bug_handler(regs, esr) != DBG_HOOK_HANDLED; 731 } 732 733 /* This registration must happen early, before debug_traps_init(). */ 734 void __init trap_init(void) 735 { 736 register_break_hook(&bug_break_hook); 737 } 738