xref: /openbmc/linux/arch/arm64/kernel/sys_compat.c (revision 4f6cce39)
1 /*
2  * Based on arch/arm/kernel/sys_arm.c
3  *
4  * Copyright (C) People who wrote linux/arch/i386/kernel/sys_i386.c
5  * Copyright (C) 1995, 1996 Russell King.
6  * Copyright (C) 2012 ARM Ltd.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 #include <linux/compat.h>
22 #include <linux/personality.h>
23 #include <linux/sched.h>
24 #include <linux/sched/signal.h>
25 #include <linux/slab.h>
26 #include <linux/syscalls.h>
27 #include <linux/uaccess.h>
28 
29 #include <asm/cacheflush.h>
30 #include <asm/unistd.h>
31 
32 static long
33 __do_compat_cache_op(unsigned long start, unsigned long end)
34 {
35 	long ret;
36 
37 	do {
38 		unsigned long chunk = min(PAGE_SIZE, end - start);
39 
40 		if (fatal_signal_pending(current))
41 			return 0;
42 
43 		ret = __flush_cache_user_range(start, start + chunk);
44 		if (ret)
45 			return ret;
46 
47 		cond_resched();
48 		start += chunk;
49 	} while (start < end);
50 
51 	return 0;
52 }
53 
54 static inline long
55 do_compat_cache_op(unsigned long start, unsigned long end, int flags)
56 {
57 	if (end < start || flags)
58 		return -EINVAL;
59 
60 	if (!access_ok(VERIFY_READ, start, end - start))
61 		return -EFAULT;
62 
63 	return __do_compat_cache_op(start, end);
64 }
65 /*
66  * Handle all unrecognised system calls.
67  */
68 long compat_arm_syscall(struct pt_regs *regs)
69 {
70 	unsigned int no = regs->regs[7];
71 
72 	switch (no) {
73 	/*
74 	 * Flush a region from virtual address 'r0' to virtual address 'r1'
75 	 * _exclusive_.  There is no alignment requirement on either address;
76 	 * user space does not need to know the hardware cache layout.
77 	 *
78 	 * r2 contains flags.  It should ALWAYS be passed as ZERO until it
79 	 * is defined to be something else.  For now we ignore it, but may
80 	 * the fires of hell burn in your belly if you break this rule. ;)
81 	 *
82 	 * (at a later date, we may want to allow this call to not flush
83 	 * various aspects of the cache.  Passing '0' will guarantee that
84 	 * everything necessary gets flushed to maintain consistency in
85 	 * the specified region).
86 	 */
87 	case __ARM_NR_compat_cacheflush:
88 		return do_compat_cache_op(regs->regs[0], regs->regs[1], regs->regs[2]);
89 
90 	case __ARM_NR_compat_set_tls:
91 		current->thread.tp_value = regs->regs[0];
92 
93 		/*
94 		 * Protect against register corruption from context switch.
95 		 * See comment in tls_thread_flush.
96 		 */
97 		barrier();
98 		write_sysreg(regs->regs[0], tpidrro_el0);
99 		return 0;
100 
101 	default:
102 		return -ENOSYS;
103 	}
104 }
105