1 /*
2  * Spin Table SMP initialisation
3  *
4  * Copyright (C) 2013 ARM Ltd.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18 
19 #include <linux/delay.h>
20 #include <linux/init.h>
21 #include <linux/of.h>
22 #include <linux/smp.h>
23 #include <linux/types.h>
24 
25 #include <asm/cacheflush.h>
26 #include <asm/cpu_ops.h>
27 #include <asm/cputype.h>
28 #include <asm/smp_plat.h>
29 
30 extern void secondary_holding_pen(void);
31 volatile unsigned long secondary_holding_pen_release = INVALID_HWID;
32 
33 static phys_addr_t cpu_release_addr[NR_CPUS];
34 
35 /*
36  * Write secondary_holding_pen_release in a way that is guaranteed to be
37  * visible to all observers, irrespective of whether they're taking part
38  * in coherency or not.  This is necessary for the hotplug code to work
39  * reliably.
40  */
41 static void write_pen_release(u64 val)
42 {
43 	void *start = (void *)&secondary_holding_pen_release;
44 	unsigned long size = sizeof(secondary_holding_pen_release);
45 
46 	secondary_holding_pen_release = val;
47 	__flush_dcache_area(start, size);
48 }
49 
50 
51 static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu)
52 {
53 	/*
54 	 * Determine the address from which the CPU is polling.
55 	 */
56 	if (of_property_read_u64(dn, "cpu-release-addr",
57 				 &cpu_release_addr[cpu])) {
58 		pr_err("CPU %d: missing or invalid cpu-release-addr property\n",
59 		       cpu);
60 
61 		return -1;
62 	}
63 
64 	return 0;
65 }
66 
67 static int smp_spin_table_cpu_prepare(unsigned int cpu)
68 {
69 	__le64 __iomem *release_addr;
70 
71 	if (!cpu_release_addr[cpu])
72 		return -ENODEV;
73 
74 	/*
75 	 * The cpu-release-addr may or may not be inside the linear mapping.
76 	 * As ioremap_cache will either give us a new mapping or reuse the
77 	 * existing linear mapping, we can use it to cover both cases. In
78 	 * either case the memory will be MT_NORMAL.
79 	 */
80 	release_addr = ioremap_cache(cpu_release_addr[cpu],
81 				     sizeof(*release_addr));
82 	if (!release_addr)
83 		return -ENOMEM;
84 
85 	/*
86 	 * We write the release address as LE regardless of the native
87 	 * endianess of the kernel. Therefore, any boot-loaders that
88 	 * read this address need to convert this address to the
89 	 * boot-loader's endianess before jumping. This is mandated by
90 	 * the boot protocol.
91 	 */
92 	writeq_relaxed(__pa(secondary_holding_pen), release_addr);
93 	__flush_dcache_area((__force void *)release_addr,
94 			    sizeof(*release_addr));
95 
96 	/*
97 	 * Send an event to wake up the secondary CPU.
98 	 */
99 	sev();
100 
101 	iounmap(release_addr);
102 
103 	return 0;
104 }
105 
106 static int smp_spin_table_cpu_boot(unsigned int cpu)
107 {
108 	/*
109 	 * Update the pen release flag.
110 	 */
111 	write_pen_release(cpu_logical_map(cpu));
112 
113 	/*
114 	 * Send an event, causing the secondaries to read pen_release.
115 	 */
116 	sev();
117 
118 	return 0;
119 }
120 
121 const struct cpu_operations smp_spin_table_ops = {
122 	.name		= "spin-table",
123 	.cpu_init	= smp_spin_table_cpu_init,
124 	.cpu_prepare	= smp_spin_table_cpu_prepare,
125 	.cpu_boot	= smp_spin_table_cpu_boot,
126 };
127