xref: /openbmc/linux/arch/arm64/kernel/smp.c (revision d7a3d85e)
1 /*
2  * SMP initialisation and IPI support
3  * Based on arch/arm/kernel/smp.c
4  *
5  * Copyright (C) 2012 ARM Ltd.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/spinlock.h>
23 #include <linux/sched.h>
24 #include <linux/interrupt.h>
25 #include <linux/cache.h>
26 #include <linux/profile.h>
27 #include <linux/errno.h>
28 #include <linux/mm.h>
29 #include <linux/err.h>
30 #include <linux/cpu.h>
31 #include <linux/smp.h>
32 #include <linux/seq_file.h>
33 #include <linux/irq.h>
34 #include <linux/percpu.h>
35 #include <linux/clockchips.h>
36 #include <linux/completion.h>
37 #include <linux/of.h>
38 #include <linux/irq_work.h>
39 
40 #include <asm/alternative.h>
41 #include <asm/atomic.h>
42 #include <asm/cacheflush.h>
43 #include <asm/cpu.h>
44 #include <asm/cputype.h>
45 #include <asm/cpu_ops.h>
46 #include <asm/mmu_context.h>
47 #include <asm/pgtable.h>
48 #include <asm/pgalloc.h>
49 #include <asm/processor.h>
50 #include <asm/smp_plat.h>
51 #include <asm/sections.h>
52 #include <asm/tlbflush.h>
53 #include <asm/ptrace.h>
54 
55 #define CREATE_TRACE_POINTS
56 #include <trace/events/ipi.h>
57 
58 /*
59  * as from 2.5, kernels no longer have an init_tasks structure
60  * so we need some other way of telling a new secondary core
61  * where to place its SVC stack
62  */
63 struct secondary_data secondary_data;
64 
65 enum ipi_msg_type {
66 	IPI_RESCHEDULE,
67 	IPI_CALL_FUNC,
68 	IPI_CPU_STOP,
69 	IPI_TIMER,
70 	IPI_IRQ_WORK,
71 };
72 
73 /*
74  * Boot a secondary CPU, and assign it the specified idle task.
75  * This also gives us the initial stack to use for this CPU.
76  */
77 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
78 {
79 	if (cpu_ops[cpu]->cpu_boot)
80 		return cpu_ops[cpu]->cpu_boot(cpu);
81 
82 	return -EOPNOTSUPP;
83 }
84 
85 static DECLARE_COMPLETION(cpu_running);
86 
87 int __cpu_up(unsigned int cpu, struct task_struct *idle)
88 {
89 	int ret;
90 
91 	/*
92 	 * We need to tell the secondary core where to find its stack and the
93 	 * page tables.
94 	 */
95 	secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
96 	__flush_dcache_area(&secondary_data, sizeof(secondary_data));
97 
98 	/*
99 	 * Now bring the CPU into our world.
100 	 */
101 	ret = boot_secondary(cpu, idle);
102 	if (ret == 0) {
103 		/*
104 		 * CPU was successfully started, wait for it to come online or
105 		 * time out.
106 		 */
107 		wait_for_completion_timeout(&cpu_running,
108 					    msecs_to_jiffies(1000));
109 
110 		if (!cpu_online(cpu)) {
111 			pr_crit("CPU%u: failed to come online\n", cpu);
112 			ret = -EIO;
113 		}
114 	} else {
115 		pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
116 	}
117 
118 	secondary_data.stack = NULL;
119 
120 	return ret;
121 }
122 
123 static void smp_store_cpu_info(unsigned int cpuid)
124 {
125 	store_cpu_topology(cpuid);
126 }
127 
128 /*
129  * This is the secondary CPU boot entry.  We're using this CPUs
130  * idle thread stack, but a set of temporary page tables.
131  */
132 asmlinkage void secondary_start_kernel(void)
133 {
134 	struct mm_struct *mm = &init_mm;
135 	unsigned int cpu = smp_processor_id();
136 
137 	/*
138 	 * All kernel threads share the same mm context; grab a
139 	 * reference and switch to it.
140 	 */
141 	atomic_inc(&mm->mm_count);
142 	current->active_mm = mm;
143 	cpumask_set_cpu(cpu, mm_cpumask(mm));
144 
145 	set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
146 	printk("CPU%u: Booted secondary processor\n", cpu);
147 
148 	/*
149 	 * TTBR0 is only used for the identity mapping at this stage. Make it
150 	 * point to zero page to avoid speculatively fetching new entries.
151 	 */
152 	cpu_set_reserved_ttbr0();
153 	flush_tlb_all();
154 	cpu_set_default_tcr_t0sz();
155 
156 	preempt_disable();
157 	trace_hardirqs_off();
158 
159 	if (cpu_ops[cpu]->cpu_postboot)
160 		cpu_ops[cpu]->cpu_postboot();
161 
162 	/*
163 	 * Log the CPU info before it is marked online and might get read.
164 	 */
165 	cpuinfo_store_cpu();
166 
167 	/*
168 	 * Enable GIC and timers.
169 	 */
170 	notify_cpu_starting(cpu);
171 
172 	smp_store_cpu_info(cpu);
173 
174 	/*
175 	 * OK, now it's safe to let the boot CPU continue.  Wait for
176 	 * the CPU migration code to notice that the CPU is online
177 	 * before we continue.
178 	 */
179 	set_cpu_online(cpu, true);
180 	complete(&cpu_running);
181 
182 	local_dbg_enable();
183 	local_irq_enable();
184 	local_async_enable();
185 
186 	/*
187 	 * OK, it's off to the idle thread for us
188 	 */
189 	cpu_startup_entry(CPUHP_ONLINE);
190 }
191 
192 #ifdef CONFIG_HOTPLUG_CPU
193 static int op_cpu_disable(unsigned int cpu)
194 {
195 	/*
196 	 * If we don't have a cpu_die method, abort before we reach the point
197 	 * of no return. CPU0 may not have an cpu_ops, so test for it.
198 	 */
199 	if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
200 		return -EOPNOTSUPP;
201 
202 	/*
203 	 * We may need to abort a hot unplug for some other mechanism-specific
204 	 * reason.
205 	 */
206 	if (cpu_ops[cpu]->cpu_disable)
207 		return cpu_ops[cpu]->cpu_disable(cpu);
208 
209 	return 0;
210 }
211 
212 /*
213  * __cpu_disable runs on the processor to be shutdown.
214  */
215 int __cpu_disable(void)
216 {
217 	unsigned int cpu = smp_processor_id();
218 	int ret;
219 
220 	ret = op_cpu_disable(cpu);
221 	if (ret)
222 		return ret;
223 
224 	/*
225 	 * Take this CPU offline.  Once we clear this, we can't return,
226 	 * and we must not schedule until we're ready to give up the cpu.
227 	 */
228 	set_cpu_online(cpu, false);
229 
230 	/*
231 	 * OK - migrate IRQs away from this CPU
232 	 */
233 	migrate_irqs();
234 
235 	/*
236 	 * Remove this CPU from the vm mask set of all processes.
237 	 */
238 	clear_tasks_mm_cpumask(cpu);
239 
240 	return 0;
241 }
242 
243 static int op_cpu_kill(unsigned int cpu)
244 {
245 	/*
246 	 * If we have no means of synchronising with the dying CPU, then assume
247 	 * that it is really dead. We can only wait for an arbitrary length of
248 	 * time and hope that it's dead, so let's skip the wait and just hope.
249 	 */
250 	if (!cpu_ops[cpu]->cpu_kill)
251 		return 1;
252 
253 	return cpu_ops[cpu]->cpu_kill(cpu);
254 }
255 
256 static DECLARE_COMPLETION(cpu_died);
257 
258 /*
259  * called on the thread which is asking for a CPU to be shutdown -
260  * waits until shutdown has completed, or it is timed out.
261  */
262 void __cpu_die(unsigned int cpu)
263 {
264 	if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
265 		pr_crit("CPU%u: cpu didn't die\n", cpu);
266 		return;
267 	}
268 	pr_notice("CPU%u: shutdown\n", cpu);
269 
270 	/*
271 	 * Now that the dying CPU is beyond the point of no return w.r.t.
272 	 * in-kernel synchronisation, try to get the firwmare to help us to
273 	 * verify that it has really left the kernel before we consider
274 	 * clobbering anything it might still be using.
275 	 */
276 	if (!op_cpu_kill(cpu))
277 		pr_warn("CPU%d may not have shut down cleanly\n", cpu);
278 }
279 
280 /*
281  * Called from the idle thread for the CPU which has been shutdown.
282  *
283  * Note that we disable IRQs here, but do not re-enable them
284  * before returning to the caller. This is also the behaviour
285  * of the other hotplug-cpu capable cores, so presumably coming
286  * out of idle fixes this.
287  */
288 void cpu_die(void)
289 {
290 	unsigned int cpu = smp_processor_id();
291 
292 	idle_task_exit();
293 
294 	local_irq_disable();
295 
296 	/* Tell __cpu_die() that this CPU is now safe to dispose of */
297 	complete(&cpu_died);
298 
299 	/*
300 	 * Actually shutdown the CPU. This must never fail. The specific hotplug
301 	 * mechanism must perform all required cache maintenance to ensure that
302 	 * no dirty lines are lost in the process of shutting down the CPU.
303 	 */
304 	cpu_ops[cpu]->cpu_die(cpu);
305 
306 	BUG();
307 }
308 #endif
309 
310 void __init smp_cpus_done(unsigned int max_cpus)
311 {
312 	pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
313 	do_post_cpus_up_work();
314 }
315 
316 void __init smp_prepare_boot_cpu(void)
317 {
318 	set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
319 }
320 
321 /*
322  * Enumerate the possible CPU set from the device tree and build the
323  * cpu logical map array containing MPIDR values related to logical
324  * cpus. Assumes that cpu_logical_map(0) has already been initialized.
325  */
326 void __init of_smp_init_cpus(void)
327 {
328 	struct device_node *dn = NULL;
329 	unsigned int i, cpu = 1;
330 	bool bootcpu_valid = false;
331 
332 	while ((dn = of_find_node_by_type(dn, "cpu"))) {
333 		const u32 *cell;
334 		u64 hwid;
335 
336 		/*
337 		 * A cpu node with missing "reg" property is
338 		 * considered invalid to build a cpu_logical_map
339 		 * entry.
340 		 */
341 		cell = of_get_property(dn, "reg", NULL);
342 		if (!cell) {
343 			pr_err("%s: missing reg property\n", dn->full_name);
344 			goto next;
345 		}
346 		hwid = of_read_number(cell, of_n_addr_cells(dn));
347 
348 		/*
349 		 * Non affinity bits must be set to 0 in the DT
350 		 */
351 		if (hwid & ~MPIDR_HWID_BITMASK) {
352 			pr_err("%s: invalid reg property\n", dn->full_name);
353 			goto next;
354 		}
355 
356 		/*
357 		 * Duplicate MPIDRs are a recipe for disaster. Scan
358 		 * all initialized entries and check for
359 		 * duplicates. If any is found just ignore the cpu.
360 		 * cpu_logical_map was initialized to INVALID_HWID to
361 		 * avoid matching valid MPIDR values.
362 		 */
363 		for (i = 1; (i < cpu) && (i < NR_CPUS); i++) {
364 			if (cpu_logical_map(i) == hwid) {
365 				pr_err("%s: duplicate cpu reg properties in the DT\n",
366 					dn->full_name);
367 				goto next;
368 			}
369 		}
370 
371 		/*
372 		 * The numbering scheme requires that the boot CPU
373 		 * must be assigned logical id 0. Record it so that
374 		 * the logical map built from DT is validated and can
375 		 * be used.
376 		 */
377 		if (hwid == cpu_logical_map(0)) {
378 			if (bootcpu_valid) {
379 				pr_err("%s: duplicate boot cpu reg property in DT\n",
380 					dn->full_name);
381 				goto next;
382 			}
383 
384 			bootcpu_valid = true;
385 
386 			/*
387 			 * cpu_logical_map has already been
388 			 * initialized and the boot cpu doesn't need
389 			 * the enable-method so continue without
390 			 * incrementing cpu.
391 			 */
392 			continue;
393 		}
394 
395 		if (cpu >= NR_CPUS)
396 			goto next;
397 
398 		if (cpu_read_ops(dn, cpu) != 0)
399 			goto next;
400 
401 		if (cpu_ops[cpu]->cpu_init(dn, cpu))
402 			goto next;
403 
404 		pr_debug("cpu logical map 0x%llx\n", hwid);
405 		cpu_logical_map(cpu) = hwid;
406 next:
407 		cpu++;
408 	}
409 
410 	/* sanity check */
411 	if (cpu > NR_CPUS)
412 		pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
413 			   cpu, NR_CPUS);
414 
415 	if (!bootcpu_valid) {
416 		pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");
417 		return;
418 	}
419 
420 	/*
421 	 * All the cpus that made it to the cpu_logical_map have been
422 	 * validated so set them as possible cpus.
423 	 */
424 	for (i = 0; i < NR_CPUS; i++)
425 		if (cpu_logical_map(i) != INVALID_HWID)
426 			set_cpu_possible(i, true);
427 }
428 
429 void __init smp_prepare_cpus(unsigned int max_cpus)
430 {
431 	int err;
432 	unsigned int cpu, ncores = num_possible_cpus();
433 
434 	init_cpu_topology();
435 
436 	smp_store_cpu_info(smp_processor_id());
437 
438 	/*
439 	 * are we trying to boot more cores than exist?
440 	 */
441 	if (max_cpus > ncores)
442 		max_cpus = ncores;
443 
444 	/* Don't bother if we're effectively UP */
445 	if (max_cpus <= 1)
446 		return;
447 
448 	/*
449 	 * Initialise the present map (which describes the set of CPUs
450 	 * actually populated at the present time) and release the
451 	 * secondaries from the bootloader.
452 	 *
453 	 * Make sure we online at most (max_cpus - 1) additional CPUs.
454 	 */
455 	max_cpus--;
456 	for_each_possible_cpu(cpu) {
457 		if (max_cpus == 0)
458 			break;
459 
460 		if (cpu == smp_processor_id())
461 			continue;
462 
463 		if (!cpu_ops[cpu])
464 			continue;
465 
466 		err = cpu_ops[cpu]->cpu_prepare(cpu);
467 		if (err)
468 			continue;
469 
470 		set_cpu_present(cpu, true);
471 		max_cpus--;
472 	}
473 }
474 
475 void (*__smp_cross_call)(const struct cpumask *, unsigned int);
476 
477 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
478 {
479 	__smp_cross_call = fn;
480 }
481 
482 static const char *ipi_types[NR_IPI] __tracepoint_string = {
483 #define S(x,s)	[x] = s
484 	S(IPI_RESCHEDULE, "Rescheduling interrupts"),
485 	S(IPI_CALL_FUNC, "Function call interrupts"),
486 	S(IPI_CPU_STOP, "CPU stop interrupts"),
487 	S(IPI_TIMER, "Timer broadcast interrupts"),
488 	S(IPI_IRQ_WORK, "IRQ work interrupts"),
489 };
490 
491 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
492 {
493 	trace_ipi_raise(target, ipi_types[ipinr]);
494 	__smp_cross_call(target, ipinr);
495 }
496 
497 void show_ipi_list(struct seq_file *p, int prec)
498 {
499 	unsigned int cpu, i;
500 
501 	for (i = 0; i < NR_IPI; i++) {
502 		seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
503 			   prec >= 4 ? " " : "");
504 		for_each_online_cpu(cpu)
505 			seq_printf(p, "%10u ",
506 				   __get_irq_stat(cpu, ipi_irqs[i]));
507 		seq_printf(p, "      %s\n", ipi_types[i]);
508 	}
509 }
510 
511 u64 smp_irq_stat_cpu(unsigned int cpu)
512 {
513 	u64 sum = 0;
514 	int i;
515 
516 	for (i = 0; i < NR_IPI; i++)
517 		sum += __get_irq_stat(cpu, ipi_irqs[i]);
518 
519 	return sum;
520 }
521 
522 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
523 {
524 	smp_cross_call(mask, IPI_CALL_FUNC);
525 }
526 
527 void arch_send_call_function_single_ipi(int cpu)
528 {
529 	smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
530 }
531 
532 #ifdef CONFIG_IRQ_WORK
533 void arch_irq_work_raise(void)
534 {
535 	if (__smp_cross_call)
536 		smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
537 }
538 #endif
539 
540 static DEFINE_RAW_SPINLOCK(stop_lock);
541 
542 /*
543  * ipi_cpu_stop - handle IPI from smp_send_stop()
544  */
545 static void ipi_cpu_stop(unsigned int cpu)
546 {
547 	if (system_state == SYSTEM_BOOTING ||
548 	    system_state == SYSTEM_RUNNING) {
549 		raw_spin_lock(&stop_lock);
550 		pr_crit("CPU%u: stopping\n", cpu);
551 		dump_stack();
552 		raw_spin_unlock(&stop_lock);
553 	}
554 
555 	set_cpu_online(cpu, false);
556 
557 	local_irq_disable();
558 
559 	while (1)
560 		cpu_relax();
561 }
562 
563 /*
564  * Main handler for inter-processor interrupts
565  */
566 void handle_IPI(int ipinr, struct pt_regs *regs)
567 {
568 	unsigned int cpu = smp_processor_id();
569 	struct pt_regs *old_regs = set_irq_regs(regs);
570 
571 	if ((unsigned)ipinr < NR_IPI) {
572 		trace_ipi_entry(ipi_types[ipinr]);
573 		__inc_irq_stat(cpu, ipi_irqs[ipinr]);
574 	}
575 
576 	switch (ipinr) {
577 	case IPI_RESCHEDULE:
578 		scheduler_ipi();
579 		break;
580 
581 	case IPI_CALL_FUNC:
582 		irq_enter();
583 		generic_smp_call_function_interrupt();
584 		irq_exit();
585 		break;
586 
587 	case IPI_CPU_STOP:
588 		irq_enter();
589 		ipi_cpu_stop(cpu);
590 		irq_exit();
591 		break;
592 
593 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
594 	case IPI_TIMER:
595 		irq_enter();
596 		tick_receive_broadcast();
597 		irq_exit();
598 		break;
599 #endif
600 
601 #ifdef CONFIG_IRQ_WORK
602 	case IPI_IRQ_WORK:
603 		irq_enter();
604 		irq_work_run();
605 		irq_exit();
606 		break;
607 #endif
608 
609 	default:
610 		pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
611 		break;
612 	}
613 
614 	if ((unsigned)ipinr < NR_IPI)
615 		trace_ipi_exit(ipi_types[ipinr]);
616 	set_irq_regs(old_regs);
617 }
618 
619 void smp_send_reschedule(int cpu)
620 {
621 	smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
622 }
623 
624 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
625 void tick_broadcast(const struct cpumask *mask)
626 {
627 	smp_cross_call(mask, IPI_TIMER);
628 }
629 #endif
630 
631 void smp_send_stop(void)
632 {
633 	unsigned long timeout;
634 
635 	if (num_online_cpus() > 1) {
636 		cpumask_t mask;
637 
638 		cpumask_copy(&mask, cpu_online_mask);
639 		cpumask_clear_cpu(smp_processor_id(), &mask);
640 
641 		smp_cross_call(&mask, IPI_CPU_STOP);
642 	}
643 
644 	/* Wait up to one second for other CPUs to stop */
645 	timeout = USEC_PER_SEC;
646 	while (num_online_cpus() > 1 && timeout--)
647 		udelay(1);
648 
649 	if (num_online_cpus() > 1)
650 		pr_warning("SMP: failed to stop secondary CPUs\n");
651 }
652 
653 /*
654  * not supported here
655  */
656 int setup_profiling_timer(unsigned int multiplier)
657 {
658 	return -EINVAL;
659 }
660